opcodes/ChangeLog

   1 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
   2
   3         * arm-dis.c (arm_opcodes): Add support for pldw.
   4         (thumb32_opcodes): Likewise.
   5
   6 2010-09-22  Robin Getz  <robin.getz@analog.com>
   7
   8         * bfin-dis.c (fmtconst): Cast address to 32bits.
   9
  10 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  11
  12         * bfin-dis.c (decode_REGMV_0): Rewrite valid combo checks.
  13
  14 2010-09-22  Robin Getz  <robin.getz@analog.com>
  15
  16         * bfin-dis.c (decode_ProgCtrl_0): Check for parallel insns.
  17         Reject P6/P7 to TESTSET.
  18         (decode_PushPopReg_0): Check for parallel insns.  Reject pushing
  19         SP onto the stack.
  20         (decode_PushPopMultiple_0): Check for parallel insns.  Make sure
  21         P/D fields match all the time.
  22         (decode_CCflag_0): Check for parallel insns.  Verify x/y fields
  23         are 0 for accumulator compares.
  24         (decode_CC2stat_0): Check for parallel insns.  Reject CC<op>CC.
  25         (decode_CaCTRL_0, decode_ccMV_0, decode_CC2dreg_0, decode_BRCC_0,
  26         decode_UJUMP_0, decode_LOGI2op_0, decode_COMPI2opD_0,
  27         decode_COMPI2opP_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
  28         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
  29         decode_pseudoOChar_0, decode_pseudodbg_assert_0): Check for parallel
  30         insns.
  31         (decode_dagMODim_0): Verify br field for IREG ops.
  32         (decode_LDST_0): Reject preg load into same preg.
  33         (_print_insn_bfin): Handle returns for ILLEGAL decodes.
  34         (print_insn_bfin): Likewise.
  35
  36 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  37
  38         * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
  39
  40 2010-09-22  Robin Getz  <robin.getz@analog.com>
  41
  42         * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
  43
  44 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  45
  46         * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
  47
  48 2010-09-22  Robin Getz  <robin.getz@analog.com>
  49
  50         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
  51         register values greater than 8.
  52         (IS_RESERVEDREG, allreg, mostreg): New helpers.
  53         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
  54         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
  55         (decode_CC2dreg_0): Check valid CC register number.
  56
  57 2010-09-22  Robin Getz  <robin.getz@analog.com>
  58
  59         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
  60
  61 2010-09-22  Robin Getz  <robin.getz@analog.com>
  62
  63         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
  64         (reg_names): Likewise.
  65         (decode_statbits): Likewise; while reformatting to make manageable.
  66
  67 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  68
  69         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
  70         (decode_pseudoOChar_0): New function.
  71         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
  72
  73 2010-09-22  Robin Getz  <robin.getz@analog.com>
  74
  75         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
  76         LSHIFT instead of SHIFT.
  77
  78 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  79
  80         * bfin-dis.c (constant_formats): Constify the whole structure.
  81         (fmtconst): Add const to return value.
  82         (reg_names): Mark const.
  83         (decode_multfunc): Mark s0/s1 as const.
  84         (decode_macfunc): Mark a/sop as const.
  85
  86 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
  87
  88         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
  89
  90 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
  91
  92         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
  93         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
  94
  95 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
  96
  97         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
  98         dlx_insn_type array.
  99
 100 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
 101
 102         PR binutils/11960
 103         * i386-dis.c (sIv): New.
 104         (dis386): Replace Iq with sIv on "pushT".
 105         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
 106         (x86_64_table): Replace {T|}/{P|} with P.
 107         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
 108         (OP_sI): Update v_mode.  Remove w_mode.
 109
 110 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
 111
 112         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
 113         on E500 and E500MC.
 114
 115 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
 116
 117         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
 118         prefetchw.
 119
 120 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 121
 122         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
 123         to processor flags for PENTIUMPRO processors and later.
 124         * i386-opc.h (enum): Add CpuNop.
 125         (i386_cpu_flags): Add cpunop bit.
 126         * i386-opc.tbl: Change nop cpu_flags.
 127         * i386-init.h: Regenerated.
 128         * i386-tbl.h: Likewise.
 129
 130 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 131
 132         * i386-opc.h (enum): Fix typos in comments.
 133
 134 2010-08-06  Alan Modra  <amodra@gmail.com>
 135
 136         * disassemble.c: Formatting.
 137         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
 138
 139 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 140
 141         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
 142         * i386-tbl.h: Regenerated.
 143
 144 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 145
 146         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 147
 148         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 149         * i386-tbl.h: Regenerated.
 150
 151 2010-07-29  DJ Delorie  <dj@redhat.com>
 152
 153         * rx-decode.opc (SRR): New.
 154         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 155         r0,r0) and NOP3 (max r0,r0) special cases.
 156         * rx-decode.c: Regenerate.
 157
 158 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 159
 160         * i386-dis.c: Add 0F to VEX opcode enums.
 161
 162 2010-07-27  DJ Delorie  <dj@redhat.com>
 163
 164         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 165         (rx_decode_opcode): Likewise.
 166         * rx-decode.c: Regenerate.
 167
 168 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 169             Ina Pandit  <ina.pandit@kpitcummins.com>
 170
 171         * v850-dis.c (v850_sreg_names): Updated structure for system
 172         registers.
 173         (float_cc_names): new structure for condition codes.
 174         (print_value): Update the function that prints value.
 175         (get_operand_value): New function to get the operand value.
 176         (disassemble): Updated to handle the disassembly of instructions.
 177         (print_insn_v850): Updated function to print instruction for different
 178         families.
 179         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 180         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 181         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 182         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 183         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 184         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 185         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 186         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 187         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 188         (v850_operands): Update with the relocation name. Also update
 189         the instructions with specific set of processors.
 190
 191 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 192
 193         * arm-dis.c (print_insn_arm): Add cases for printing more
 194         symbolic operands.
 195         (print_insn_thumb32): Likewise.
 196
 197 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 198
 199         * mips-dis.c (print_insn_mips): Correct branch instruction type
 200         determination.
 201
 202 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 203
 204         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 205         type and delay slot determination.
 206         (print_insn_mips16): Extend branch instruction type and delay
 207         slot determination to cover all instructions.
 208         * mips16-opc.c (BR): Remove macro.
 209         (UBR, CBR): New macros.
 210         (mips16_opcodes): Update branch annotation for "b", "beqz",
 211         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 212         and "jrc".
 213
 214 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 215
 216         AVX Programming Reference (June, 2010)
 217         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 218         * i386-opc.tbl: Likewise.
 219         * i386-tbl.h: Regenerated.
 220
 221 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 222
 223         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 224
 225 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 226
 227         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 228         ppc_cpu_t before inverting.
 229         (ppc_parse_cpu): Likewise.
 230         (print_insn_powerpc): Likewise.
 231
 232 2010-07-03  Alan Modra  <amodra@gmail.com>
 233
 234         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 235         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 236         (PPC64, MFDEC2): Update.
 237         (NON32, NO371): Define.
 238         (powerpc_opcode): Update to not use old opcode flags, and avoid
 239         -m601 duplicates.
 240
 241 2010-07-03  DJ Delorie  <dj@delorie.com>
 242
 243         * m32c-ibld.c: Regenerate.
 244
 245 2010-07-03  Alan Modra  <amodra@gmail.com>
 246
 247         * ppc-opc.c (PWR2COM): Define.
 248         (PPCPWR2): Add PPC_OPCODE_COMMON.
 249         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 250         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 251         "rac" from -mcom.
 252
 253 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 254
 255         AVX Programming Reference (June, 2010)
 256         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 257         (PREFIX_0FAE_REG_1): Likewise.
 258         (PREFIX_0FAE_REG_2): Likewise.
 259         (PREFIX_0FAE_REG_3): Likewise.
 260         (PREFIX_VEX_3813): Likewise.
 261         (PREFIX_VEX_3A1D): Likewise.
 262         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 263         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 264         PREFIX_VEX_3A1D.
 265         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 266         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 267         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 268
 269         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 270         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 271         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 272
 273         * i386-opc.h (CpuXsaveopt): New.
 274         (CpuFSGSBase): Likewise.
 275         (CpuRdRnd): Likewise.
 276         (CpuF16C): Likewise.
 277         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 278         cpuf16c.
 279
 280         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 281         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 282         * i386-init.h: Regenerated.
 283         * i386-tbl.h: Likewise.
 284
 285 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 286
 287         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 288         and mtocrf on EFS.
 289
 290 2010-06-29  Alan Modra  <amodra@gmail.com>
 291
 292         * maxq-dis.c: Delete file.
 293         * Makefile.am: Remove references to maxq.
 294         * configure.in: Likewise.
 295         * disassemble.c: Likewise.
 296         * Makefile.in: Regenerate.
 297         * configure: Regenerate.
 298         * po/POTFILES.in: Regenerate.
 299
 300 2010-06-29  Alan Modra  <amodra@gmail.com>
 301
 302         * mep-dis.c: Regenerate.
 303
 304 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 305
 306         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 307
 308 2010-06-27  Alan Modra  <amodra@gmail.com>
 309
 310         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 311         (decodeInstr): Likewise.
 312         * dlx-dis.c (print_insn_dlx): Likewise.
 313         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 314         * maxq-dis.c (check_move, print_insn): Likewise.
 315         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 316         * msp430-dis.c (msp430_branchinstr): Likewise.
 317         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 318         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 319         * sparc-dis.c (print_insn_sparc): Likewise.
 320         * fr30-asm.c: Regenerate.
 321         * frv-asm.c: Regenerate.
 322         * ip2k-asm.c: Regenerate.
 323         * iq2000-asm.c: Regenerate.
 324         * lm32-asm.c: Regenerate.
 325         * m32c-asm.c: Regenerate.
 326         * m32r-asm.c: Regenerate.
 327         * mep-asm.c: Regenerate.
 328         * mt-asm.c: Regenerate.
 329         * openrisc-asm.c: Regenerate.
 330         * xc16x-asm.c: Regenerate.
 331         * xstormy16-asm.c: Regenerate.
 332
 333 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 334
 335         PR gas/11673
 336         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 337
 338 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 339
 340         PR binutils/11676
 341         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 342
 343 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 344
 345         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 346         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 347         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 348         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 349         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 350         Treat lwsync as msync on e500.
 351
 352 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 353
 354         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 355
 356 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 357
 358         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 359         constants is the same on 32-bit and 64-bit hosts.
 360
 361 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 362
 363         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 364         .short directives so that they can be reassembled.
 365
 366 2010-05-26  Catherine Moore <clm@codesourcery.com>
 367             David Ung  <davidu@mips.com>
 368
 369         * mips-opc.c: Change membership to I1 for instructions ssnop and
 370         ehb.
 371
 372 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 373
 374         * i386-dis.c (sib): New.
 375         (get_sib): Likewise.
 376         (print_insn): Call get_sib.
 377         OP_E_memory): Use sib.
 378
 379 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 380
 381         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 382         * mips-opc.c (I16): Remove.
 383         (mips_builtin_op): Reclassify jalx.
 384
 385 2010-05-19  Alan Modra  <amodra@gmail.com>
 386
 387         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 388         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 389
 390 2010-05-13  Alan Modra  <amodra@gmail.com>
 391
 392         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 393
 394 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 395
 396         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 397         format.
 398         (print_insn_thumb16): Add support for new %W format.
 399
 400 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 401
 402         * Makefile.in: Regenerate with automake 1.11.1.
 403         * aclocal.m4: Ditto.
 404
 405 2010-05-05  Nick Clifton  <nickc@redhat.com>
 406
 407         * po/es.po: Updated Spanish translation.
 408
 409 2010-04-22  Nick Clifton  <nickc@redhat.com>
 410
 411         * po/opcodes.pot: Updated by the Translation project.
 412         * po/vi.po: Updated Vietnamese translation.
 413
 414 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 415
 416         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 417         bits in opcode.
 418
 419 2010-04-09  Nick Clifton  <nickc@redhat.com>
 420
 421         * i386-dis.c (print_insn): Remove unused variable op.
 422         (OP_sI): Remove unused variable mask.
 423
 424 2010-04-07  Alan Modra  <amodra@gmail.com>
 425
 426         * configure: Regenerate.
 427
 428 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 429
 430         * ppc-opc.c (RBOPT): New define.
 431         ("dccci"): Enable for PPCA2.  Make operands optional.
 432         ("iccci"): Likewise.  Do not deprecate for PPC476.
 433
 434 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 435
 436         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 437
 438 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 439
 440         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 441         * Makefile.in: Regenerate.
 442         * configure.in (bfd_tic6x_arch): New.
 443         * configure: Regenerate.
 444         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 445         (disassembler): Handle TI C6X.
 446         * tic6x-dis.c: New.
 447
 448 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 449
 450         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 451
 452 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 453
 454         * dis-buf.c (buffer_read_memory): Give error for reading just
 455         before the start of memory.
 456
 457 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 458             Quentin Neill <quentin.neill@amd.com>
 459
 460         * i386-dis.c (OP_LWP_I): Removed.
 461         (reg_table): Do not use OP_LWP_I, use Iq.
 462         (OP_LWPCB_E): Remove use of names16.
 463         (OP_LWP_E): Same.
 464         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 465         should not set the Vex.length bit.
 466         * i386-tbl.h: Regenerated.
 467
 468 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 469
 470         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 471
 472 2010-02-24  Nick Clifton  <nickc@redhat.com>
 473
 474         PR binutils/6773
 475         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 476         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 477         (thumb32_opcodes): Likewise.
 478
 479 2010-02-15  Nick Clifton  <nickc@redhat.com>
 480
 481         * po/vi.po: Updated Vietnamese translation.
 482
 483 2010-02-12  Doug Evans  <dje@sebabeach.org>
 484
 485         * lm32-opinst.c: Regenerate.
 486
 487 2010-02-11  Doug Evans  <dje@sebabeach.org>
 488
 489         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 490         (print_address): Delete CGEN_PRINT_ADDRESS.
 491         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 492         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 493         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 494         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 495
 496         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 497         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 498         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 499         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 500         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 501         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 502         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 503         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 504         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 505         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 506         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 507         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 508
 509 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 510
 511         * i386-dis.c: Update copyright.
 512         * i386-gen.c: Likewise.
 513         * i386-opc.h: Likewise.
 514         * i386-opc.tbl: Likewise.
 515
 516 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 517             Sebastian Pop  <sebastian.pop@amd.com>
 518
 519         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 520         function to handle 5th imm8 operand.
 521         (PREFIX_VEX_3A48): Added.
 522         (PREFIX_VEX_3A49): Added.
 523         (VEX_W_3A48_P_2): Added.
 524         (VEX_W_3A49_P_2): Added.
 525         (prefix table): Added entries for PREFIX_VEX_3A48
 526         and PREFIX_VEX_3A49.
 527         (vex table): Added entries for VEX_W_3A48_P_2 and
 528         and VEX_W_3A49_P_2.
 529         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 530         for Vec_Imm4 operands.
 531         * i386-opc.h (enum): Added Vec_Imm4.
 532         (i386_operand_type): Added vec_imm4.
 533         * i386-opc.tbl: Add entries for vpermilp[ds].
 534         * i386-init.h: Regenerated.
 535         * i386-tbl.h: Regenerated.
 536
 537 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 538
 539         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 540         and "pwr7".  Move "a2" into alphabetical order.
 541
 542 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 543
 544         * ppc-dis.c (ppc_opts): Add titan entry.
 545         * ppc-opc.c (TITAN, MULHW): Define.
 546         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 547
 548 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 549
 550         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 551         to CPU_BDVER1_FLAGS
 552         * i386-init.h: Regenerated.
 553
 554 2010-02-03  Anthony Green  <green@moxielogic.com>
 555
 556         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 557         0x0f, and make 0x00 an illegal instruction.
 558
 559 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 560
 561         * opcodes/arm-dis.c (struct arm_private_data): New.
 562         (print_insn_coprocessor, print_insn_arm): Update to use struct
 563         arm_private_data.
 564         (is_mapping_symbol, get_map_sym_type): New functions.
 565         (get_sym_code_type): Check the symbol's section.  Do not check
 566         mapping symbols.
 567         (print_insn): Default to disassembling ARM mode code.  Check
 568         for mapping symbols separately from other symbols.  Use
 569         struct arm_private_data.
 570
 571 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 572
 573         * i386-dis.c (EXVexWdqScalar): New.
 574         (vex_scalar_w_dq_mode): Likewise.
 575         (prefix_table): Update entries for PREFIX_VEX_3899,
 576         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 577         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 578         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 579         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 580         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 581         (OP_EX): Likewise.
 582
 583 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 584
 585         * i386-dis.c (XMScalar): New.
 586         (EXdScalar): Likewise.
 587         (EXqScalar): Likewise.
 588         (EXqScalarS): Likewise.
 589         (VexScalar): Likewise.
 590         (EXdVexScalarS): Likewise.
 591         (EXqVexScalarS): Likewise.
 592         (XMVexScalar): Likewise.
 593         (scalar_mode): Likewise.
 594         (d_scalar_mode): Likewise.
 595         (d_scalar_swap_mode): Likewise.
 596         (q_scalar_mode): Likewise.
 597         (q_scalar_swap_mode): Likewise.
 598         (vex_scalar_mode): Likewise.
 599         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 600         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 601         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 602         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 603         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 604         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 605         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 606         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 607         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 608         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 609         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 610         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 611         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 612         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 613         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 614         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 615         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 616         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 617         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 618         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 619         q_scalar_mode, q_scalar_swap_mode.
 620         (OP_XMM): Handle scalar_mode.
 621         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 622         and q_scalar_swap_mode.
 623         (OP_VEX): Handle vex_scalar_mode.
 624
 625 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 626
 627         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 628
 629 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 630
 631         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 632
 633 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 634
 635         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 636
 637 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 638
 639         * i386-dis.c (Bad_Opcode): New.
 640         (bad_opcode): Likewise.
 641         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 642         (dis386_twobyte): Likewise.
 643         (reg_table): Likewise.
 644         (prefix_table): Likewise.
 645         (x86_64_table): Likewise.
 646         (vex_len_table): Likewise.
 647         (vex_w_table): Likewise.
 648         (mod_table): Likewise.
 649         (rm_table): Likewise.
 650         (float_reg): Likewise.
 651         (reg_table): Remove trailing "(bad)" entries.
 652         (prefix_table): Likewise.
 653         (x86_64_table): Likewise.
 654         (vex_len_table): Likewise.
 655         (vex_w_table): Likewise.
 656         (mod_table): Likewise.
 657         (rm_table): Likewise.
 658         (get_valid_dis386): Handle bytemode 0.
 659
 660 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 661
 662         * i386-opc.h (VEXScalar): New.
 663
 664         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 665         instructions.
 666         * i386-tbl.h: Regenerated.
 667
 668 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 669
 670         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 671
 672         * i386-opc.tbl: Add xsave64 and xrstor64.
 673         * i386-tbl.h: Regenerated.
 674
 675 2010-01-20  Nick Clifton  <nickc@redhat.com>
 676
 677         PR 11170
 678         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 679         based post-indexed addressing.
 680
 681 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 682
 683         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 684         * i386-tbl.h: Regenerated.
 685
 686 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 687
 688         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 689         comments.
 690
 691 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 692
 693         * i386-dis.c (names_mm): New.
 694         (intel_names_mm): Likewise.
 695         (att_names_mm): Likewise.
 696         (names_xmm): Likewise.
 697         (intel_names_xmm): Likewise.
 698         (att_names_xmm): Likewise.
 699         (names_ymm): Likewise.
 700         (intel_names_ymm): Likewise.
 701         (att_names_ymm): Likewise.
 702         (print_insn): Set names_mm, names_xmm and names_ymm.
 703         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 704         (OP_XMM): Likewise.
 705         (OP_EM): Likewise.
 706         (OP_EMC): Likewise.
 707         (OP_MXC): Likewise.
 708         (OP_EX): Likewise.
 709         (XMM_Fixup): Likewise.
 710         (OP_VEX): Likewise.
 711         (OP_EX_VexReg): Likewise.
 712         (OP_Vex_2src): Likewise.
 713         (OP_Vex_2src_1): Likewise.
 714         (OP_Vex_2src_2): Likewise.
 715         (OP_REG_VexI4): Likewise.
 716
 717 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 718
 719         * i386-dis.c (print_insn): Update comments.
 720
 721 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 722
 723         * i386-dis.c (rex_original): Removed.
 724         (ckprefix): Remove rex_original.
 725         (print_insn): Update comments.
 726
 727 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 728
 729         * Makefile.in: Regenerate.
 730         * configure: Regenerate.
 731
 732 2010-01-07  Doug Evans  <dje@sebabeach.org>
 733
 734         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 735         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 736         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 737         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 738         * xstormy16-ibld.c: Regenerate.
 739
 740 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 741
 742         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 743         * i386-init.h: Regenerated.
 744
 745 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 746
 747         * arm-dis.c (print_insn): Fixed search for next symbol and data
 748         dumping condition, and the initial mapping symbol state.
 749
 750 2010-01-05  Doug Evans  <dje@sebabeach.org>
 751
 752         * cgen-ibld.in: #include "cgen/basic-modes.h".
 753         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 754         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 755         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 756         * xstormy16-ibld.c: Regenerate.
 757
 758 2010-01-04  Nick Clifton  <nickc@redhat.com>
 759
 760         PR 11123
 761         * arm-dis.c (print_insn_coprocessor): Initialise value.
 762
 763 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 764
 765         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 766
 767 2010-01-02  Doug Evans  <dje@sebabeach.org>
 768
 769         * cgen-asm.in: Update copyright year.
 770         * cgen-dis.in: Update copyright year.
 771         * cgen-ibld.in: Update copyright year.
 772         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 773         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 774         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 775         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 776         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 777         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 778         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 779         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 780         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 781         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 782         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 783         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 784         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 785         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 786         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 787         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 788         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 789         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 790         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 791         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 792         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 793
 794 For older changes see ChangeLog-2009
 795 \f
 796 Local Variables:
 797 mode: change-log
 798 left-margin: 8
 799 fill-column: 74
 800 version-control: never
 801 End: