ff232f5e467bd226d857cfe84b1aeed74d1e1894
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
2
3 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
4
5 2005-03-05 Alan Modra <amodra@bigpond.net.au>
6
7 * po/opcodes.pot: Regenerate.
8
9 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
10
11 * opcodes/arc-dis.c: Add enum a4_decoding_class.
12 (dsmOneArcInst): Use the enum values for the decoding class.
13 Remove redundant case in the switch for decodingClass value 11.
14
15 2005-03-02 Jan Beulich <jbeulich@novell.com>
16
17 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
18 accesses.
19 (OP_C): Consider lock prefix in non-64-bit modes.
20
21 2005-02-24 Alan Modra <amodra@bigpond.net.au>
22
23 * cris-dis.c (format_hex): Remove ineffective warning fix.
24 * crx-dis.c (make_instruction): Warning fix.
25 * frv-asm.c: Regenerate.
26
27 2005-02-23 Nick Clifton <nickc@redhat.com>
28
29 * cgen-dis.in: Use bfd_byte for buffers that are passed to
30 read_memory.
31
32 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
33
34 * crx-dis.c (make_instruction): Move argument structure into inner
35 scope and ensure that all of its fields are initialised before
36 they are used.
37
38 * fr30-asm.c: Regenerate.
39 * fr30-dis.c: Regenerate.
40 * frv-asm.c: Regenerate.
41 * frv-dis.c: Regenerate.
42 * ip2k-asm.c: Regenerate.
43 * ip2k-dis.c: Regenerate.
44 * iq2000-asm.c: Regenerate.
45 * iq2000-dis.c: Regenerate.
46 * m32r-asm.c: Regenerate.
47 * m32r-dis.c: Regenerate.
48 * openrisc-asm.c: Regenerate.
49 * openrisc-dis.c: Regenerate.
50 * xstormy16-asm.c: Regenerate.
51 * xstormy16-dis.c: Regenerate.
52
53 2005-02-22 Alan Modra <amodra@bigpond.net.au>
54
55 * arc-ext.c: Warning fixes.
56 * arc-ext.h: Likewise.
57 * cgen-opc.c: Likewise.
58 * ia64-gen.c: Likewise.
59 * maxq-dis.c: Likewise.
60 * ns32k-dis.c: Likewise.
61 * w65-dis.c: Likewise.
62 * ia64-asmtab.c: Regenerate.
63
64 2005-02-22 Alan Modra <amodra@bigpond.net.au>
65
66 * fr30-desc.c: Regenerate.
67 * fr30-desc.h: Regenerate.
68 * fr30-opc.c: Regenerate.
69 * fr30-opc.h: Regenerate.
70 * frv-desc.c: Regenerate.
71 * frv-desc.h: Regenerate.
72 * frv-opc.c: Regenerate.
73 * frv-opc.h: Regenerate.
74 * ip2k-desc.c: Regenerate.
75 * ip2k-desc.h: Regenerate.
76 * ip2k-opc.c: Regenerate.
77 * ip2k-opc.h: Regenerate.
78 * iq2000-desc.c: Regenerate.
79 * iq2000-desc.h: Regenerate.
80 * iq2000-opc.c: Regenerate.
81 * iq2000-opc.h: Regenerate.
82 * m32r-desc.c: Regenerate.
83 * m32r-desc.h: Regenerate.
84 * m32r-opc.c: Regenerate.
85 * m32r-opc.h: Regenerate.
86 * m32r-opinst.c: Regenerate.
87 * openrisc-desc.c: Regenerate.
88 * openrisc-desc.h: Regenerate.
89 * openrisc-opc.c: Regenerate.
90 * openrisc-opc.h: Regenerate.
91 * xstormy16-desc.c: Regenerate.
92 * xstormy16-desc.h: Regenerate.
93 * xstormy16-opc.c: Regenerate.
94 * xstormy16-opc.h: Regenerate.
95
96 2005-02-21 Alan Modra <amodra@bigpond.net.au>
97
98 * Makefile.am: Run "make dep-am"
99 * Makefile.in: Regenerate.
100
101 2005-02-15 Nick Clifton <nickc@redhat.com>
102
103 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
104 compile time warnings.
105 (print_keyword): Likewise.
106 (default_print_insn): Likewise.
107
108 * fr30-desc.c: Regenerated.
109 * fr30-desc.h: Regenerated.
110 * fr30-dis.c: Regenerated.
111 * fr30-opc.c: Regenerated.
112 * fr30-opc.h: Regenerated.
113 * frv-desc.c: Regenerated.
114 * frv-dis.c: Regenerated.
115 * frv-opc.c: Regenerated.
116 * ip2k-asm.c: Regenerated.
117 * ip2k-desc.c: Regenerated.
118 * ip2k-desc.h: Regenerated.
119 * ip2k-dis.c: Regenerated.
120 * ip2k-opc.c: Regenerated.
121 * ip2k-opc.h: Regenerated.
122 * iq2000-desc.c: Regenerated.
123 * iq2000-dis.c: Regenerated.
124 * iq2000-opc.c: Regenerated.
125 * m32r-asm.c: Regenerated.
126 * m32r-desc.c: Regenerated.
127 * m32r-desc.h: Regenerated.
128 * m32r-dis.c: Regenerated.
129 * m32r-opc.c: Regenerated.
130 * m32r-opc.h: Regenerated.
131 * m32r-opinst.c: Regenerated.
132 * openrisc-desc.c: Regenerated.
133 * openrisc-desc.h: Regenerated.
134 * openrisc-dis.c: Regenerated.
135 * openrisc-opc.c: Regenerated.
136 * openrisc-opc.h: Regenerated.
137 * xstormy16-desc.c: Regenerated.
138 * xstormy16-desc.h: Regenerated.
139 * xstormy16-dis.c: Regenerated.
140 * xstormy16-opc.c: Regenerated.
141 * xstormy16-opc.h: Regenerated.
142
143 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
144
145 * dis-buf.c (perror_memory): Use sprintf_vma to print out
146 address.
147
148 2005-02-11 Nick Clifton <nickc@redhat.com>
149
150 * iq2000-asm.c: Regenerate.
151
152 * frv-dis.c: Regenerate.
153
154 2005-02-07 Jim Blandy <jimb@redhat.com>
155
156 * Makefile.am (CGEN): Load guile.scm before calling the main
157 application script.
158 * Makefile.in: Regenerated.
159 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
160 Simply pass the cgen-opc.scm path to ${cgen} as its first
161 argument; ${cgen} itself now contains the '-s', or whatever is
162 appropriate for the Scheme being used.
163
164 2005-01-31 Andrew Cagney <cagney@gnu.org>
165
166 * configure: Regenerate to track ../gettext.m4.
167
168 2005-01-31 Jan Beulich <jbeulich@novell.com>
169
170 * ia64-gen.c (NELEMS): Define.
171 (shrink): Generate alias with missing second predicate register when
172 opcode has two outputs and these are both predicates.
173 * ia64-opc-i.c (FULL17): Define.
174 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
175 here to generate output template.
176 (TBITCM, TNATCM): Undefine after use.
177 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
178 first input. Add ld16 aliases without ar.csd as second output. Add
179 st16 aliases without ar.csd as second input. Add cmpxchg aliases
180 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
181 ar.ccv as third/fourth inputs. Consolidate through...
182 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
183 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
184 * ia64-asmtab.c: Regenerate.
185
186 2005-01-27 Andrew Cagney <cagney@gnu.org>
187
188 * configure: Regenerate to track ../gettext.m4 change.
189
190 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
191
192 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
193 * frv-asm.c: Rebuilt.
194 * frv-desc.c: Rebuilt.
195 * frv-desc.h: Rebuilt.
196 * frv-dis.c: Rebuilt.
197 * frv-ibld.c: Rebuilt.
198 * frv-opc.c: Rebuilt.
199 * frv-opc.h: Rebuilt.
200
201 2005-01-24 Andrew Cagney <cagney@gnu.org>
202
203 * configure: Regenerate, ../gettext.m4 was updated.
204
205 2005-01-21 Fred Fish <fnf@specifixinc.com>
206
207 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
208 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
209 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
210 * mips-dis.c: Ditto.
211
212 2005-01-20 Alan Modra <amodra@bigpond.net.au>
213
214 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
215
216 2005-01-19 Fred Fish <fnf@specifixinc.com>
217
218 * mips-dis.c (no_aliases): New disassembly option flag.
219 (set_default_mips_dis_options): Init no_aliases to zero.
220 (parse_mips_dis_option): Handle no-aliases option.
221 (print_insn_mips): Ignore table entries that are aliases
222 if no_aliases is set.
223 (print_insn_mips16): Ditto.
224 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
225 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
226 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
227 * mips16-opc.c (mips16_opcodes): Ditto.
228
229 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
230
231 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
232 (inheritance diagram): Add missing edge.
233 (arch_sh1_up): Rename arch_sh_up to match external name to make life
234 easier for the testsuite.
235 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
236 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
237 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
238 arch_sh2a_or_sh4_up child.
239 (sh_table): Do renaming as above.
240 Correct comment for ldc.l for gas testsuite to read.
241 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
242 Correct comments for movy.w and movy.l for gas testsuite to read.
243 Correct comments for fmov.d and fmov.s for gas testsuite to read.
244
245 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
246
247 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
248
249 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
250
251 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
252
253 2005-01-10 Andreas Schwab <schwab@suse.de>
254
255 * disassemble.c (disassemble_init_for_target) <case
256 bfd_arch_ia64>: Set skip_zeroes to 16.
257 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
258
259 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
260
261 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
262
263 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
264
265 * avr-dis.c: Prettyprint. Added printing of symbol names in all
266 memory references. Convert avr_operand() to C90 formatting.
267
268 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
269
270 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
271
272 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
273
274 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
275 (no_op_insn): Initialize array with instructions that have no
276 operands.
277 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
278
279 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
280
281 * arm-dis.c: Correct top-level comment.
282
283 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
284
285 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
286 architecuture defining the insn.
287 (arm_opcodes, thumb_opcodes): Delete. Move to ...
288 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
289 field.
290 Also include opcode/arm.h.
291 * Makefile.am (arm-dis.lo): Update dependency list.
292 * Makefile.in: Regenerate.
293
294 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
295
296 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
297 reflect the change to the short immediate syntax.
298
299 2004-11-19 Alan Modra <amodra@bigpond.net.au>
300
301 * or32-opc.c (debug): Warning fix.
302 * po/POTFILES.in: Regenerate.
303
304 * maxq-dis.c: Formatting.
305 (print_insn): Warning fix.
306
307 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
308
309 * arm-dis.c (WORD_ADDRESS): Define.
310 (print_insn): Use it. Correct big-endian end-of-section handling.
311
312 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
313 Vineet Sharma <vineets@noida.hcltech.com>
314
315 * maxq-dis.c: New file.
316 * disassemble.c (ARCH_maxq): Define.
317 (disassembler): Add 'print_insn_maxq_little' for handling maxq
318 instructions..
319 * configure.in: Add case for bfd_maxq_arch.
320 * configure: Regenerate.
321 * Makefile.am: Add support for maxq-dis.c
322 * Makefile.in: Regenerate.
323 * aclocal.m4: Regenerate.
324
325 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
326
327 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
328 mode.
329 * crx-dis.c: Likewise.
330
331 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
332
333 Generally, handle CRISv32.
334 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
335 (struct cris_disasm_data): New type.
336 (format_reg, format_hex, cris_constraint, print_flags)
337 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
338 callers changed.
339 (format_sup_reg, print_insn_crisv32_with_register_prefix)
340 (print_insn_crisv32_without_register_prefix)
341 (print_insn_crisv10_v32_with_register_prefix)
342 (print_insn_crisv10_v32_without_register_prefix)
343 (cris_parse_disassembler_options): New functions.
344 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
345 parameter. All callers changed.
346 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
347 failure.
348 (cris_constraint) <case 'Y', 'U'>: New cases.
349 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
350 for constraint 'n'.
351 (print_with_operands) <case 'Y'>: New case.
352 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
353 <case 'N', 'Y', 'Q'>: New cases.
354 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
355 (print_insn_cris_with_register_prefix)
356 (print_insn_cris_without_register_prefix): Call
357 cris_parse_disassembler_options.
358 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
359 for CRISv32 and the size of immediate operands. New v32-only
360 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
361 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
362 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
363 Change brp to be v3..v10.
364 (cris_support_regs): New vector.
365 (cris_opcodes): Update head comment. New format characters '[',
366 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
367 Add new opcodes for v32 and adjust existing opcodes to accommodate
368 differences to earlier variants.
369 (cris_cond15s): New vector.
370
371 2004-11-04 Jan Beulich <jbeulich@novell.com>
372
373 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
374 (indirEb): Remove.
375 (Mp): Use f_mode rather than none at all.
376 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
377 replaces what previously was x_mode; x_mode now means 128-bit SSE
378 operands.
379 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
380 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
381 pinsrw's second operand is Edqw.
382 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
383 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
384 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
385 mode when an operand size override is present or always suffixing.
386 More instructions will need to be added to this group.
387 (putop): Handle new macro chars 'C' (short/long suffix selector),
388 'I' (Intel mode override for following macro char), and 'J' (for
389 adding the 'l' prefix to far branches in AT&T mode). When an
390 alternative was specified in the template, honor macro character when
391 specified for Intel mode.
392 (OP_E): Handle new *_mode values. Correct pointer specifications for
393 memory operands. Consolidate output of index register.
394 (OP_G): Handle new *_mode values.
395 (OP_I): Handle const_1_mode.
396 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
397 respective opcode prefix bits have been consumed.
398 (OP_EM, OP_EX): Provide some default handling for generating pointer
399 specifications.
400
401 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
402
403 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
404 COP_INST macro.
405
406 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
407
408 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
409 (getregliststring): Support HI/LO and user registers.
410 * crx-opc.c (crx_instruction): Update data structure according to the
411 rearrangement done in CRX opcode header file.
412 (crx_regtab): Likewise.
413 (crx_optab): Likewise.
414 (crx_instruction): Reorder load/stor instructions, remove unsupported
415 formats.
416 support new Co-Processor instruction 'cpi'.
417
418 2004-10-27 Nick Clifton <nickc@redhat.com>
419
420 * opcodes/iq2000-asm.c: Regenerate.
421 * opcodes/iq2000-desc.c: Regenerate.
422 * opcodes/iq2000-desc.h: Regenerate.
423 * opcodes/iq2000-dis.c: Regenerate.
424 * opcodes/iq2000-ibld.c: Regenerate.
425 * opcodes/iq2000-opc.c: Regenerate.
426 * opcodes/iq2000-opc.h: Regenerate.
427
428 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
429
430 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
431 us4, us5 (respectively).
432 Remove unsupported 'popa' instruction.
433 Reverse operands order in store co-processor instructions.
434
435 2004-10-15 Alan Modra <amodra@bigpond.net.au>
436
437 * Makefile.am: Run "make dep-am"
438 * Makefile.in: Regenerate.
439
440 2004-10-12 Bob Wilson <bob.wilson@acm.org>
441
442 * xtensa-dis.c: Use ISO C90 formatting.
443
444 2004-10-09 Alan Modra <amodra@bigpond.net.au>
445
446 * ppc-opc.c: Revert 2004-09-09 change.
447
448 2004-10-07 Bob Wilson <bob.wilson@acm.org>
449
450 * xtensa-dis.c (state_names): Delete.
451 (fetch_data): Use xtensa_isa_maxlength.
452 (print_xtensa_operand): Replace operand parameter with opcode/operand
453 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
454 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
455 instruction bundles. Use xmalloc instead of malloc.
456
457 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
458
459 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
460 initializers.
461
462 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
463
464 * crx-opc.c (crx_instruction): Support Co-processor insns.
465 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
466 (getregliststring): Change function to use the above enum.
467 (print_arg): Handle CO-Processor insns.
468 (crx_cinvs): Add 'b' option to invalidate the branch-target
469 cache.
470
471 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
472
473 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
474 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
475 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
476 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
477 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
478
479 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
480
481 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
482 rather than add it.
483
484 2004-09-30 Paul Brook <paul@codesourcery.com>
485
486 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
487 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
488
489 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
490
491 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
492 (CONFIG_STATUS_DEPENDENCIES): New.
493 (Makefile): Removed.
494 (config.status): Likewise.
495 * Makefile.in: Regenerated.
496
497 2004-09-17 Alan Modra <amodra@bigpond.net.au>
498
499 * Makefile.am: Run "make dep-am".
500 * Makefile.in: Regenerate.
501 * aclocal.m4: Regenerate.
502 * configure: Regenerate.
503 * po/POTFILES.in: Regenerate.
504 * po/opcodes.pot: Regenerate.
505
506 2004-09-11 Andreas Schwab <schwab@suse.de>
507
508 * configure: Rebuild.
509
510 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
511
512 * ppc-opc.c (L): Make this field not optional.
513
514 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
515
516 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
517 Fix parameter to 'm[t|f]csr' insns.
518
519 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
520
521 * configure.in: Autoupdate to autoconf 2.59.
522 * aclocal.m4: Rebuild with aclocal 1.4p6.
523 * configure: Rebuild with autoconf 2.59.
524 * Makefile.in: Rebuild with automake 1.4p6 (picking up
525 bfd changes for autoconf 2.59 on the way).
526 * config.in: Rebuild with autoheader 2.59.
527
528 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
529
530 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
531
532 2004-07-30 Michal Ludvig <mludvig@suse.cz>
533
534 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
535 (GRPPADLCK2): New define.
536 (twobyte_has_modrm): True for 0xA6.
537 (grps): GRPPADLCK2 for opcode 0xA6.
538
539 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
540
541 Introduce SH2a support.
542 * sh-opc.h (arch_sh2a_base): Renumber.
543 (arch_sh2a_nofpu_base): Remove.
544 (arch_sh_base_mask): Adjust.
545 (arch_opann_mask): New.
546 (arch_sh2a, arch_sh2a_nofpu): Adjust.
547 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
548 (sh_table): Adjust whitespace.
549 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
550 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
551 instruction list throughout.
552 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
553 of arch_sh2a in instruction list throughout.
554 (arch_sh2e_up): Accomodate above changes.
555 (arch_sh2_up): Ditto.
556 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
557 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
558 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
559 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
560 * sh-opc.h (arch_sh2a_nofpu): New.
561 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
562 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
563 instruction.
564 2004-01-20 DJ Delorie <dj@redhat.com>
565 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
566 2003-12-29 DJ Delorie <dj@redhat.com>
567 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
568 sh_opcode_info, sh_table): Add sh2a support.
569 (arch_op32): New, to tag 32-bit opcodes.
570 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
571 2003-12-02 Michael Snyder <msnyder@redhat.com>
572 * sh-opc.h (arch_sh2a): Add.
573 * sh-dis.c (arch_sh2a): Handle.
574 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
575
576 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
577
578 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
579
580 2004-07-22 Nick Clifton <nickc@redhat.com>
581
582 PR/280
583 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
584 insns - this is done by objdump itself.
585 * h8500-dis.c (print_insn_h8500): Likewise.
586
587 2004-07-21 Jan Beulich <jbeulich@novell.com>
588
589 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
590 regardless of address size prefix in effect.
591 (ptr_reg): Size or address registers does not depend on rex64, but
592 on the presence of an address size override.
593 (OP_MMX): Use rex.x only for xmm registers.
594 (OP_EM): Use rex.z only for xmm registers.
595
596 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
597
598 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
599 move/branch operations to the bottom so that VR5400 multimedia
600 instructions take precedence in disassembly.
601
602 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
603
604 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
605 ISA-specific "break" encoding.
606
607 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
608
609 * arm-opc.h: Fix typo in comment.
610
611 2004-07-11 Andreas Schwab <schwab@suse.de>
612
613 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
614
615 2004-07-09 Andreas Schwab <schwab@suse.de>
616
617 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
618
619 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
620
621 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
622 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
623 (crx-dis.lo): New target.
624 (crx-opc.lo): Likewise.
625 * Makefile.in: Regenerate.
626 * configure.in: Handle bfd_crx_arch.
627 * configure: Regenerate.
628 * crx-dis.c: New file.
629 * crx-opc.c: New file.
630 * disassemble.c (ARCH_crx): Define.
631 (disassembler): Handle ARCH_crx.
632
633 2004-06-29 James E Wilson <wilson@specifixinc.com>
634
635 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
636 * ia64-asmtab.c: Regnerate.
637
638 2004-06-28 Alan Modra <amodra@bigpond.net.au>
639
640 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
641 (extract_fxm): Don't test dialect.
642 (XFXFXM_MASK): Include the power4 bit.
643 (XFXM): Add p4 param.
644 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
645
646 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
647
648 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
649 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
650
651 2004-06-26 Alan Modra <amodra@bigpond.net.au>
652
653 * ppc-opc.c (BH, XLBH_MASK): Define.
654 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
655
656 2004-06-24 Alan Modra <amodra@bigpond.net.au>
657
658 * i386-dis.c (x_mode): Comment.
659 (two_source_ops): File scope.
660 (float_mem): Correct fisttpll and fistpll.
661 (float_mem_mode): New table.
662 (dofloat): Use it.
663 (OP_E): Correct intel mode PTR output.
664 (ptr_reg): Use open_char and close_char.
665 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
666 operands. Set two_source_ops.
667
668 2004-06-15 Alan Modra <amodra@bigpond.net.au>
669
670 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
671 instead of _raw_size.
672
673 2004-06-08 Jakub Jelinek <jakub@redhat.com>
674
675 * ia64-gen.c (in_iclass): Handle more postinc st
676 and ld variants.
677 * ia64-asmtab.c: Rebuilt.
678
679 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
680
681 * s390-opc.txt: Correct architecture mask for some opcodes.
682 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
683 in the esa mode as well.
684
685 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
686
687 * sh-dis.c (target_arch): Make unsigned.
688 (print_insn_sh): Replace (most of) switch with a call to
689 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
690 * sh-opc.h: Redefine architecture flags values.
691 Add sh3-nommu architecture.
692 Reorganise <arch>_up macros so they make more visual sense.
693 (SH_MERGE_ARCH_SET): Define new macro.
694 (SH_VALID_BASE_ARCH_SET): Likewise.
695 (SH_VALID_MMU_ARCH_SET): Likewise.
696 (SH_VALID_CO_ARCH_SET): Likewise.
697 (SH_VALID_ARCH_SET): Likewise.
698 (SH_MERGE_ARCH_SET_VALID): Likewise.
699 (SH_ARCH_SET_HAS_FPU): Likewise.
700 (SH_ARCH_SET_HAS_DSP): Likewise.
701 (SH_ARCH_UNKNOWN_ARCH): Likewise.
702 (sh_get_arch_from_bfd_mach): Add prototype.
703 (sh_get_arch_up_from_bfd_mach): Likewise.
704 (sh_get_bfd_mach_from_arch_set): Likewise.
705 (sh_merge_bfd_arc): Likewise.
706
707 2004-05-24 Peter Barada <peter@the-baradas.com>
708
709 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
710 into new match_insn_m68k function. Loop over canidate
711 matches and select first that completely matches.
712 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
713 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
714 to verify addressing for MAC/EMAC.
715 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
716 reigster halves since 'fpu' and 'spl' look misleading.
717 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
718 * m68k-opc.c: Rearragne mac/emac cases to use longest for
719 first, tighten up match masks.
720 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
721 'size' from special case code in print_insn_m68k to
722 determine decode size of insns.
723
724 2004-05-19 Alan Modra <amodra@bigpond.net.au>
725
726 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
727 well as when -mpower4.
728
729 2004-05-13 Nick Clifton <nickc@redhat.com>
730
731 * po/fr.po: Updated French translation.
732
733 2004-05-05 Peter Barada <peter@the-baradas.com>
734
735 * m68k-dis.c(print_insn_m68k): Add new chips, use core
736 variants in arch_mask. Only set m68881/68851 for 68k chips.
737 * m68k-op.c: Switch from ColdFire chips to core variants.
738
739 2004-05-05 Alan Modra <amodra@bigpond.net.au>
740
741 PR 147.
742 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
743
744 2004-04-29 Ben Elliston <bje@au.ibm.com>
745
746 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
747 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
748
749 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
750
751 * sh-dis.c (print_insn_sh): Print the value in constant pool
752 as a symbol if it looks like a symbol.
753
754 2004-04-22 Peter Barada <peter@the-baradas.com>
755
756 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
757 appropriate ColdFire architectures.
758 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
759 mask addressing.
760 Add EMAC instructions, fix MAC instructions. Remove
761 macmw/macml/msacmw/msacml instructions since mask addressing now
762 supported.
763
764 2004-04-20 Jakub Jelinek <jakub@redhat.com>
765
766 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
767 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
768 suffix. Use fmov*x macros, create all 3 fpsize variants in one
769 macro. Adjust all users.
770
771 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
772
773 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
774 separately.
775
776 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
777
778 * m32r-asm.c: Regenerate.
779
780 2004-03-29 Stan Shebs <shebs@apple.com>
781
782 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
783 used.
784
785 2004-03-19 Alan Modra <amodra@bigpond.net.au>
786
787 * aclocal.m4: Regenerate.
788 * config.in: Regenerate.
789 * configure: Regenerate.
790 * po/POTFILES.in: Regenerate.
791 * po/opcodes.pot: Regenerate.
792
793 2004-03-16 Alan Modra <amodra@bigpond.net.au>
794
795 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
796 PPC_OPERANDS_GPR_0.
797 * ppc-opc.c (RA0): Define.
798 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
799 (RAOPT): Rename from RAO. Update all uses.
800 (powerpc_opcodes): Use RA0 as appropriate.
801
802 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
803
804 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
805
806 2004-03-15 Alan Modra <amodra@bigpond.net.au>
807
808 * sparc-dis.c (print_insn_sparc): Update getword prototype.
809
810 2004-03-12 Michal Ludvig <mludvig@suse.cz>
811
812 * i386-dis.c (GRPPLOCK): Delete.
813 (grps): Delete GRPPLOCK entry.
814
815 2004-03-12 Alan Modra <amodra@bigpond.net.au>
816
817 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
818 (M, Mp): Use OP_M.
819 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
820 (GRPPADLCK): Define.
821 (dis386): Use NOP_Fixup on "nop".
822 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
823 (twobyte_has_modrm): Set for 0xa7.
824 (padlock_table): Delete. Move to..
825 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
826 and clflush.
827 (print_insn): Revert PADLOCK_SPECIAL code.
828 (OP_E): Delete sfence, lfence, mfence checks.
829
830 2004-03-12 Jakub Jelinek <jakub@redhat.com>
831
832 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
833 (INVLPG_Fixup): New function.
834 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
835
836 2004-03-12 Michal Ludvig <mludvig@suse.cz>
837
838 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
839 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
840 (padlock_table): New struct with PadLock instructions.
841 (print_insn): Handle PADLOCK_SPECIAL.
842
843 2004-03-12 Alan Modra <amodra@bigpond.net.au>
844
845 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
846 (OP_E): Twiddle clflush to sfence here.
847
848 2004-03-08 Nick Clifton <nickc@redhat.com>
849
850 * po/de.po: Updated German translation.
851
852 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
853
854 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
855 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
856 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
857 accordingly.
858
859 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
860
861 * frv-asm.c: Regenerate.
862 * frv-desc.c: Regenerate.
863 * frv-desc.h: Regenerate.
864 * frv-dis.c: Regenerate.
865 * frv-ibld.c: Regenerate.
866 * frv-opc.c: Regenerate.
867 * frv-opc.h: Regenerate.
868
869 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
870
871 * frv-desc.c, frv-opc.c: Regenerate.
872
873 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
874
875 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
876
877 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
878
879 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
880 Also correct mistake in the comment.
881
882 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
883
884 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
885 ensure that double registers have even numbers.
886 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
887 that reserved instruction 0xfffd does not decode the same
888 as 0xfdfd (ftrv).
889 * sh-opc.h: Add REG_N_D nibble type and use it whereever
890 REG_N refers to a double register.
891 Add REG_N_B01 nibble type and use it instead of REG_NM
892 in ftrv.
893 Adjust the bit patterns in a few comments.
894
895 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
896
897 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
898
899 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
900
901 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
902
903 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
904
905 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
906
907 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
908
909 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
910 mtivor32, mtivor33, mtivor34.
911
912 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
913
914 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
915
916 2004-02-10 Petko Manolov <petkan@nucleusys.com>
917
918 * arm-opc.h Maverick accumulator register opcode fixes.
919
920 2004-02-13 Ben Elliston <bje@wasabisystems.com>
921
922 * m32r-dis.c: Regenerate.
923
924 2004-01-27 Michael Snyder <msnyder@redhat.com>
925
926 * sh-opc.h (sh_table): "fsrra", not "fssra".
927
928 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
929
930 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
931 contraints.
932
933 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
934
935 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
936
937 2004-01-19 Alan Modra <amodra@bigpond.net.au>
938
939 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
940 1. Don't print scale factor on AT&T mode when index missing.
941
942 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
943
944 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
945 when loaded into XR registers.
946
947 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
948
949 * frv-desc.h: Regenerate.
950 * frv-desc.c: Regenerate.
951 * frv-opc.c: Regenerate.
952
953 2004-01-13 Michael Snyder <msnyder@redhat.com>
954
955 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
956
957 2004-01-09 Paul Brook <paul@codesourcery.com>
958
959 * arm-opc.h (arm_opcodes): Move generic mcrr after known
960 specific opcodes.
961
962 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
963
964 * Makefile.am (libopcodes_la_DEPENDENCIES)
965 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
966 comment about the problem.
967 * Makefile.in: Regenerate.
968
969 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
970
971 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
972 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
973 cut&paste errors in shifting/truncating numerical operands.
974 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
975 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
976 (parse_uslo16): Likewise.
977 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
978 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
979 (parse_s12): Likewise.
980 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
981 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
982 (parse_uslo16): Likewise.
983 (parse_uhi16): Parse gothi and gotfuncdeschi.
984 (parse_d12): Parse got12 and gotfuncdesc12.
985 (parse_s12): Likewise.
986
987 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
988
989 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
990 instruction which looks similar to an 'rla' instruction.
991
992 For older changes see ChangeLog-0203
993 \f
994 Local Variables:
995 mode: change-log
996 left-margin: 8
997 fill-column: 74
998 version-control: never
999 End:
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