opcodes/ChangeLog

   1 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         PR 843
   4         * i386-dis.c (branch_v_mode): New.
   5         (indirEv): Use branch_v_mode instead of v_mode.
   6         (OP_E): Handle branch_v_mode.
   7
   8 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
   9
  10         * d10v-dis.c (dis_2_short): Support 64bit host.
  11
  12 2005-05-07  Nick Clifton  <nickc@redhat.com>
  13
  14         * po/nl.po: Updated translation.
  15
  16 2005-05-07  Nick Clifton  <nickc@redhat.com>
  17
  18         * Update the address and phone number of the FSF organization in
  19         the GPL notices in the following files:
  20         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
  21         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
  22         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
  23         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
  24         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
  25         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
  26         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
  27         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
  28         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
  29         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
  30         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
  31         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
  32         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
  33         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
  34         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
  35         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
  36         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
  37         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
  38         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
  39         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
  40         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
  41         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
  42         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
  43         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
  44         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
  45         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
  46         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
  47         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
  48         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
  49         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
  50         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
  51         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
  52         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
  53
  54 2005-05-05  James E Wilson  <wilson@specifixinc.com>
  55
  56         * ia64-opc.c: Include sysdep.h before libiberty.h.
  57
  58 2005-05-05  Nick Clifton  <nickc@redhat.com>
  59
  60         * configure.in (ALL_LINGUAS): Add vi.
  61         * configure: Regenerate.
  62         * po/vi.po: New.
  63
  64 2005-04-26  Jerome Guitton  <guitton@gnat.com>
  65
  66         * configure.in: Fix the check for basename declaration.
  67         * configure: Regenerate.
  68
  69 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
  70
  71         * ppc-opc.c (RTO): Define.
  72         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
  73         entries to suit PPC440.
  74
  75 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
  76
  77         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
  78         Add xcrypt-ctr.
  79
  80 2005-04-14  Nick Clifton  <nickc@redhat.com>
  81
  82         * po/fi.po: New translation: Finnish.
  83         * configure.in (ALL_LINGUAS): Add fi.
  84         * configure: Regenerate.
  85
  86 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
  87
  88         * Makefile.am (NO_WERROR): Define.
  89         * configure.in: Invoke AM_BINUTILS_WARNINGS.
  90         * Makefile.in: Regenerate.
  91         * aclocal.m4: Regenerate.
  92         * configure: Regenerate.
  93
  94 2005-04-04  Nick Clifton  <nickc@redhat.com>
  95
  96         * fr30-asm.c: Regenerate.
  97         * frv-asm.c: Regenerate.
  98         * iq2000-asm.c: Regenerate.
  99         * m32r-asm.c: Regenerate.
 100         * openrisc-asm.c: Regenerate.
 101
 102 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 103
 104         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 105         visible operands in Intel mode. The first operand of monitor is
 106         %rax in 64-bit mode.
 107
 108 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 109
 110         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 111         easier future additions.
 112
 113 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 114
 115         * configure.in: Check for basename.
 116         * configure: Regenerate.
 117         * config.in: Ditto.
 118
 119 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 120
 121         * i386-dis.c (SEG_Fixup): New.
 122         (Sv): New.
 123         (dis386): Use "Sv" for 0x8c and 0x8e.
 124
 125 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 126             Nick Clifton  <nickc@redhat.com>
 127
 128         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 129         function entry mask addresses.
 130         (entry_addr_occupied_slots): New variable: The number of occupied
 131         elements in entry_addr.
 132         (entry_addr_total_slots): New variable: The total number of
 133         elements in entry_addr.
 134         (parse_disassembler_options): New function.  Fills in the entry_addr
 135         array.
 136         (free_entry_array): New function.  Release the memory used by the
 137         entry addr array.  Suppressed because there is no way to call it.
 138         (is_function_entry): Check if a given address is a function's
 139         start address by looking at supplied entry mask addresses and
 140         symbol information, if available.
 141         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 142
 143 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 144
 145         * cris-dis.c (print_with_operands): Use ~31L for long instead
 146         of ~31.
 147
 148 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 149
 150         * mmix-opc.c (O): Revert the last change.
 151         (Z): Likewise.
 152
 153 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 154
 155         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 156         (Z): Likewise.
 157
 158 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 159
 160         * mmix-opc.c (O, Z): Force expression as unsigned long.
 161
 162 2005-03-18  Nick Clifton  <nickc@redhat.com>
 163
 164         * ip2k-asm.c: Regenerate.
 165         * op/opcodes.pot: Regenerate.
 166
 167 2005-03-16  Nick Clifton  <nickc@redhat.com>
 168             Ben Elliston  <bje@au.ibm.com>
 169
 170         * configure.in (werror): New switch: Add -Werror to the
 171         compiler command line.  Enabled by default.  Disable via
 172         --disable-werror.
 173         * configure: Regenerate.
 174
 175 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 176
 177         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 178         BOOKE.
 179
 180 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 181
 182         * po/es.po: Commit new Spanish translation.
 183
 184         * po/fr.po: Commit new French translation.
 185
 186 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 187
 188         * vax-dis.c: Fix spelling error
 189         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 190         of just "Entry mask: < r1 ... >"
 191
 192 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 193
 194         * arm-dis.c (arm_opcodes): Document %E and %V.
 195         Add entries for v6T2 ARM instructions:
 196         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 197         (print_insn_arm): Add support for %E and %V.
 198         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 199
 200 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 201             Alan Modra  <amodra@bigpond.net.au>
 202
 203         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 204         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 205         (SPRG_MASK): Delete.
 206         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 207         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 208         mfsprg4..7 after msprg and consolidate.
 209
 210 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 211
 212         * vax-dis.c (entry_mask_bit): New array.
 213         (print_insn_vax): Decode function entry mask.
 214
 215 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 216
 217         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 218
 219 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 220
 221         * po/opcodes.pot: Regenerate.
 222
 223 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 224
 225         * arc-dis.c (a4_decoding_class): New enum.
 226         (dsmOneArcInst): Use the enum values for the decoding class.
 227         Remove redundant case in the switch for decodingClass value 11.
 228
 229 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 230
 231         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 232         accesses.
 233         (OP_C): Consider lock prefix in non-64-bit modes.
 234
 235 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 236
 237         * cris-dis.c (format_hex): Remove ineffective warning fix.
 238         * crx-dis.c (make_instruction): Warning fix.
 239         * frv-asm.c: Regenerate.
 240
 241 2005-02-23  Nick Clifton  <nickc@redhat.com>
 242
 243         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 244         read_memory.
 245
 246         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 247
 248         * crx-dis.c (make_instruction): Move argument structure into inner
 249         scope and ensure that all of its fields are initialised before
 250         they are used.
 251
 252         * fr30-asm.c: Regenerate.
 253         * fr30-dis.c: Regenerate.
 254         * frv-asm.c: Regenerate.
 255         * frv-dis.c: Regenerate.
 256         * ip2k-asm.c: Regenerate.
 257         * ip2k-dis.c: Regenerate.
 258         * iq2000-asm.c: Regenerate.
 259         * iq2000-dis.c: Regenerate.
 260         * m32r-asm.c: Regenerate.
 261         * m32r-dis.c: Regenerate.
 262         * openrisc-asm.c: Regenerate.
 263         * openrisc-dis.c: Regenerate.
 264         * xstormy16-asm.c: Regenerate.
 265         * xstormy16-dis.c: Regenerate.
 266
 267 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 268
 269         * arc-ext.c: Warning fixes.
 270         * arc-ext.h: Likewise.
 271         * cgen-opc.c: Likewise.
 272         * ia64-gen.c: Likewise.
 273         * maxq-dis.c: Likewise.
 274         * ns32k-dis.c: Likewise.
 275         * w65-dis.c: Likewise.
 276         * ia64-asmtab.c: Regenerate.
 277
 278 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 279
 280         * fr30-desc.c: Regenerate.
 281         * fr30-desc.h: Regenerate.
 282         * fr30-opc.c: Regenerate.
 283         * fr30-opc.h: Regenerate.
 284         * frv-desc.c: Regenerate.
 285         * frv-desc.h: Regenerate.
 286         * frv-opc.c: Regenerate.
 287         * frv-opc.h: Regenerate.
 288         * ip2k-desc.c: Regenerate.
 289         * ip2k-desc.h: Regenerate.
 290         * ip2k-opc.c: Regenerate.
 291         * ip2k-opc.h: Regenerate.
 292         * iq2000-desc.c: Regenerate.
 293         * iq2000-desc.h: Regenerate.
 294         * iq2000-opc.c: Regenerate.
 295         * iq2000-opc.h: Regenerate.
 296         * m32r-desc.c: Regenerate.
 297         * m32r-desc.h: Regenerate.
 298         * m32r-opc.c: Regenerate.
 299         * m32r-opc.h: Regenerate.
 300         * m32r-opinst.c: Regenerate.
 301         * openrisc-desc.c: Regenerate.
 302         * openrisc-desc.h: Regenerate.
 303         * openrisc-opc.c: Regenerate.
 304         * openrisc-opc.h: Regenerate.
 305         * xstormy16-desc.c: Regenerate.
 306         * xstormy16-desc.h: Regenerate.
 307         * xstormy16-opc.c: Regenerate.
 308         * xstormy16-opc.h: Regenerate.
 309
 310 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 311
 312         * Makefile.am: Run "make dep-am"
 313         * Makefile.in: Regenerate.
 314
 315 2005-02-15  Nick Clifton  <nickc@redhat.com>
 316
 317         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 318         compile time warnings.
 319         (print_keyword): Likewise.
 320         (default_print_insn): Likewise.
 321
 322         * fr30-desc.c: Regenerated.
 323         * fr30-desc.h: Regenerated.
 324         * fr30-dis.c: Regenerated.
 325         * fr30-opc.c: Regenerated.
 326         * fr30-opc.h: Regenerated.
 327         * frv-desc.c: Regenerated.
 328         * frv-dis.c: Regenerated.
 329         * frv-opc.c: Regenerated.
 330         * ip2k-asm.c: Regenerated.
 331         * ip2k-desc.c: Regenerated.
 332         * ip2k-desc.h: Regenerated.
 333         * ip2k-dis.c: Regenerated.
 334         * ip2k-opc.c: Regenerated.
 335         * ip2k-opc.h: Regenerated.
 336         * iq2000-desc.c: Regenerated.
 337         * iq2000-dis.c: Regenerated.
 338         * iq2000-opc.c: Regenerated.
 339         * m32r-asm.c: Regenerated.
 340         * m32r-desc.c: Regenerated.
 341         * m32r-desc.h: Regenerated.
 342         * m32r-dis.c: Regenerated.
 343         * m32r-opc.c: Regenerated.
 344         * m32r-opc.h: Regenerated.
 345         * m32r-opinst.c: Regenerated.
 346         * openrisc-desc.c: Regenerated.
 347         * openrisc-desc.h: Regenerated.
 348         * openrisc-dis.c: Regenerated.
 349         * openrisc-opc.c: Regenerated.
 350         * openrisc-opc.h: Regenerated.
 351         * xstormy16-desc.c: Regenerated.
 352         * xstormy16-desc.h: Regenerated.
 353         * xstormy16-dis.c: Regenerated.
 354         * xstormy16-opc.c: Regenerated.
 355         * xstormy16-opc.h: Regenerated.
 356
 357 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 358
 359         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 360         address.
 361
 362 2005-02-11  Nick Clifton  <nickc@redhat.com>
 363
 364         * iq2000-asm.c: Regenerate.
 365
 366         * frv-dis.c: Regenerate.
 367
 368 2005-02-07  Jim Blandy  <jimb@redhat.com>
 369
 370         * Makefile.am (CGEN): Load guile.scm before calling the main
 371         application script.
 372         * Makefile.in: Regenerated.
 373         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 374         Simply pass the cgen-opc.scm path to ${cgen} as its first
 375         argument; ${cgen} itself now contains the '-s', or whatever is
 376         appropriate for the Scheme being used.
 377
 378 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 379
 380         * configure: Regenerate to track ../gettext.m4.
 381
 382 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 383
 384         * ia64-gen.c (NELEMS): Define.
 385         (shrink): Generate alias with missing second predicate register when
 386         opcode has two outputs and these are both predicates.
 387         * ia64-opc-i.c (FULL17): Define.
 388         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 389         here to generate output template.
 390         (TBITCM, TNATCM): Undefine after use.
 391         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 392         first input. Add ld16 aliases without ar.csd as second output. Add
 393         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 394         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 395         ar.ccv as third/fourth inputs. Consolidate through...
 396         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 397         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 398         * ia64-asmtab.c: Regenerate.
 399
 400 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 401
 402         * configure: Regenerate to track ../gettext.m4 change.
 403
 404 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 405
 406         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 407         * frv-asm.c: Rebuilt.
 408         * frv-desc.c: Rebuilt.
 409         * frv-desc.h: Rebuilt.
 410         * frv-dis.c: Rebuilt.
 411         * frv-ibld.c: Rebuilt.
 412         * frv-opc.c: Rebuilt.
 413         * frv-opc.h: Rebuilt.
 414
 415 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 416
 417         * configure: Regenerate, ../gettext.m4 was updated.
 418
 419 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 420
 421         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 422         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 423         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 424         * mips-dis.c: Ditto.
 425
 426 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 427
 428         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 429
 430 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 431
 432         * mips-dis.c (no_aliases): New disassembly option flag.
 433         (set_default_mips_dis_options): Init no_aliases to zero.
 434         (parse_mips_dis_option): Handle no-aliases option.
 435         (print_insn_mips): Ignore table entries that are aliases
 436         if no_aliases is set.
 437         (print_insn_mips16): Ditto.
 438         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 439         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 440         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 441         * mips16-opc.c (mips16_opcodes): Ditto.
 442
 443 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 444
 445         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 446         (inheritance diagram): Add missing edge.
 447         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 448         easier for the testsuite.
 449         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 450         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 451         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 452         arch_sh2a_or_sh4_up child.
 453         (sh_table): Do renaming as above.
 454         Correct comment for ldc.l for gas testsuite to read.
 455         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 456         Correct comments for movy.w and movy.l for gas testsuite to read.
 457         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 458
 459 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 460
 461         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 462
 463 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 464
 465         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 466
 467 2005-01-10  Andreas Schwab  <schwab@suse.de>
 468
 469         * disassemble.c (disassemble_init_for_target) <case
 470         bfd_arch_ia64>: Set skip_zeroes to 16.
 471         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 472
 473 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 474
 475         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 476
 477 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 478
 479         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 480         memory references. Convert avr_operand() to C90 formatting.
 481
 482 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 483
 484         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 485
 486 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 487
 488         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 489         (no_op_insn): Initialize array with instructions that have no
 490         operands.
 491         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 492
 493 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 494
 495         * arm-dis.c: Correct top-level comment.
 496
 497 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 498
 499         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 500         architecuture defining the insn.
 501         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 502         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 503         field.
 504         Also include opcode/arm.h.
 505         * Makefile.am (arm-dis.lo): Update dependency list.
 506         * Makefile.in: Regenerate.
 507
 508 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 509
 510         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 511         reflect the change to the short immediate syntax.
 512
 513 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 514
 515         * or32-opc.c (debug): Warning fix.
 516         * po/POTFILES.in: Regenerate.
 517
 518         * maxq-dis.c: Formatting.
 519         (print_insn): Warning fix.
 520
 521 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 522
 523         * arm-dis.c (WORD_ADDRESS): Define.
 524         (print_insn): Use it.  Correct big-endian end-of-section handling.
 525
 526 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 527             Vineet Sharma      <vineets@noida.hcltech.com>
 528
 529         * maxq-dis.c: New file.
 530         * disassemble.c (ARCH_maxq): Define.
 531         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 532         instructions..
 533         * configure.in: Add case for bfd_maxq_arch.
 534         * configure: Regenerate.
 535         * Makefile.am: Add support for maxq-dis.c
 536         * Makefile.in: Regenerate.
 537         * aclocal.m4: Regenerate.
 538
 539 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 540
 541         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 542         mode.
 543         * crx-dis.c: Likewise.
 544
 545 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 546
 547         Generally, handle CRISv32.
 548         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 549         (struct cris_disasm_data): New type.
 550         (format_reg, format_hex, cris_constraint, print_flags)
 551         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 552         callers changed.
 553         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 554         (print_insn_crisv32_without_register_prefix)
 555         (print_insn_crisv10_v32_with_register_prefix)
 556         (print_insn_crisv10_v32_without_register_prefix)
 557         (cris_parse_disassembler_options): New functions.
 558         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 559         parameter.  All callers changed.
 560         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 561         failure.
 562         (cris_constraint) <case 'Y', 'U'>: New cases.
 563         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 564         for constraint 'n'.
 565         (print_with_operands) <case 'Y'>: New case.
 566         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 567         <case 'N', 'Y', 'Q'>: New cases.
 568         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 569         (print_insn_cris_with_register_prefix)
 570         (print_insn_cris_without_register_prefix): Call
 571         cris_parse_disassembler_options.
 572         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 573         for CRISv32 and the size of immediate operands.  New v32-only
 574         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 575         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 576         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 577         Change brp to be v3..v10.
 578         (cris_support_regs): New vector.
 579         (cris_opcodes): Update head comment.  New format characters '[',
 580         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 581         Add new opcodes for v32 and adjust existing opcodes to accommodate
 582         differences to earlier variants.
 583         (cris_cond15s): New vector.
 584
 585 2004-11-04 Jan Beulich <jbeulich@novell.com>
 586
 587         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 588         (indirEb): Remove.
 589         (Mp): Use f_mode rather than none at all.
 590         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 591         replaces what previously was x_mode; x_mode now means 128-bit SSE
 592         operands.
 593         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 594         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 595         pinsrw's second operand is Edqw.
 596         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 597         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 598         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 599         mode when an operand size override is present or always suffixing.
 600         More instructions will need to be added to this group.
 601         (putop): Handle new macro chars 'C' (short/long suffix selector),
 602         'I' (Intel mode override for following macro char), and 'J' (for
 603         adding the 'l' prefix to far branches in AT&T mode). When an
 604         alternative was specified in the template, honor macro character when
 605         specified for Intel mode.
 606         (OP_E): Handle new *_mode values. Correct pointer specifications for
 607         memory operands. Consolidate output of index register.
 608         (OP_G): Handle new *_mode values.
 609         (OP_I): Handle const_1_mode.
 610         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 611         respective opcode prefix bits have been consumed.
 612         (OP_EM, OP_EX): Provide some default handling for generating pointer
 613         specifications.
 614
 615 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 616
 617         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 618         COP_INST macro.
 619
 620 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 621
 622         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 623         (getregliststring): Support HI/LO and user registers.
 624         * crx-opc.c (crx_instruction): Update data structure according to the
 625         rearrangement done in CRX opcode header file.
 626         (crx_regtab):  Likewise.
 627         (crx_optab):  Likewise.
 628         (crx_instruction): Reorder load/stor instructions, remove unsupported
 629         formats.
 630         support new Co-Processor instruction 'cpi'.
 631
 632 2004-10-27  Nick Clifton  <nickc@redhat.com>
 633
 634         * opcodes/iq2000-asm.c: Regenerate.
 635         * opcodes/iq2000-desc.c: Regenerate.
 636         * opcodes/iq2000-desc.h: Regenerate.
 637         * opcodes/iq2000-dis.c: Regenerate.
 638         * opcodes/iq2000-ibld.c: Regenerate.
 639         * opcodes/iq2000-opc.c: Regenerate.
 640         * opcodes/iq2000-opc.h: Regenerate.
 641
 642 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 643
 644         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 645         us4, us5 (respectively).
 646         Remove unsupported 'popa' instruction.
 647         Reverse operands order in store co-processor instructions.
 648
 649 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 650
 651         * Makefile.am: Run "make dep-am"
 652         * Makefile.in: Regenerate.
 653
 654 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 655
 656         * xtensa-dis.c: Use ISO C90 formatting.
 657
 658 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 659
 660         * ppc-opc.c: Revert 2004-09-09 change.
 661
 662 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 663
 664         * xtensa-dis.c (state_names): Delete.
 665         (fetch_data): Use xtensa_isa_maxlength.
 666         (print_xtensa_operand): Replace operand parameter with opcode/operand
 667         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 668         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 669         instruction bundles.  Use xmalloc instead of malloc.
 670
 671 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 672
 673         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 674         initializers.
 675
 676 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 677
 678         * crx-opc.c (crx_instruction): Support Co-processor insns.
 679         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 680         (getregliststring): Change function to use the above enum.
 681         (print_arg): Handle CO-Processor insns.
 682         (crx_cinvs): Add 'b' option to invalidate the branch-target
 683         cache.
 684
 685 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 686
 687         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 688         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 689         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 690         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 691         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 692
 693 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 694
 695         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 696         rather than add it.
 697
 698 2004-09-30  Paul Brook  <paul@codesourcery.com>
 699
 700         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 701         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 702
 703 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 704
 705         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 706         (CONFIG_STATUS_DEPENDENCIES): New.
 707         (Makefile): Removed.
 708         (config.status): Likewise.
 709         * Makefile.in: Regenerated.
 710
 711 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 712
 713         * Makefile.am: Run "make dep-am".
 714         * Makefile.in: Regenerate.
 715         * aclocal.m4: Regenerate.
 716         * configure: Regenerate.
 717         * po/POTFILES.in: Regenerate.
 718         * po/opcodes.pot: Regenerate.
 719
 720 2004-09-11  Andreas Schwab  <schwab@suse.de>
 721
 722         * configure: Rebuild.
 723
 724 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 725
 726         * ppc-opc.c (L): Make this field not optional.
 727
 728 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 729
 730         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 731         Fix parameter to 'm[t|f]csr' insns.
 732
 733 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 734
 735         * configure.in: Autoupdate to autoconf 2.59.
 736         * aclocal.m4: Rebuild with aclocal 1.4p6.
 737         * configure: Rebuild with autoconf 2.59.
 738         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 739         bfd changes for autoconf 2.59 on the way).
 740         * config.in: Rebuild with autoheader 2.59.
 741
 742 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 743
 744         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 745
 746 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 747
 748         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 749         (GRPPADLCK2): New define.
 750         (twobyte_has_modrm): True for 0xA6.
 751         (grps): GRPPADLCK2 for opcode 0xA6.
 752
 753 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 754
 755         Introduce SH2a support.
 756         * sh-opc.h (arch_sh2a_base): Renumber.
 757         (arch_sh2a_nofpu_base): Remove.
 758         (arch_sh_base_mask): Adjust.
 759         (arch_opann_mask): New.
 760         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 761         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 762         (sh_table): Adjust whitespace.
 763         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 764         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 765         instruction list throughout.
 766         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 767         of arch_sh2a in instruction list throughout.
 768         (arch_sh2e_up): Accomodate above changes.
 769         (arch_sh2_up): Ditto.
 770         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 771         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 772         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 773         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 774         * sh-opc.h (arch_sh2a_nofpu): New.
 775         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 776         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 777         instruction.
 778         2004-01-20  DJ Delorie  <dj@redhat.com>
 779         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 780         2003-12-29  DJ Delorie  <dj@redhat.com>
 781         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 782         sh_opcode_info, sh_table): Add sh2a support.
 783         (arch_op32): New, to tag 32-bit opcodes.
 784         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 785         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 786         * sh-opc.h (arch_sh2a): Add.
 787         * sh-dis.c (arch_sh2a): Handle.
 788         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 789
 790 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 791
 792         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 793
 794 2004-07-22  Nick Clifton  <nickc@redhat.com>
 795
 796         PR/280
 797         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 798         insns - this is done by objdump itself.
 799         * h8500-dis.c (print_insn_h8500): Likewise.
 800
 801 2004-07-21  Jan Beulich <jbeulich@novell.com>
 802
 803         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 804         regardless of address size prefix in effect.
 805         (ptr_reg): Size or address registers does not depend on rex64, but
 806         on the presence of an address size override.
 807         (OP_MMX): Use rex.x only for xmm registers.
 808         (OP_EM): Use rex.z only for xmm registers.
 809
 810 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 811
 812         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 813         move/branch operations to the bottom so that VR5400 multimedia
 814         instructions take precedence in disassembly.
 815
 816 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 817
 818         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 819         ISA-specific "break" encoding.
 820
 821 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 822
 823         * arm-opc.h: Fix typo in comment.
 824
 825 2004-07-11  Andreas Schwab  <schwab@suse.de>
 826
 827         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 828
 829 2004-07-09  Andreas Schwab  <schwab@suse.de>
 830
 831         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 832
 833 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 834
 835         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 836         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 837         (crx-dis.lo): New target.
 838         (crx-opc.lo): Likewise.
 839         * Makefile.in: Regenerate.
 840         * configure.in: Handle bfd_crx_arch.
 841         * configure: Regenerate.
 842         * crx-dis.c: New file.
 843         * crx-opc.c: New file.
 844         * disassemble.c (ARCH_crx): Define.
 845         (disassembler): Handle ARCH_crx.
 846
 847 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 848
 849         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 850         * ia64-asmtab.c: Regnerate.
 851
 852 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 853
 854         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 855         (extract_fxm): Don't test dialect.
 856         (XFXFXM_MASK): Include the power4 bit.
 857         (XFXM): Add p4 param.
 858         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 859
 860 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 861
 862         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 863         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 864
 865 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 866
 867         * ppc-opc.c (BH, XLBH_MASK): Define.
 868         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 869
 870 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 871
 872         * i386-dis.c (x_mode): Comment.
 873         (two_source_ops): File scope.
 874         (float_mem): Correct fisttpll and fistpll.
 875         (float_mem_mode): New table.
 876         (dofloat): Use it.
 877         (OP_E): Correct intel mode PTR output.
 878         (ptr_reg): Use open_char and close_char.
 879         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 880         operands.  Set two_source_ops.
 881
 882 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 883
 884         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 885         instead of _raw_size.
 886
 887 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 888
 889         * ia64-gen.c (in_iclass): Handle more postinc st
 890         and ld variants.
 891         * ia64-asmtab.c: Rebuilt.
 892
 893 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 894
 895         * s390-opc.txt: Correct architecture mask for some opcodes.
 896         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 897         in the esa mode as well.
 898
 899 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 900
 901         * sh-dis.c (target_arch): Make unsigned.
 902         (print_insn_sh): Replace (most of) switch with a call to
 903         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 904         * sh-opc.h: Redefine architecture flags values.
 905         Add sh3-nommu architecture.
 906         Reorganise <arch>_up macros so they make more visual sense.
 907         (SH_MERGE_ARCH_SET): Define new macro.
 908         (SH_VALID_BASE_ARCH_SET): Likewise.
 909         (SH_VALID_MMU_ARCH_SET): Likewise.
 910         (SH_VALID_CO_ARCH_SET): Likewise.
 911         (SH_VALID_ARCH_SET): Likewise.
 912         (SH_MERGE_ARCH_SET_VALID): Likewise.
 913         (SH_ARCH_SET_HAS_FPU): Likewise.
 914         (SH_ARCH_SET_HAS_DSP): Likewise.
 915         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 916         (sh_get_arch_from_bfd_mach): Add prototype.
 917         (sh_get_arch_up_from_bfd_mach): Likewise.
 918         (sh_get_bfd_mach_from_arch_set): Likewise.
 919         (sh_merge_bfd_arc): Likewise.
 920
 921 2004-05-24  Peter Barada  <peter@the-baradas.com>
 922
 923         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 924         into new match_insn_m68k function.  Loop over canidate
 925         matches and select first that completely matches.
 926         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 927         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 928         to verify addressing for MAC/EMAC.
 929         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 930         reigster halves since 'fpu' and 'spl' look misleading.
 931         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 932         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 933         first, tighten up match masks.
 934         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 935         'size' from special case code in print_insn_m68k to
 936         determine decode size of insns.
 937
 938 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 939
 940         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 941         well as when -mpower4.
 942
 943 2004-05-13  Nick Clifton  <nickc@redhat.com>
 944
 945         * po/fr.po: Updated French translation.
 946
 947 2004-05-05  Peter Barada  <peter@the-baradas.com>
 948
 949         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 950         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 951         * m68k-op.c: Switch from ColdFire chips to core variants.
 952
 953 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 954
 955         PR 147.
 956         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 957
 958 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 959
 960         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 961         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 962
 963 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 964
 965         * sh-dis.c (print_insn_sh): Print the value in constant pool
 966         as a symbol if it looks like a symbol.
 967
 968 2004-04-22  Peter Barada <peter@the-baradas.com>
 969
 970         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 971         appropriate ColdFire architectures.
 972         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 973         mask addressing.
 974         Add EMAC instructions, fix MAC instructions. Remove
 975         macmw/macml/msacmw/msacml instructions since mask addressing now
 976         supported.
 977
 978 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 979
 980         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 981         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 982         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 983         macro.  Adjust all users.
 984
 985 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 986
 987         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 988         separately.
 989
 990 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 991
 992         * m32r-asm.c: Regenerate.
 993
 994 2004-03-29  Stan Shebs  <shebs@apple.com>
 995
 996         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 997         used.
 998
 999 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1000
1001         * aclocal.m4: Regenerate.
1002         * config.in: Regenerate.
1003         * configure: Regenerate.
1004         * po/POTFILES.in: Regenerate.
1005         * po/opcodes.pot: Regenerate.
1006
1007 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1008
1009         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1010         PPC_OPERANDS_GPR_0.
1011         * ppc-opc.c (RA0): Define.
1012         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1013         (RAOPT): Rename from RAO.  Update all uses.
1014         (powerpc_opcodes): Use RA0 as appropriate.
1015
1016 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1017
1018         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1019
1020 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1021
1022         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1023
1024 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1025
1026         * i386-dis.c (GRPPLOCK): Delete.
1027         (grps): Delete GRPPLOCK entry.
1028
1029 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1030
1031         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1032         (M, Mp): Use OP_M.
1033         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1034         (GRPPADLCK): Define.
1035         (dis386): Use NOP_Fixup on "nop".
1036         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1037         (twobyte_has_modrm): Set for 0xa7.
1038         (padlock_table): Delete.  Move to..
1039         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1040         and clflush.
1041         (print_insn): Revert PADLOCK_SPECIAL code.
1042         (OP_E): Delete sfence, lfence, mfence checks.
1043
1044 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1045
1046         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1047         (INVLPG_Fixup): New function.
1048         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1049
1050 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1051
1052         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1053         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1054         (padlock_table): New struct with PadLock instructions.
1055         (print_insn): Handle PADLOCK_SPECIAL.
1056
1057 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1058
1059         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1060         (OP_E): Twiddle clflush to sfence here.
1061
1062 2004-03-08  Nick Clifton  <nickc@redhat.com>
1063
1064         * po/de.po: Updated German translation.
1065
1066 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1067
1068         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1069         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1070         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1071         accordingly.
1072
1073 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1074
1075         * frv-asm.c: Regenerate.
1076         * frv-desc.c: Regenerate.
1077         * frv-desc.h: Regenerate.
1078         * frv-dis.c: Regenerate.
1079         * frv-ibld.c: Regenerate.
1080         * frv-opc.c: Regenerate.
1081         * frv-opc.h: Regenerate.
1082
1083 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1084
1085         * frv-desc.c, frv-opc.c: Regenerate.
1086
1087 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1088
1089         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1090
1091 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1092
1093         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1094         Also correct mistake in the comment.
1095
1096 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1097
1098         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1099         ensure that double registers have even numbers.
1100         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1101         that reserved instruction 0xfffd does not decode the same
1102         as 0xfdfd (ftrv).
1103         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1104         REG_N refers to a double register.
1105         Add REG_N_B01 nibble type and use it instead of REG_NM
1106         in ftrv.
1107         Adjust the bit patterns in a few comments.
1108
1109 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1110
1111         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1112
1113 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1114
1115         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1116
1117 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1118
1119         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1120
1121 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1122
1123         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1124         mtivor32, mtivor33, mtivor34.
1125
1126 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1127
1128         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1129
1130 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1131
1132         * arm-opc.h Maverick accumulator register opcode fixes.
1133
1134 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1135
1136         * m32r-dis.c: Regenerate.
1137
1138 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1139
1140         * sh-opc.h (sh_table): "fsrra", not "fssra".
1141
1142 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1143
1144         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1145         contraints.
1146
1147 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1148
1149         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1150
1151 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1152
1153         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1154         1.  Don't print scale factor on AT&T mode when index missing.
1155
1156 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1157
1158         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1159         when loaded into XR registers.
1160
1161 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1162
1163         * frv-desc.h: Regenerate.
1164         * frv-desc.c: Regenerate.
1165         * frv-opc.c: Regenerate.
1166
1167 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1168
1169         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1170
1171 2004-01-09  Paul Brook  <paul@codesourcery.com>
1172
1173         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1174         specific opcodes.
1175
1176 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1177
1178         * Makefile.am (libopcodes_la_DEPENDENCIES)
1179         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1180         comment about the problem.
1181         * Makefile.in: Regenerate.
1182
1183 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1184
1185         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1186         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1187         cut&paste errors in shifting/truncating numerical operands.
1188         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1189         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1190         (parse_uslo16): Likewise.
1191         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1192         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1193         (parse_s12): Likewise.
1194         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1195         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1196         (parse_uslo16): Likewise.
1197         (parse_uhi16): Parse gothi and gotfuncdeschi.
1198         (parse_d12): Parse got12 and gotfuncdesc12.
1199         (parse_s12): Likewise.
1200
1201 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1202
1203         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1204         instruction which looks similar to an 'rla' instruction.
1205
1206 For older changes see ChangeLog-0203
1207 \f
1208 Local Variables:
1209 mode: change-log
1210 left-margin: 8
1211 fill-column: 74
1212 version-control: never
1213 End: