1 2006-05-02 Thiemo Seufer <ths@mips.com>
2 Nigel Stephens <nigel@mips.com>
3 David Ung <davidu@mips.com>
5 * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
6 (print_mips16_insn_arg): Force mips16 to odd addresses.
8 2006-04-30 Thiemo Seufer <ths@mips.com>
9 David Ung <davidu@mips.com>
11 * mips-opc.c (mips_builtin_opcodes): Add udi instructions
13 * mips-dis.c (print_insn_args): Adds udi argument handling.
15 2006-04-28 James E Wilson <wilson@specifix.com>
17 * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
20 2006-04-28 Thiemo Seufer <ths@mips.com>
21 David Ung <davidu@mips.com>
22 Nigel Stephens <nigel@mips.com>
24 * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
27 2006-04-28 Thiemo Seufer <ths@mips.com>
28 Nigel Stephens <nigel@mips.com>
29 David Ung <davidu@mips.com>
31 * mips-dis.c (print_insn_args): Add mips_opcode argument.
32 (print_insn_mips): Adjust print_insn_args call.
34 2006-04-28 Thiemo Seufer <ths@mips.com>
35 Nigel Stephens <nigel@mips.com>
37 * mips-dis.c (print_insn_args): Print $fcc only for FP
38 instructions, use $cc elsewise.
40 2006-04-28 Thiemo Seufer <ths@mips.com>
41 Nigel Stephens <nigel@mips.com>
43 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
44 Map MIPS16 registers to O32 names.
45 (print_mips16_insn_arg): Use mips16_reg_names.
47 2006-04-26 Julian Brown <julian@codesourcery.com>
49 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
52 2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
53 Julian Brown <julian@codesourcery.com>
55 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
56 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
57 Add unified load/store instruction names.
58 (neon_opcode_table): New.
59 (arm_opcodes): Expand meaning of %<bitfield>['`?].
60 (arm_decode_bitfield): New.
61 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
62 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
63 (print_insn_neon): New.
64 (print_insn_arm): Adjust print_insn_coprocessor call. Call
65 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
66 (print_insn_thumb32): Likewise.
68 2006-04-19 Alan Modra <amodra@bigpond.net.au>
70 * Makefile.am: Run "make dep-am".
71 * Makefile.in: Regenerate.
73 2006-04-19 Alan Modra <amodra@bigpond.net.au>
75 * avr-dis.c (avr_operand): Warning fix.
77 * configure: Regenerate.
79 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
81 * po/POTFILES.in: Regenerated.
83 2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
86 * avr-dis.c (avr_operand): Arrange for a comment to appear before
87 the symolic form of an address, so that the output of objdump -d
90 2006-04-10 DJ Delorie <dj@redhat.com>
92 * m32c-asm.c: Regenerate.
94 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
96 * Makefile.am: Add install-html target.
97 * Makefile.in: Regenerate.
99 2006-04-06 Nick Clifton <nickc@redhat.com>
101 * po/vi/po: Updated Vietnamese translation.
103 2006-03-31 Paul Koning <ni1d@arrl.net>
105 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
107 2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
109 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
110 logic to identify halfword shifts.
112 2006-03-16 Paul Brook <paul@codesourcery.com>
114 * arm-dis.c (arm_opcodes): Rename swi to svc.
115 (thumb_opcodes): Ditto.
117 2006-03-13 DJ Delorie <dj@redhat.com>
119 * m32c-asm.c: Regenerate.
120 * m32c-desc.c: Likewise.
121 * m32c-desc.h: Likewise.
122 * m32c-dis.c: Likewise.
123 * m32c-ibld.c: Likewise.
124 * m32c-opc.c: Likewise.
125 * m32c-opc.h: Likewise.
127 2006-03-10 DJ Delorie <dj@redhat.com>
129 * m32c-desc.c: Regenerate with mul.l, mulu.l.
130 * m32c-opc.c: Likewise.
131 * m32c-opc.h: Likewise.
134 2006-03-09 Nick Clifton <nickc@redhat.com>
136 * po/sv.po: Updated Swedish translation.
138 2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
141 * i386-dis.c (REP_Fixup): New function.
142 (AL): Remove duplicate.
147 (indirDXr): Likewise.
150 (dis386): Updated entries of ins, outs, movs, lods and stos.
152 2006-03-05 Nick Clifton <nickc@redhat.com>
154 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
155 signed 32-bit value into an unsigned 32-bit field when the host is
157 * fr30-ibld.c: Regenerate.
158 * frv-ibld.c: Regenerate.
159 * ip2k-ibld.c: Regenerate.
160 * iq2000-asm.c: Regenerate.
161 * iq2000-ibld.c: Regenerate.
162 * m32c-ibld.c: Regenerate.
163 * m32r-ibld.c: Regenerate.
164 * openrisc-ibld.c: Regenerate.
165 * xc16x-ibld.c: Regenerate.
166 * xstormy16-ibld.c: Regenerate.
168 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
170 * xc16x-asm.c: Regenerate.
171 * xc16x-dis.c: Regenerate.
173 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
175 * po/Make-in: Add html target.
177 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
179 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
180 Intel Merom New Instructions.
181 (THREE_BYTE_0): Likewise.
182 (THREE_BYTE_1): Likewise.
183 (three_byte_table): Likewise.
184 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
185 THREE_BYTE_1 for entry 0x3a.
186 (twobyte_has_modrm): Updated.
187 (twobyte_uses_SSE_prefix): Likewise.
188 (print_insn): Handle 3-byte opcodes used by Intel Merom New
191 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
193 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
194 (v9_hpriv_reg_names): New table.
195 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
196 New cases '$' and '%' for read/write hyperprivileged register.
197 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
198 window handling and rdhpr/wrhpr instructions.
200 2006-02-24 DJ Delorie <dj@redhat.com>
202 * m32c-desc.c: Regenerate with linker relaxation attributes.
203 * m32c-desc.h: Likewise.
204 * m32c-dis.c: Likewise.
205 * m32c-opc.c: Likewise.
207 2006-02-24 Paul Brook <paul@codesourcery.com>
209 * arm-dis.c (arm_opcodes): Add V7 instructions.
210 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
211 (print_arm_address): New function.
212 (print_insn_arm): Use it. Add 'P' and 'U' cases.
213 (psr_name): New function.
214 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
216 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
218 * ia64-opc-i.c (bXc): New.
220 (OpX2TaTbYaXcC): Likewise.
223 (ia64_opcodes_i): Add instructions for tf.
225 * ia64-opc.h (IMMU5b): New.
227 * ia64-asmtab.c: Regenerated.
229 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
231 * ia64-gen.c: Update copyright years.
232 * ia64-opc-b.c: Likewise.
234 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
236 * ia64-gen.c (lookup_regindex): Handle ".vm".
237 (print_dependency_table): Handle '\"'.
239 * ia64-ic.tbl: Updated from SDM 2.2.
240 * ia64-raw.tbl: Likewise.
241 * ia64-waw.tbl: Likewise.
242 * ia64-asmtab.c: Regenerated.
244 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
246 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
247 Anil Paranjape <anilp1@kpitcummins.com>
248 Shilin Shakti <shilins@kpitcummins.com>
250 * xc16x-desc.h: New file
251 * xc16x-desc.c: New file
252 * xc16x-opc.h: New file
253 * xc16x-opc.c: New file
254 * xc16x-ibld.c: New file
255 * xc16x-asm.c: New file
256 * xc16x-dis.c: New file
257 * Makefile.am: Entries for xc16x
258 * Makefile.in: Regenerate
259 * cofigure.in: Add xc16x target information.
260 * configure: Regenerate.
261 * disassemble.c: Add xc16x target information.
263 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
265 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
268 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
270 * i386-dis.c ('Z'): Add a new macro.
271 (dis386_twobyte): Use "movZ" for control register moves.
273 2006-02-10 Nick Clifton <nickc@redhat.com>
275 * iq2000-asm.c: Regenerate.
277 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
279 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
281 2006-01-26 David Ung <davidu@mips.com>
283 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
284 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
285 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
286 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
287 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
289 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
291 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
292 ld_d_r, pref_xd_cb): Use signed char to hold data to be
294 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
295 buffer overflows when disassembling instructions like
297 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
298 operand, if the offset is negative.
300 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
302 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
303 unsigned char to hold data to be disassembled.
305 2006-01-17 Andreas Schwab <schwab@suse.de>
308 * disassemble.c (disassemble_init_for_target): Set
309 disassembler_needs_relocs for bfd_arch_arm.
311 2006-01-16 Paul Brook <paul@codesourcery.com>
313 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
314 f?add?, and f?sub? instructions.
316 2006-01-16 Nick Clifton <nickc@redhat.com>
318 * po/zh_CN.po: New Chinese (simplified) translation.
319 * configure.in (ALL_LINGUAS): Add "zh_CH".
320 * configure: Regenerate.
322 2006-01-05 Paul Brook <paul@codesourcery.com>
324 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
326 2006-01-06 DJ Delorie <dj@redhat.com>
328 * m32c-desc.c: Regenerate.
329 * m32c-opc.c: Regenerate.
330 * m32c-opc.h: Regenerate.
332 2006-01-03 DJ Delorie <dj@redhat.com>
334 * cgen-ibld.in (extract_normal): Avoid memory range errors.
335 * m32c-ibld.c: Regenerated.
337 For older changes see ChangeLog-2005
343 version-control: never