opcodes/ChangeLog

   1 2012-11-20  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
   2
   3         * s390-opc.txt: Fix srstu and strag opcodes.
   4
   5 2012-11-14  David Holsgrove  <david.holsgrove@xilinx.com>
   6
   7         * microblaze-opc.h: Define new instruction type INST_TYPE_IMM5,
   8         update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5,
   9         and increase MAX_OPCODES.
  10         (op_code_struct):  add mbar and sleep
  11         * microblaze-opcm.h (microblaze_instr): add mbar
  12         Define IMM_MBAR and IMM5_MBAR_MASK
  13         * microblaze-dis.c: Add get_field_imm5_mbar
  14         (print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE
  15
  16 2012-11-14  Edgar E. Iglesias <edgar.iglesias@gmail.com>
  17
  18         * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add clz insn
  19         * microblaze-opcm.h (microblaze_instr): add clz
  20
  21 2012-11-14  Edgar E. Iglesias <edgar.iglesias@gmail.com>
  22
  23         * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add lbur,
  24         lhur, lwr, sbr, shr, swr
  25         * microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr,
  26         swr
  27
  28 2012-11-09  Nick Clifton  <nickc@redhat.com>
  29
  30         * configure.in: Add bfd_v850_rh850_arch.
  31         * configure: Regenerate.
  32         * disassemble.c (disassembler): Likewise.
  33
  34 2012-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  35
  36         * aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
  37         * ia64-gen.c (fetch_insn_class): Likewise.
  38
  39 2012-11-08  Alan Modra  <amodra@gmail.com>
  40
  41         * po/POTFILES.in: Regenerate.
  42
  43 2012-11-05  Alan Modra  <amodra@gmail.com>
  44
  45         * configure.in: Apply 2012-09-10 change to config.in here.
  46
  47 2012-10-26  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  48
  49         * s390-mkopc.c: Accept empty lines in s390-opc.txt.
  50         * s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2
  51         and RRF_RMRR.
  52         * s390-opc.txt: Add new instructions.  New instruction type for lptea.
  53
  54 2012-10-26  Christian Groessler  <chris@groessler.org>
  55
  56         * z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
  57         trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb).  Remove
  58         non-existing opcode trtrb.
  59         * z8k-opc.h: Regenerate.
  60
  61 2012-10-26  Alan Modra  <amodra@gmail.com>
  62
  63         * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
  64
  65 2012-10-24  Roland McGrath  <mcgrathr@google.com>
  66
  67         * i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
  68         set rex_used to rex.
  69
  70 2012-10-22  Peter Bergner  <bergner@vnet.ibm.com>
  71
  72         * ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
  73
  74 2012-10-18  Tom Tromey  <tromey@redhat.com>
  75
  76         * tic54x-dis.c (print_instruction): Don't use K&R style.
  77         (print_parallel_instruction, sprint_dual_address)
  78         (sprint_indirect_address, sprint_direct_address, sprint_mmr)
  79         (sprint_cc2, sprint_condition): Likewise.
  80
  81 2012-10-18  Kai Tietz  <ktietz@redhat.com>
  82
  83         * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
  84         value with a default.
  85         (do_special_encoding): Likewise.
  86         (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
  87         variables with default.
  88         * arc-dis.c (write_comments_): Don't use strncat due
  89         size of state->commentBuffer pointer isn't predictable.
  90
  91 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
  92
  93         * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
  94         rmr_el3; remove daifset and daifclr.
  95
  96 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
  97
  98         * aarch64-opc.c (operand_general_constraint_met_p): Change to check
  99         the alignment of addr.offset.imm instead of that of shifter.amount for
 100         operand type AARCH64_OPND_ADDR_UIMM12.
 101
 102 2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 103
 104         * arm-dis.c: Use preferred form of vrint instruction variants
 105         for disassembly.
 106
 107 2012-10-09  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 108
 109         * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
 110         * i386-init.h: Regenerated.
 111
 112 2012-10-05  Peter Bergner  <bergner@vnet.ibm.com>
 113
 114         * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
 115         * ppc-opc.c (VBA): New define.
 116         (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
 117         mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
 118
 119 2012-10-04  Nick Clifton  <nickc@redhat.com>
 120
 121         * v850-dis.c (disassemble): Place square parentheses around second
 122         register operand of clr1, not1, set1 and tst1 instructions.
 123
 124 2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 125
 126         * s390-mkopc.c: Support new option zEC12.
 127         * s390-opc.c: Add new instruction formats.
 128         * s390-opc.txt: Add new instructions for zEC12.
 129
 130 2012-09-27  Anthony Green  <green@moxielogic.com>
 131
 132         * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
 133         * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
 134
 135 2012-09-25  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 136
 137         * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
 138         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
 139         and CPU_BTVER2_FLAGS.
 140         * i386-init.h: Regenerated.
 141
 142 2012-09-20  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 143
 144         * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
 145         CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
 146         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
 147         CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
 148         (cpu_flags): Add CpuCX16.
 149         * i386-opc.h (CpuCX16): New.
 150         (i386_cpu_flags): Add cpucx16.
 151         * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
 152         * i386-tbl.h: Regenerate.
 153         * i386-init.h: Likewise.
 154
 155 2012-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 156
 157         * arm-dis.c: Changed ldra and strl-form mnemonics
 158         to lda and stl-form.
 159
 160 2012-09-18  Chao-ying Fu  <fu@mips.com>
 161
 162         * micromips-opc.c (micromips_opcodes): Correct the encoding of
 163         the "swxc1" instruction.
 164
 165 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
 166
 167         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
 168         the parameter 'inst'.
 169         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
 170         (convert_mov_to_movewide): Change to assert (0) when
 171         aarch64_wide_constant_p returns FALSE.
 172
 173 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
 174
 175         * configure: Regenerate.
 176
 177 2012-09-14  Anthony Green  <green@moxielogic.com>
 178
 179         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
 180         the address after the branch instruction.
 181
 182 2012-09-13  Anthony Green  <green@moxielogic.com>
 183
 184         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
 185
 186 2012-09-10  Matthias Klose  <doko@ubuntu.com>
 187
 188         * config.in: Disable sanity check for kfreebsd.
 189
 190 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
 191
 192         * configure: Regenerated.
 193
 194 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
 195
 196         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
 197         * ia64-gen.c: Promote completer index type to longlong.
 198         (irf_operand): Add new register recognition.
 199         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
 200         (lookup_specifier): Add new resource recognition.
 201         (insert_bit_table_ent): Relax abort condition according to the
 202         changed completer index type.
 203         (print_dis_table): Fix printf format for completer index.
 204         * ia64-ic.tbl: Add a new instruction class.
 205         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
 206         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
 207         * ia64-opc.h: Define short names for new operand types.
 208         * ia64-raw.tbl: Add new RAW resource for DAHR register.
 209         * ia64-waw.tbl: Add new WAW resource for DAHR register.
 210         * ia64-asmtab.c: Regenerate.
 211
 212 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
 213
 214         * ppc-opc.c (VXASHB_MASK): New define.
 215         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
 216
 217 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
 218
 219         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
 220         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
 221         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
 222         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
 223         vupklsh>: Use VXVA_MASK.
 224         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
 225         <mfvscr>: Use VXVAVB_MASK.
 226         <mtvscr>: Use VXVDVA_MASK.
 227         <vspltb>: Use VXUIMM4_MASK.
 228         <vsplth>: Use VXUIMM3_MASK.
 229         <vspltw>: Use VXUIMM2_MASK.
 230
 231 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 232
 233         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
 234
 235 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 236
 237         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
 238
 239 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 240
 241         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
 242
 243 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 244
 245         * arm-dis.c (neon_opcodes): Add support for AES instructions.
 246
 247 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 248
 249         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
 250         conversions.
 251
 252 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
 253
 254         * arm-dis.c (coprocessor_opcodes): Add VRINT.
 255         (neon_opcodes): Likewise.
 256
 257 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 258
 259         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
 260         variants.
 261         (neon_opcodes): Likewise.
 262
 263 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 264
 265         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 266         (neon_opcodes): Likewise.
 267
 268 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 269
 270         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 271         (print_insn_coprocessor): Add new %<>c bitfield format
 272         specifier.
 273
 274 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 275
 276         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 277         (thumb32_opcodes): Likewise.
 278         (print_arm_insn): Add support for %<>T formatter.
 279
 280 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 281
 282         * arm-dis.c (arm_opcodes): Add HLT.
 283         (thumb_opcodes): Likewise.
 284
 285 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 286
 287         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 288
 289 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 290
 291         * arm-dis.c (arm_opcodes): Add SEVL.
 292         (thumb_opcodes): Likewise.
 293         (thumb32_opcodes): Likewise.
 294
 295 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 296
 297         * arm-dis.c (data_barrier_option): New function.
 298         (print_insn_arm): Use data_barrier_option.
 299         (print_insn_thumb32): Use data_barrier_option.
 300
 301 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 302
 303         * arm-dis.c (COND_UNCOND): New constant.
 304         (print_insn_coprocessor): Add support for %u format specifier.
 305         (print_insn_neon): Likewise.
 306
 307 2012-08-21  David S. Miller  <davem@davemloft.net>
 308
 309         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 310         F3F4 macro.
 311
 312 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 313
 314         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 315         vabsduh, vabsduw, mviwsplt.
 316
 317 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 318
 319         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 320         CPU_BTVER2_FLAGS.
 321
 322         * i386-opc.h: Update CpuPRFCHW comment.
 323
 324         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 325         * i386-init.h: Regenerated.
 326         * i386-tbl.h: Likewise.
 327
 328 2012-08-17  Nick Clifton  <nickc@redhat.com>
 329
 330         * po/uk.po: New Ukranian translation.
 331         * configure.in (ALL_LINGUAS): Add uk.
 332         * configure: Regenerate.
 333
 334 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 335
 336         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 337         RBX for the third operand.
 338         <"lswi">: Use RAX for second and NBI for the third operand.
 339
 340 2012-08-15  DJ Delorie  <dj@redhat.com>
 341
 342         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 343         operands, so that data addresses can be corrected when not
 344         ES-overridden.
 345         * rl78-decode.c: Regenerate.
 346         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 347         irrelevent.  When the 'e' specifier is used on an operand and no
 348         ES prefix is provided, adjust address to make it absolute.
 349
 350 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 351
 352         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 353
 354 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 355
 356         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 357
 358 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 359
 360         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 361         macros, use local variables for info struct member accesses,
 362         update the type of the variable used to hold the instruction
 363         word.
 364         (print_insn_mips, print_mips16_insn_arg): Likewise.
 365         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 366         local variables for info struct member accesses.
 367         (print_insn_micromips): Add GET_OP_S local macro.
 368         (_print_insn_mips): Update the type of the variable used to hold
 369         the instruction word.
 370
 371 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 372             Laurent Desnogues  <laurent.desnogues@arm.com>
 373             Jim MacArthur  <jim.macarthur@arm.com>
 374             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 375             Nigel Stephens  <nigel.stephens@arm.com>
 376             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 377             Richard Earnshaw  <rearnsha@arm.com>
 378             Sofiane Naci  <sofiane.naci@arm.com>
 379             Tejas Belagod  <tejas.belagod@arm.com>
 380             Yufeng Zhang  <yufeng.zhang@arm.com>
 381
 382         * Makefile.am: Add AArch64.
 383         * Makefile.in: Regenerate.
 384         * aarch64-asm.c: New file.
 385         * aarch64-asm.h: New file.
 386         * aarch64-dis.c: New file.
 387         * aarch64-dis.h: New file.
 388         * aarch64-gen.c: New file.
 389         * aarch64-opc.c: New file.
 390         * aarch64-opc.h: New file.
 391         * aarch64-tbl.h: New file.
 392         * configure.in: Add AArch64.
 393         * configure: Regenerate.
 394         * disassemble.c: Add AArch64.
 395         * aarch64-asm-2.c: New file (automatically generated).
 396         * aarch64-dis-2.c: New file (automatically generated).
 397         * aarch64-opc-2.c: New file (automatically generated).
 398         * po/POTFILES.in: Regenerate.
 399
 400 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 401
 402         * micromips-opc.c (micromips_opcodes): Update comment.
 403         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 404         instructions for IOCT as appropriate.
 405         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 406         opcode_is_member.
 407         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 408         the result of a check for the -Wno-missing-field-initializers
 409         GCC option.
 410         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 411         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 412         compilation.
 413         (mips16-opc.lo): Likewise.
 414         (micromips-opc.lo): Likewise.
 415         * aclocal.m4: Regenerate.
 416         * configure: Regenerate.
 417         * Makefile.in: Regenerate.
 418
 419 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 420
 421         PR gas/14423
 422         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 423         * i386-init.h: Regenerated.
 424
 425 2012-08-09  Nick Clifton  <nickc@redhat.com>
 426
 427         * po/vi.po: Updated Vietnamese translation.
 428
 429 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 430
 431         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 432         AMD-reserved cases as "prefetch".
 433         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 434         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 435         (reg_table): Use those under REG_0F18.
 436         (mod_table): Add those cases as "nop/reserved".
 437
 438 2012-08-07  Jan Beulich <jbeulich@suse.com>
 439
 440         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 441
 442 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 443
 444         * i386-dis.c (print_insn): Print spaces between multiple excess
 445         prefixes.  Return actual number of excess prefixes consumed,
 446         not always one.
 447
 448         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 449
 450 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 451             Victor Khimenko  <khim@google.com>
 452             H.J. Lu  <hongjiu.lu@intel.com>
 453
 454         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 455         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 456         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 457         (OP_E_register): Likewise.
 458         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 459
 460 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 461
 462         * configure.in: Formatting.
 463         * configure: Regenerate.
 464
 465 2012-08-01  Alan Modra  <amodra@gmail.com>
 466
 467         * h8300-dis.c: Fix printf arg warnings.
 468         * i960-dis.c: Likewise.
 469         * mips-dis.c: Likewise.
 470         * pdp11-dis.c: Likewise.
 471         * sh-dis.c: Likewise.
 472         * v850-dis.c: Likewise.
 473         * configure.in: Formatting.
 474         * configure: Regenerate.
 475         * rl78-decode.c: Regenerate.
 476         * po/POTFILES.in: Regenerate.
 477
 478 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 479             Catherine Moore  <clm@codesourcery.com>
 480             Maciej W. Rozycki  <macro@codesourcery.com>
 481
 482         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 483         (DSP_VOLA): Likewise.
 484         (D32, D33): Likewise.
 485         (micromips_opcodes): Add DSP ASE instructions.
 486         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 487         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 488
 489 2012-07-31  Jan Beulich <jbeulich@suse.com>
 490
 491         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 492         instruction group. Mark as requiring AVX2.
 493         * i386-tbl.h: Re-generate.
 494
 495 2012-07-30  Nick Clifton  <nickc@redhat.com>
 496
 497         * po/opcodes.pot: Updated template.
 498         * po/es.po: Updated Spanish translation.
 499         * po/fi.po: Updated Finnish translation.
 500
 501 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 502
 503         * configure.in (BFD_VERSION): Run bfd/configure --version and
 504         parse the output of that.
 505         * configure: Regenerate.
 506
 507 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 508
 509         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 510
 511 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 512             Dr David Alan Gilbert  <dave@treblig.org>
 513
 514         PR binutils/13135
 515         * arm-dis.c: Add necessary casts for printing integer values.
 516         Use %s when printing string values.
 517         * hppa-dis.c: Likewise.
 518         * m68k-dis.c: Likewise.
 519         * microblaze-dis.c: Likewise.
 520         * mips-dis.c: Likewise.
 521         * sparc-dis.c: Likewise.
 522
 523 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 524
 525         PR binutils/14355
 526         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 527         (VEX_LEN_0FXOP_08_CD): Likewise.
 528         (VEX_LEN_0FXOP_08_CE): Likewise.
 529         (VEX_LEN_0FXOP_08_CF): Likewise.
 530         (VEX_LEN_0FXOP_08_EC): Likewise.
 531         (VEX_LEN_0FXOP_08_ED): Likewise.
 532         (VEX_LEN_0FXOP_08_EE): Likewise.
 533         (VEX_LEN_0FXOP_08_EF): Likewise.
 534         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 535         vpcomub, vpcomuw, vpcomud, vpcomuq.
 536         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 537         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 538         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 539         VEX_LEN_0FXOP_08_EF.
 540
 541 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 542
 543         * i386-dis.c (PREFIX_0F38F6): New.
 544         (prefix_table): Add adcx, adox instructions.
 545         (three_byte_table): Use PREFIX_0F38F6.
 546         (mod_table): Add rdseed instruction.
 547         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 548         (cpu_flags): Likewise.
 549         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 550         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 551         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 552         prefetchw.
 553         * i386-tbl.h: Regenerate.
 554         * i386-init.h: Likewise.
 555
 556 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 557
 558         * mips-dis.c: Remove gratuitous newline.
 559
 560 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 561
 562         * xgate-dis.c: Removed an IF statement that will
 563         always be false due to overlapping operand masks.
 564         * xgate-opc.c: Corrected 'com' opcode entry and
 565         fixed spacing.
 566
 567 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 568
 569         * i386-opc.tbl: Add RepPrefixOk to nop.
 570         * i386-tbl.h: Regenerate.
 571
 572 2012-06-28  Nick Clifton  <nickc@redhat.com>
 573
 574         * po/vi.po: Updated Vietnamese translation.
 575
 576 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 577
 578         * i386-opc.tbl: Add RepPrefixOk to ret.
 579         * i386-tbl.h: Regenerate.
 580
 581         * i386-opc.h (RepPrefixOk): New enum constant.
 582         (i386_opcode_modifier): New bitfield 'repprefixok'.
 583         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 584         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 585         instructions that have IsString.
 586         * i386-tbl.h: Regenerate.
 587
 588 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 589
 590         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 591         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 592         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 593         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 594         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 595         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 596         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 597         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 598         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 599
 600 2012-05-19  Alan Modra  <amodra@gmail.com>
 601
 602         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 603         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 604
 605 2012-05-18  Alan Modra  <amodra@gmail.com>
 606
 607         * ia64-opc.c: Remove #include "ansidecl.h".
 608         * z8kgen.c: Include sysdep.h first.
 609
 610         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 611         * bfin-dis.c: Likewise.
 612         * i860-dis.c: Likewise.
 613         * ia64-dis.c: Likewise.
 614         * ia64-gen.c: Likewise.
 615         * m68hc11-dis.c: Likewise.
 616         * mmix-dis.c: Likewise.
 617         * msp430-dis.c: Likewise.
 618         * or32-dis.c: Likewise.
 619         * rl78-dis.c: Likewise.
 620         * rx-dis.c: Likewise.
 621         * tic4x-dis.c: Likewise.
 622         * tilegx-opc.c: Likewise.
 623         * tilepro-opc.c: Likewise.
 624         * rx-decode.c: Regenerate.
 625
 626 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 627
 628         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 629
 630 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 631
 632         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 633
 634 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 635             Nick Clifton  <nickc@redhat.com>
 636
 637         PR 14072
 638         * configure.in: Add check that sysdep.h has been included before
 639         any system header files.
 640         * configure: Regenerate.
 641         * config.in: Regenerate.
 642         * sysdep.h: Generate an error if included before config.h.
 643         * alpha-opc.c: Include sysdep.h before any other header file.
 644         * alpha-dis.c: Likewise.
 645         * avr-dis.c: Likewise.
 646         * cgen-opc.c: Likewise.
 647         * cr16-dis.c: Likewise.
 648         * cris-dis.c: Likewise.
 649         * crx-dis.c: Likewise.
 650         * d10v-dis.c: Likewise.
 651         * d10v-opc.c: Likewise.
 652         * d30v-dis.c: Likewise.
 653         * d30v-opc.c: Likewise.
 654         * h8500-dis.c: Likewise.
 655         * i370-dis.c: Likewise.
 656         * i370-opc.c: Likewise.
 657         * m10200-dis.c: Likewise.
 658         * m10300-dis.c: Likewise.
 659         * micromips-opc.c: Likewise.
 660         * mips-opc.c: Likewise.
 661         * mips61-opc.c: Likewise.
 662         * moxie-dis.c: Likewise.
 663         * or32-opc.c: Likewise.
 664         * pj-dis.c: Likewise.
 665         * ppc-dis.c: Likewise.
 666         * ppc-opc.c: Likewise.
 667         * s390-dis.c: Likewise.
 668         * sh-dis.c: Likewise.
 669         * sh64-dis.c: Likewise.
 670         * sparc-dis.c: Likewise.
 671         * sparc-opc.c: Likewise.
 672         * spu-dis.c: Likewise.
 673         * tic30-dis.c: Likewise.
 674         * tic54x-dis.c: Likewise.
 675         * tic80-dis.c: Likewise.
 676         * tic80-opc.c: Likewise.
 677         * tilegx-dis.c: Likewise.
 678         * tilepro-dis.c: Likewise.
 679         * v850-dis.c: Likewise.
 680         * v850-opc.c: Likewise.
 681         * vax-dis.c: Likewise.
 682         * w65-dis.c: Likewise.
 683         * xgate-dis.c: Likewise.
 684         * xtensa-dis.c: Likewise.
 685         * rl78-decode.opc: Likewise.
 686         * rl78-decode.c: Regenerate.
 687         * rx-decode.opc: Likewise.
 688         * rx-decode.c: Regenerate.
 689
 690 2012-05-17  Alan Modra  <amodra@gmail.com>
 691
 692         * ppc_dis.c: Don't include elf/ppc.h.
 693
 694 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 695
 696         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 697         to PUSH/POP {reg}.
 698
 699 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 700             Stephane Carrez <stcarrez@nerim.fr>
 701
 702         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 703         target.
 704         * disassemble.c: Likewise.
 705         * configure: Regenerate.
 706         * m68hc11-dis.c: Make objdump output more consistent, use hex
 707         instead of decimal and use 0x prefix for hex.
 708         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 709
 710 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 711
 712         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 713         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 714         (vle_opcd_indices): New array.
 715         (lookup_vle): New function.
 716         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 717         (print_insn_powerpc): Likewise.
 718         * ppc-opc.c: Likewise.
 719
 720 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 721             Maciej W. Rozycki  <macro@codesourcery.com>
 722             Rhonda Wittels  <rhonda@codesourcery.com>
 723             Nathan Froyd <froydnj@codesourcery.com>
 724
 725         * ppc-opc.c (insert_arx, extract_arx): New functions.
 726         (insert_ary, extract_ary): New functions.
 727         (insert_li20, extract_li20): New functions.
 728         (insert_rx, extract_rx): New functions.
 729         (insert_ry, extract_ry): New functions.
 730         (insert_sci8, extract_sci8): New functions.
 731         (insert_sci8n, extract_sci8n): New functions.
 732         (insert_sd4h, extract_sd4h): New functions.
 733         (insert_sd4w, extract_sd4w): New functions.
 734         (insert_vlesi, extract_vlesi): New functions.
 735         (insert_vlensi, extract_vlensi): New functions.
 736         (insert_vleui, extract_vleui): New functions.
 737         (insert_vleil, extract_vleil): New functions.
 738         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 739         (BI16, BI32, BO32, B8): New.
 740         (B15, B24, CRD32, CRS): New.
 741         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 742         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 743         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 744         (SH6_MASK): Use PPC_OPSHIFT_INV.
 745         (SI8, UI5, OIMM5, UI7, BO16): New.
 746         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 747         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 748         (ALLOW8_SPRG): New.
 749         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 750         (OPVUP, OPVUP_MASK OPVUP): New
 751         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 752         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 753         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 754         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 755         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 756         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 757         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 758         (SE_IM5, SE_IM5_MASK): New.
 759         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 760         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 761         (BO32DNZ, BO32DZ): New.
 762         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 763         (PPCVLE): New.
 764         (powerpc_opcodes): Add new VLE instructions.  Update existing
 765         instruction to include PPCVLE if supported.
 766         * ppc-dis.c (ppc_opts): Add vle entry.
 767         (get_powerpc_dialect): New function.
 768         (powerpc_init_dialect): VLE support.
 769         (print_insn_big_powerpc): Call get_powerpc_dialect.
 770         (print_insn_little_powerpc): Likewise.
 771         (operand_value_powerpc): Handle negative shift counts.
 772         (print_insn_powerpc): Handle 2-byte instruction lengths.
 773
 774 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 775
 776         PR binutils/14028
 777         * configure.in: Invoke ACX_HEADER_STRING.
 778         * configure: Regenerate.
 779         * config.in: Regenerate.
 780         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 781         string.h and strings.h.
 782
 783 2012-05-11  Nick Clifton  <nickc@redhat.com>
 784
 785         PR binutils/14006
 786         * arm-dis.c (print_insn): Fix detection of instruction mode in
 787         files containing multiple executable sections.
 788
 789 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 790
 791         * Makefile.in, configure: regenerate
 792         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 793         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 794         New functions.
 795         * configure.in: Recognize xgate.
 796         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 797         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 798         and opcode generation for xgate.
 799
 800 2012-04-30  DJ Delorie  <dj@redhat.com>
 801
 802         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 803         already the maximum bit size.
 804         * rx-decode.c: Regenerate.
 805
 806 2012-04-27  David S. Miller  <davem@davemloft.net>
 807
 808         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 809         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 810
 811         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 812         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 813
 814         * sparc-opc.c (CBCOND): New define.
 815         (CBCOND_XCC): Likewise.
 816         (cbcond): New helper macro.
 817         (sparc_opcodes): Add compare-and-branch instructions.
 818
 819         * sparc-dis.c (print_insn_sparc): Handle ')'.
 820         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 821
 822         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 823         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 824
 825 2012-04-12  David S. Miller  <davem@davemloft.net>
 826
 827         * sparc-dis.c (X_DISP10): Define.
 828         (print_insn_sparc): Handle '='.
 829
 830 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 831
 832         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 833         sprintf call and the '*' field width.
 834
 835 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 836
 837         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 838
 839 2012-03-16  Alan Modra  <amodra@gmail.com>
 840
 841         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 842         (powerpc_opcd_indices): Bump array size.
 843         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 844         corresponding to unused opcodes to following entry.
 845         (lookup_powerpc): New function, extracted and optimised from..
 846         (print_insn_powerpc): ..here.
 847
 848 2012-03-15  Alan Modra  <amodra@gmail.com>
 849             James Lemke  <jwlemke@codesourcery.com>
 850
 851         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 852         * ppc-dis.c (private): New var.
 853         (powerpc_init_dialect): Don't return calloc failure, instead use
 854         private.
 855         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 856         (powerpc_opcd_indices): New array.
 857         (disassemble_init_powerpc): New function.
 858         (print_insn_big_powerpc): Don't init dialect here.
 859         (print_insn_little_powerpc): Likewise.
 860         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 861
 862 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 863
 864         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 865         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 866         (PPCVEC2, PPCTMR, E6500): New short names.
 867         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 868         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 869         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 870         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 871         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 872         optional operands on sync instruction for E6500 target.
 873
 874 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 875
 876         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 877
 878 2012-02-27  Alan Modra  <amodra@gmail.com>
 879
 880         * mt-dis.c: Regenerate.
 881
 882 2012-02-27  Alan Modra  <amodra@gmail.com>
 883
 884         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 885         is the inverse of corresponding insert function.
 886         (extract_d22, extract_u9, extract_r4): Likewise.
 887         (extract_d9): Correct sign extension.
 888         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 889         rely on implementation defined behaviour for shift right of
 890         signed types.
 891         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 892         (extract_d23): Likewise, and correct mask.
 893
 894 2012-02-27  Alan Modra  <amodra@gmail.com>
 895
 896         * crx-dis.c (print_arg): Mask constant to 32 bits.
 897         * crx-opc.c (cst4_map): Use int array.
 898
 899 2012-02-27  Alan Modra  <amodra@gmail.com>
 900
 901         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 902         (FIELDD): Sign extend with xor,sub.
 903
 904 2012-02-25  Walter Lee  <walt@tilera.com>
 905
 906         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 907         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 908         TILEPRO_OPC_LW_TLS_SN.
 909
 910 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 911
 912         * i386-opc.h (HLEPrefixNone): New.
 913         (HLEPrefixLock): Likewise.
 914         (HLEPrefixAny): Likewise.
 915         (HLEPrefixRelease): Likewise.
 916
 917 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 918
 919         * i386-dis.c (HLE_Fixup1): New.
 920         (HLE_Fixup2): Likewise.
 921         (HLE_Fixup3): Likewise.
 922         (Ebh1): Likewise.
 923         (Evh1): Likewise.
 924         (Ebh2): Likewise.
 925         (Evh2): Likewise.
 926         (Ebh3): Likewise.
 927         (Evh3): Likewise.
 928         (MOD_C6_REG_7): Likewise.
 929         (MOD_C7_REG_7): Likewise.
 930         (RM_C6_REG_7): Likewise.
 931         (RM_C7_REG_7): Likewise.
 932         (XACQUIRE_PREFIX): Likewise.
 933         (XRELEASE_PREFIX): Likewise.
 934         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 935         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 936         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 937         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 938         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 939         MOD_C6_REG_7 and MOD_C7_REG_7.
 940         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 941         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 942         xtest.
 943         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 944         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 945
 946         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 947         CPU_RTM_FLAGS.
 948         (cpu_flags): Add CpuHLE and CpuRTM.
 949         (opcode_modifiers): Add HLEPrefixOk.
 950
 951         * i386-opc.h (CpuHLE): New.
 952         (CpuRTM): Likewise.
 953         (HLEPrefixOk): Likewise.
 954         (i386_cpu_flags): Add cpuhle and cpurtm.
 955         (i386_opcode_modifier): Add hleprefixok.
 956
 957         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 958         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 959         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 960         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 961         xtest.
 962         * i386-init.h: Regenerated.
 963         * i386-tbl.h: Likewise.
 964
 965 2012-01-24  DJ Delorie  <dj@redhat.com>
 966
 967         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 968         * rl78-decode.c: Regenerate.
 969
 970 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 971
 972         PR binutils/10173
 973         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 974
 975 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 976
 977         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 978         register and move them after pmove with PSR/PCSR register.
 979
 980 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 981
 982         * i386-dis.c (mod_table): Add vmfunc.
 983
 984         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 985         (cpu_flags): CpuVMFUNC.
 986
 987         * i386-opc.h (CpuVMFUNC): New.
 988         (i386_cpu_flags): Add cpuvmfunc.
 989
 990         * i386-opc.tbl: Add vmfunc.
 991         * i386-init.h: Regenerated.
 992         * i386-tbl.h: Likewise.
 993
 994 For older changes see ChangeLog-2011
 995 \f
 996 Local Variables:
 997 mode: change-log
 998 left-margin: 8
 999 fill-column: 74
1000 version-control: never
1001 End: