opcodes/ChangeLog

   1 2017-02-21  Jan Beulich  <jbeulich@suse.com>
   2
   3         * aarch64-asm.c (convert_bfc_to_bfm): Copy operand 0 to operand
   4         1 (instead of to itself). Correct typo.
   5
   6 2017-02-14  Andrew Waterman  <andrew@sifive.com>
   7
   8         * riscv-opc.c (riscv_opcodes): Add sfence.vma instruction and
   9         pseudoinstructions.
  10
  11 2017-02-15  Richard Sandiford  <richard.sandiford@arm.com>
  12
  13         * aarch64-opc.c (aarch64_sys_regs): Add SVE registers.
  14         (aarch64_sys_reg_supported_p): Handle them.
  15
  16 2017-02-15  Claudiu Zissulescu  <claziss@synopsys.com>
  17
  18         * arc-opc.c (UIMM6_20R): Define.
  19         (SIMM12_20): Use above.
  20         (SIMM12_20R): Define.
  21         (SIMM3_5_S): Use above.
  22         (UIMM7_A32_11R_S): Define.
  23         (UIMM7_9_S): Use above.
  24         (UIMM3_13R_S): Define.
  25         (SIMM11_A32_7_S): Use above.
  26         (SIMM9_8R): Define.
  27         (UIMM10_A32_8_S): Use above.
  28         (UIMM8_8R_S): Define.
  29         (W6): Use above.
  30         (arc_relax_opcodes): Use all above defines.
  31
  32 2017-02-15  Vineet Gupta <vgupta@synopsys.com>
  33
  34         * arc-regs.h: Distinguish some of the registers different on
  35         ARC700 and HS38 cpus.
  36
  37 2017-02-14  Alan Modra  <amodra@gmail.com>
  38
  39         PR 21118
  40         * ppc-opc.c (powerpc_operands): Flag SPR, SPRG and TBR entries
  41         with PPC_OPERAND_SPR.  Flag PSQ and PSQM with PPC_OPERAND_GQR.
  42
  43 2017-02-11  Stafford Horne  <shorne@gmail.com>
  44             Alan Modra  <amodra@gmail.com>
  45
  46         * cgen-opc.c (cgen_lookup_insn): Delete buf and base_insn temps.
  47         Use insn_bytes_value and insn_int_value directly instead.  Don't
  48         free allocated memory until function exit.
  49
  50 2017-02-10  Nicholas Piggin  <npiggin@gmail.com>
  51
  52         * ppc-opc.c (powerpc_opcodes) <scv, rfscv>: New mnemonics.
  53
  54 2017-02-03  Nick Clifton  <nickc@redhat.com>
  55
  56         PR 21096
  57         * aarch64-opc.c (print_register_list): Ensure that the register
  58         list index will fir into the tb buffer.
  59         (print_register_offset_address): Likewise.
  60         * tic6x-dis.c (print_insn_tic6x): Increase size of func_unit_buf.
  61
  62 2017-01-27  Alexis Deruell  <alexis.deruelle@gmail.com>
  63
  64         PR 21056
  65         * tic6x-dis.c (print_insn_tic6x): Correct displaying of parallel
  66         instructions when the previous fetch packet ends with a 32-bit
  67         instruction.
  68
  69 2017-01-24  Dimitar Dimitrov  <dimitar@dinux.eu>
  70
  71         * pru-opc.c: Remove vague reference to a future GDB port.
  72
  73 2017-01-20  Nick Clifton  <nickc@redhat.com>
  74
  75         * po/ga.po: Updated Irish translation.
  76
  77 2017-01-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  78
  79         * arm-dis.c (coprocessor_opcodes): Fix vcmla mask and disassembly.
  80
  81 2017-01-13  Yao Qi  <yao.qi@linaro.org>
  82
  83         * m68k-dis.c (match_insn_m68k): Extend comments.  Return -1
  84         if FETCH_DATA returns 0.
  85         (m68k_scan_mask): Likewise.
  86         (print_insn_m68k): Update code to handle -1 return value.
  87
  88 2017-01-13  Yao Qi  <yao.qi@linaro.org>
  89
  90         * m68k-dis.c (enum print_insn_arg_error): New.
  91         (NEXTBYTE): Replace -3 with
  92         PRINT_INSN_ARG_MEMORY_ERROR.
  93         (NEXTULONG): Likewise.
  94         (NEXTSINGLE): Likewise.
  95         (NEXTDOUBLE): Likewise.
  96         (NEXTDOUBLE): Likewise.
  97         (NEXTPACKED): Likewise.
  98         (FETCH_ARG): Likewise.
  99         (FETCH_DATA): Update comments.
 100         (print_insn_arg): Update comments. Replace magic numbers with
 101         enum.
 102         (match_insn_m68k): Likewise.
 103
 104 2017-01-12  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 105
 106         * i386-dis.c (enum): Add PREFIX_EVEX_0F3855, EVEX_W_0F3855_P_2.
 107         * i386-dis-evex.h (evex_table): Updated.
 108         * i386-gen.c (cpu_flag_init): Add CPU_AVX512_VPOPCNTDQ_FLAGS,
 109         CPU_ANY_AVX512_VPOPCNTDQ_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
 110         (cpu_flags): Add CpuAVX512_VPOPCNTDQ.
 111         * i386-opc.h (enum): (AVX512_VPOPCNTDQ): New.
 112         (i386_cpu_flags): Add cpuavx512_vpopcntdq.
 113         * i386-opc.tbl: Add Intel AVX512_VPOPCNTDQ instructions.
 114         * i386-init.h: Regenerate.
 115         * i386-tbl.h: Ditto.
 116
 117 2017-01-12  Yao Qi  <yao.qi@linaro.org>
 118
 119         * msp430-dis.c (msp430_singleoperand): Return -1 if
 120         msp430dis_opcode_signed returns false.
 121         (msp430_doubleoperand): Likewise.
 122         (msp430_branchinstr): Return -1 if
 123         msp430dis_opcode_unsigned returns false.
 124         (msp430x_calla_instr): Likewise.
 125         (print_insn_msp430): Likewise.
 126
 127 2017-01-05  Nick Clifton  <nickc@redhat.com>
 128
 129         PR 20946
 130         * frv-desc.c (lookup_mach_via_bfd_name): Return NULL if the name
 131         could not be matched.
 132         (frv_cgen_cpu_open): Allow for lookup_mach_via_bfd_name returning
 133         NULL.
 134
 135 2017-01-04  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 136
 137         * aarch64-tbl.h (RCPC, RCPC_INSN): Define.
 138         (aarch64_opcode_table): Use RCPC_INSN.
 139
 140 2017-01-03  Kito Cheng  <kito.cheng@gmail.com>
 141
 142         * riscv-opc.c (riscv-opcodes): Add support for the "q" ISA
 143         extension.
 144         * riscv-opcodes/all-opcodes: Likewise.
 145
 146 2017-01-03  Dilyan Palauzov  <dilyan.palauzov@aegee.org>
 147
 148         * riscv-dis.c (print_insn_args): Add fall through comment.
 149
 150 2017-01-03  Nick Clifton  <nickc@redhat.com>
 151
 152         * po/sr.po: New Serbian translation.
 153         * configure.ac (ALL_LINGUAS): Add sr.
 154         * configure: Regenerate.
 155
 156 2017-01-02  Alan Modra  <amodra@gmail.com>
 157
 158         * epiphany-desc.h: Regenerate.
 159         * epiphany-opc.h: Regenerate.
 160         * fr30-desc.h: Regenerate.
 161         * fr30-opc.h: Regenerate.
 162         * frv-desc.h: Regenerate.
 163         * frv-opc.h: Regenerate.
 164         * ip2k-desc.h: Regenerate.
 165         * ip2k-opc.h: Regenerate.
 166         * iq2000-desc.h: Regenerate.
 167         * iq2000-opc.h: Regenerate.
 168         * lm32-desc.h: Regenerate.
 169         * lm32-opc.h: Regenerate.
 170         * m32c-desc.h: Regenerate.
 171         * m32c-opc.h: Regenerate.
 172         * m32r-desc.h: Regenerate.
 173         * m32r-opc.h: Regenerate.
 174         * mep-desc.h: Regenerate.
 175         * mep-opc.h: Regenerate.
 176         * mt-desc.h: Regenerate.
 177         * mt-opc.h: Regenerate.
 178         * or1k-desc.h: Regenerate.
 179         * or1k-opc.h: Regenerate.
 180         * xc16x-desc.h: Regenerate.
 181         * xc16x-opc.h: Regenerate.
 182         * xstormy16-desc.h: Regenerate.
 183         * xstormy16-opc.h: Regenerate.
 184
 185 2017-01-02  Alan Modra  <amodra@gmail.com>
 186
 187         Update year range in copyright notice of all files.
 188
 189 For older changes see ChangeLog-2016
 190 \f
 191 Copyright (C) 2017 Free Software Foundation, Inc.
 192
 193 Copying and distribution of this file, with or without modification,
 194 are permitted in any medium without royalty provided the copyright
 195 notice and this notice are preserved.
 196
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 198 mode: change-log
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