opcodes/ChangeLog

   1 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
   4         prefetchw.
   5
   6 2010-08-06  Quentin Neill <quentin.neill@amd.com>
   7
   8         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
   9         to processor flags for PENTIUMPRO processors and later.
  10         * i386-opc.h (enum): Add CpuNop.
  11         (i386_cpu_flags): Add cpunop bit.
  12         * i386-opc.tbl: Change nop cpu_flags.
  13         * i386-init.h: Regenerated.
  14         * i386-tbl.h: Likewise.
  15
  16 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  17
  18         * i386-opc.h (enum): Fix typos in comments.
  19
  20 2010-08-06  Alan Modra  <amodra@gmail.com>
  21
  22         * disassemble.c: Formatting.
  23         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
  24
  25 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  26
  27         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
  28         * i386-tbl.h: Regenerated.
  29
  30 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  31
  32         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
  33
  34         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
  35         * i386-tbl.h: Regenerated.
  36
  37 2010-07-29  DJ Delorie  <dj@redhat.com>
  38
  39         * rx-decode.opc (SRR): New.
  40         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
  41         r0,r0) and NOP3 (max r0,r0) special cases.
  42         * rx-decode.c: Regenerate.
  43
  44 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
  45
  46         * i386-dis.c: Add 0F to VEX opcode enums.
  47
  48 2010-07-27  DJ Delorie  <dj@redhat.com>
  49
  50         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
  51         (rx_decode_opcode): Likewise.
  52         * rx-decode.c: Regenerate.
  53
  54 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
  55             Ina Pandit  <ina.pandit@kpitcummins.com>
  56
  57         * v850-dis.c (v850_sreg_names): Updated structure for system
  58         registers.
  59         (float_cc_names): new structure for condition codes.
  60         (print_value): Update the function that prints value.
  61         (get_operand_value): New function to get the operand value.
  62         (disassemble): Updated to handle the disassembly of instructions.
  63         (print_insn_v850): Updated function to print instruction for different
  64         families.
  65         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
  66         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
  67         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
  68         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
  69         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
  70         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
  71         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
  72         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
  73         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
  74         (v850_operands): Update with the relocation name. Also update
  75         the instructions with specific set of processors.
  76
  77 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
  78
  79         * arm-dis.c (print_insn_arm): Add cases for printing more
  80         symbolic operands.
  81         (print_insn_thumb32): Likewise.
  82
  83 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  84
  85         * mips-dis.c (print_insn_mips): Correct branch instruction type
  86         determination.
  87
  88 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  89
  90         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
  91         type and delay slot determination.
  92         (print_insn_mips16): Extend branch instruction type and delay
  93         slot determination to cover all instructions.
  94         * mips16-opc.c (BR): Remove macro.
  95         (UBR, CBR): New macros.
  96         (mips16_opcodes): Update branch annotation for "b", "beqz",
  97         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
  98         and "jrc".
  99
 100 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 101
 102         AVX Programming Reference (June, 2010)
 103         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 104         * i386-opc.tbl: Likewise.
 105         * i386-tbl.h: Regenerated.
 106
 107 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 108
 109         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 110
 111 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 112
 113         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 114         ppc_cpu_t before inverting.
 115         (ppc_parse_cpu): Likewise.
 116         (print_insn_powerpc): Likewise.
 117
 118 2010-07-03  Alan Modra  <amodra@gmail.com>
 119
 120         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 121         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 122         (PPC64, MFDEC2): Update.
 123         (NON32, NO371): Define.
 124         (powerpc_opcode): Update to not use old opcode flags, and avoid
 125         -m601 duplicates.
 126
 127 2010-07-03  DJ Delorie  <dj@delorie.com>
 128
 129         * m32c-ibld.c: Regenerate.
 130
 131 2010-07-03  Alan Modra  <amodra@gmail.com>
 132
 133         * ppc-opc.c (PWR2COM): Define.
 134         (PPCPWR2): Add PPC_OPCODE_COMMON.
 135         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 136         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 137         "rac" from -mcom.
 138
 139 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 140
 141         AVX Programming Reference (June, 2010)
 142         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 143         (PREFIX_0FAE_REG_1): Likewise.
 144         (PREFIX_0FAE_REG_2): Likewise.
 145         (PREFIX_0FAE_REG_3): Likewise.
 146         (PREFIX_VEX_3813): Likewise.
 147         (PREFIX_VEX_3A1D): Likewise.
 148         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 149         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 150         PREFIX_VEX_3A1D.
 151         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 152         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 153         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 154
 155         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 156         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 157         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 158
 159         * i386-opc.h (CpuXsaveopt): New.
 160         (CpuFSGSBase): Likewise.
 161         (CpuRdRnd): Likewise.
 162         (CpuF16C): Likewise.
 163         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 164         cpuf16c.
 165
 166         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 167         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 168         * i386-init.h: Regenerated.
 169         * i386-tbl.h: Likewise.
 170
 171 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 172
 173         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 174         and mtocrf on EFS.
 175
 176 2010-06-29  Alan Modra  <amodra@gmail.com>
 177
 178         * maxq-dis.c: Delete file.
 179         * Makefile.am: Remove references to maxq.
 180         * configure.in: Likewise.
 181         * disassemble.c: Likewise.
 182         * Makefile.in: Regenerate.
 183         * configure: Regenerate.
 184         * po/POTFILES.in: Regenerate.
 185
 186 2010-06-29  Alan Modra  <amodra@gmail.com>
 187
 188         * mep-dis.c: Regenerate.
 189
 190 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 191
 192         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 193
 194 2010-06-27  Alan Modra  <amodra@gmail.com>
 195
 196         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 197         (decodeInstr): Likewise.
 198         * dlx-dis.c (print_insn_dlx): Likewise.
 199         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 200         * maxq-dis.c (check_move, print_insn): Likewise.
 201         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 202         * msp430-dis.c (msp430_branchinstr): Likewise.
 203         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 204         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 205         * sparc-dis.c (print_insn_sparc): Likewise.
 206         * fr30-asm.c: Regenerate.
 207         * frv-asm.c: Regenerate.
 208         * ip2k-asm.c: Regenerate.
 209         * iq2000-asm.c: Regenerate.
 210         * lm32-asm.c: Regenerate.
 211         * m32c-asm.c: Regenerate.
 212         * m32r-asm.c: Regenerate.
 213         * mep-asm.c: Regenerate.
 214         * mt-asm.c: Regenerate.
 215         * openrisc-asm.c: Regenerate.
 216         * xc16x-asm.c: Regenerate.
 217         * xstormy16-asm.c: Regenerate.
 218
 219 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 220
 221         PR gas/11673
 222         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 223
 224 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 225
 226         PR binutils/11676
 227         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 228
 229 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 230
 231         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 232         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 233         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 234         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 235         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 236         Treat lwsync as msync on e500.
 237
 238 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 239
 240         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 241
 242 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 243
 244         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 245         constants is the same on 32-bit and 64-bit hosts.
 246
 247 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 248
 249         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 250         .short directives so that they can be reassembled.
 251
 252 2010-05-26  Catherine Moore <clm@codesourcery.com>
 253             David Ung  <davidu@mips.com>
 254
 255         * mips-opc.c: Change membership to I1 for instructions ssnop and
 256         ehb.
 257
 258 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 259
 260         * i386-dis.c (sib): New.
 261         (get_sib): Likewise.
 262         (print_insn): Call get_sib.
 263         OP_E_memory): Use sib.
 264
 265 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 266
 267         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 268         * mips-opc.c (I16): Remove.
 269         (mips_builtin_op): Reclassify jalx.
 270
 271 2010-05-19  Alan Modra  <amodra@gmail.com>
 272
 273         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 274         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 275
 276 2010-05-13  Alan Modra  <amodra@gmail.com>
 277
 278         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 279
 280 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 281
 282         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 283         format.
 284         (print_insn_thumb16): Add support for new %W format.
 285
 286 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 287
 288         * Makefile.in: Regenerate with automake 1.11.1.
 289         * aclocal.m4: Ditto.
 290
 291 2010-05-05  Nick Clifton  <nickc@redhat.com>
 292
 293         * po/es.po: Updated Spanish translation.
 294
 295 2010-04-22  Nick Clifton  <nickc@redhat.com>
 296
 297         * po/opcodes.pot: Updated by the Translation project.
 298         * po/vi.po: Updated Vietnamese translation.
 299
 300 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 301
 302         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 303         bits in opcode.
 304
 305 2010-04-09  Nick Clifton  <nickc@redhat.com>
 306
 307         * i386-dis.c (print_insn): Remove unused variable op.
 308         (OP_sI): Remove unused variable mask.
 309
 310 2010-04-07  Alan Modra  <amodra@gmail.com>
 311
 312         * configure: Regenerate.
 313
 314 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 315
 316         * ppc-opc.c (RBOPT): New define.
 317         ("dccci"): Enable for PPCA2.  Make operands optional.
 318         ("iccci"): Likewise.  Do not deprecate for PPC476.
 319
 320 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 321
 322         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 323
 324 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 325
 326         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 327         * Makefile.in: Regenerate.
 328         * configure.in (bfd_tic6x_arch): New.
 329         * configure: Regenerate.
 330         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 331         (disassembler): Handle TI C6X.
 332         * tic6x-dis.c: New.
 333
 334 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 335
 336         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 337
 338 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 339
 340         * dis-buf.c (buffer_read_memory): Give error for reading just
 341         before the start of memory.
 342
 343 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 344             Quentin Neill <quentin.neill@amd.com>
 345
 346         * i386-dis.c (OP_LWP_I): Removed.
 347         (reg_table): Do not use OP_LWP_I, use Iq.
 348         (OP_LWPCB_E): Remove use of names16.
 349         (OP_LWP_E): Same.
 350         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 351         should not set the Vex.length bit.
 352         * i386-tbl.h: Regenerated.
 353
 354 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 355
 356         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 357
 358 2010-02-24  Nick Clifton  <nickc@redhat.com>
 359
 360         PR binutils/6773
 361         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 362         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 363         (thumb32_opcodes): Likewise.
 364
 365 2010-02-15  Nick Clifton  <nickc@redhat.com>
 366
 367         * po/vi.po: Updated Vietnamese translation.
 368
 369 2010-02-12  Doug Evans  <dje@sebabeach.org>
 370
 371         * lm32-opinst.c: Regenerate.
 372
 373 2010-02-11  Doug Evans  <dje@sebabeach.org>
 374
 375         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 376         (print_address): Delete CGEN_PRINT_ADDRESS.
 377         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 378         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 379         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 380         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 381
 382         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 383         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 384         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 385         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 386         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 387         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 388         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 389         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 390         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 391         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 392         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 393         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 394
 395 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 396
 397         * i386-dis.c: Update copyright.
 398         * i386-gen.c: Likewise.
 399         * i386-opc.h: Likewise.
 400         * i386-opc.tbl: Likewise.
 401
 402 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 403             Sebastian Pop  <sebastian.pop@amd.com>
 404
 405         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 406         function to handle 5th imm8 operand.
 407         (PREFIX_VEX_3A48): Added.
 408         (PREFIX_VEX_3A49): Added.
 409         (VEX_W_3A48_P_2): Added.
 410         (VEX_W_3A49_P_2): Added.
 411         (prefix table): Added entries for PREFIX_VEX_3A48
 412         and PREFIX_VEX_3A49.
 413         (vex table): Added entries for VEX_W_3A48_P_2 and
 414         and VEX_W_3A49_P_2.
 415         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 416         for Vec_Imm4 operands.
 417         * i386-opc.h (enum): Added Vec_Imm4.
 418         (i386_operand_type): Added vec_imm4.
 419         * i386-opc.tbl: Add entries for vpermilp[ds].
 420         * i386-init.h: Regenerated.
 421         * i386-tbl.h: Regenerated.
 422
 423 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 424
 425         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 426         and "pwr7".  Move "a2" into alphabetical order.
 427
 428 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 429
 430         * ppc-dis.c (ppc_opts): Add titan entry.
 431         * ppc-opc.c (TITAN, MULHW): Define.
 432         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 433
 434 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 435
 436         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 437         to CPU_BDVER1_FLAGS
 438         * i386-init.h: Regenerated.
 439
 440 2010-02-03  Anthony Green  <green@moxielogic.com>
 441
 442         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 443         0x0f, and make 0x00 an illegal instruction.
 444
 445 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 446
 447         * opcodes/arm-dis.c (struct arm_private_data): New.
 448         (print_insn_coprocessor, print_insn_arm): Update to use struct
 449         arm_private_data.
 450         (is_mapping_symbol, get_map_sym_type): New functions.
 451         (get_sym_code_type): Check the symbol's section.  Do not check
 452         mapping symbols.
 453         (print_insn): Default to disassembling ARM mode code.  Check
 454         for mapping symbols separately from other symbols.  Use
 455         struct arm_private_data.
 456
 457 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 458
 459         * i386-dis.c (EXVexWdqScalar): New.
 460         (vex_scalar_w_dq_mode): Likewise.
 461         (prefix_table): Update entries for PREFIX_VEX_3899,
 462         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 463         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 464         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 465         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 466         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 467         (OP_EX): Likewise.
 468
 469 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 470
 471         * i386-dis.c (XMScalar): New.
 472         (EXdScalar): Likewise.
 473         (EXqScalar): Likewise.
 474         (EXqScalarS): Likewise.
 475         (VexScalar): Likewise.
 476         (EXdVexScalarS): Likewise.
 477         (EXqVexScalarS): Likewise.
 478         (XMVexScalar): Likewise.
 479         (scalar_mode): Likewise.
 480         (d_scalar_mode): Likewise.
 481         (d_scalar_swap_mode): Likewise.
 482         (q_scalar_mode): Likewise.
 483         (q_scalar_swap_mode): Likewise.
 484         (vex_scalar_mode): Likewise.
 485         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 486         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 487         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 488         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 489         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 490         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 491         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 492         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 493         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 494         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 495         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 496         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 497         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 498         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 499         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 500         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 501         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 502         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 503         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 504         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 505         q_scalar_mode, q_scalar_swap_mode.
 506         (OP_XMM): Handle scalar_mode.
 507         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 508         and q_scalar_swap_mode.
 509         (OP_VEX): Handle vex_scalar_mode.
 510
 511 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 512
 513         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 514
 515 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 516
 517         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 518
 519 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 520
 521         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 522
 523 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 524
 525         * i386-dis.c (Bad_Opcode): New.
 526         (bad_opcode): Likewise.
 527         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 528         (dis386_twobyte): Likewise.
 529         (reg_table): Likewise.
 530         (prefix_table): Likewise.
 531         (x86_64_table): Likewise.
 532         (vex_len_table): Likewise.
 533         (vex_w_table): Likewise.
 534         (mod_table): Likewise.
 535         (rm_table): Likewise.
 536         (float_reg): Likewise.
 537         (reg_table): Remove trailing "(bad)" entries.
 538         (prefix_table): Likewise.
 539         (x86_64_table): Likewise.
 540         (vex_len_table): Likewise.
 541         (vex_w_table): Likewise.
 542         (mod_table): Likewise.
 543         (rm_table): Likewise.
 544         (get_valid_dis386): Handle bytemode 0.
 545
 546 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 547
 548         * i386-opc.h (VEXScalar): New.
 549
 550         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 551         instructions.
 552         * i386-tbl.h: Regenerated.
 553
 554 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 555
 556         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 557
 558         * i386-opc.tbl: Add xsave64 and xrstor64.
 559         * i386-tbl.h: Regenerated.
 560
 561 2010-01-20  Nick Clifton  <nickc@redhat.com>
 562
 563         PR 11170
 564         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 565         based post-indexed addressing.
 566
 567 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 568
 569         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 570         * i386-tbl.h: Regenerated.
 571
 572 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 573
 574         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 575         comments.
 576
 577 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 578
 579         * i386-dis.c (names_mm): New.
 580         (intel_names_mm): Likewise.
 581         (att_names_mm): Likewise.
 582         (names_xmm): Likewise.
 583         (intel_names_xmm): Likewise.
 584         (att_names_xmm): Likewise.
 585         (names_ymm): Likewise.
 586         (intel_names_ymm): Likewise.
 587         (att_names_ymm): Likewise.
 588         (print_insn): Set names_mm, names_xmm and names_ymm.
 589         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 590         (OP_XMM): Likewise.
 591         (OP_EM): Likewise.
 592         (OP_EMC): Likewise.
 593         (OP_MXC): Likewise.
 594         (OP_EX): Likewise.
 595         (XMM_Fixup): Likewise.
 596         (OP_VEX): Likewise.
 597         (OP_EX_VexReg): Likewise.
 598         (OP_Vex_2src): Likewise.
 599         (OP_Vex_2src_1): Likewise.
 600         (OP_Vex_2src_2): Likewise.
 601         (OP_REG_VexI4): Likewise.
 602
 603 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 604
 605         * i386-dis.c (print_insn): Update comments.
 606
 607 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 608
 609         * i386-dis.c (rex_original): Removed.
 610         (ckprefix): Remove rex_original.
 611         (print_insn): Update comments.
 612
 613 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 614
 615         * Makefile.in: Regenerate.
 616         * configure: Regenerate.
 617
 618 2010-01-07  Doug Evans  <dje@sebabeach.org>
 619
 620         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 621         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 622         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 623         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 624         * xstormy16-ibld.c: Regenerate.
 625
 626 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 627
 628         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 629         * i386-init.h: Regenerated.
 630
 631 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 632
 633         * arm-dis.c (print_insn): Fixed search for next symbol and data
 634         dumping condition, and the initial mapping symbol state.
 635
 636 2010-01-05  Doug Evans  <dje@sebabeach.org>
 637
 638         * cgen-ibld.in: #include "cgen/basic-modes.h".
 639         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 640         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 641         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 642         * xstormy16-ibld.c: Regenerate.
 643
 644 2010-01-04  Nick Clifton  <nickc@redhat.com>
 645
 646         PR 11123
 647         * arm-dis.c (print_insn_coprocessor): Initialise value.
 648
 649 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 650
 651         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 652
 653 2010-01-02  Doug Evans  <dje@sebabeach.org>
 654
 655         * cgen-asm.in: Update copyright year.
 656         * cgen-dis.in: Update copyright year.
 657         * cgen-ibld.in: Update copyright year.
 658         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 659         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 660         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 661         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 662         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 663         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 664         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 665         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 666         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 667         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 668         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 669         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 670         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 671         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 672         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 673         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 674         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 675         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 676         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 677         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 678         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 679
 680 For older changes see ChangeLog-2009
 681 \f
 682 Local Variables:
 683 mode: change-log
 684 left-margin: 8
 685 fill-column: 74
 686 version-control: never
 687 End: