opcodes/ChangeLog

   1 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-dis.c (PNI_Fixup): Update comment.
   4         (VMX_Fixup): Properly handle the suffix check.
   5
   6 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
   7
   8         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
   9         mfctl disassembly.
  10
  11 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
  12
  13         * Makefile.am: Run "make dep-am".
  14         (stamp-m32c): Fix cpu dependencies.
  15         * Makefile.in: Regenerate.
  16         * ip2k-dis.c: Regenerate.
  17
  18 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
  19
  20         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
  21         (VMX_Fixup): New. Fix up Intel VMX Instructions.
  22         (Em): New.
  23         (Gm): New.
  24         (VM): New.
  25         (dis386_twobyte): Updated entries 0x78 and 0x79.
  26         (twobyte_has_modrm): Likewise.
  27         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
  28         (OP_G): Handle m_mode.
  29
  30 2005-07-14  Jim Blandy  <jimb@redhat.com>
  31
  32         Add support for the Renesas M32C and M16C.
  33         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
  34         * m32c-desc.h, m32c-opc.h: New.
  35         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
  36         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
  37         m32c-opc.c.
  38         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
  39         m32c-ibld.lo, m32c-opc.lo.
  40         (CLEANFILES): List stamp-m32c.
  41         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
  42         (CGEN_CPUS): Add m32c.
  43         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
  44         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
  45         (m32c_opc_h): New variable.
  46         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
  47         (m32c-opc.lo): New rules.
  48         * Makefile.in: Regenerated.
  49         * configure.in: Add case for bfd_m32c_arch.
  50         * configure: Regenerated.
  51         * disassemble.c (ARCH_m32c): New.
  52         [ARCH_m32c]: #include "m32c-desc.h".
  53         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
  54         (disassemble_init_for_target) [ARCH_m32c]: Same.
  55
  56         * cgen-ops.h, cgen-types.h: New files.
  57         * Makefile.am (HFILES): List them.
  58         * Makefile.in: Regenerated.
  59
  60 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
  61
  62         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
  63         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
  64         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
  65         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
  66         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
  67         v850-dis.c: Fix format bugs.
  68         * ia64-gen.c (fail, warn): Add format attribute.
  69         * or32-opc.c (debug): Likewise.
  70
  71 2005-07-07  Khem Raj  <kraj@mvista.com>
  72
  73         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
  74         disassembly pattern.
  75
  76 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
  77
  78         * Makefile.am (stamp-m32r): Fix path to cpu files.
  79         (stamp-m32r, stamp-iq2000): Likewise.
  80         * Makefile.in: Regenerate.
  81         * m32r-asm.c: Regenerate.
  82         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
  83         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
  84
  85 2005-07-05  Nick Clifton  <nickc@redhat.com>
  86
  87         * iq2000-asm.c: Regenerate.
  88         * ms1-asm.c: Regenerate.
  89
  90 2005-07-05  Jan Beulich  <jbeulich@novell.com>
  91
  92         * i386-dis.c (SVME_Fixup): New.
  93         (grps): Use it for the lidt entry.
  94         (PNI_Fixup): Call OP_M rather than OP_E.
  95         (INVLPG_Fixup): Likewise.
  96
  97 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
  98
  99         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 100
 101 2005-07-01  Nick Clifton  <nickc@redhat.com>
 102
 103         * a29k-dis.c: Update to ISO C90 style function declarations and
 104         fix formatting.
 105         * alpha-opc.c: Likewise.
 106         * arc-dis.c: Likewise.
 107         * arc-opc.c: Likewise.
 108         * avr-dis.c: Likewise.
 109         * cgen-asm.in: Likewise.
 110         * cgen-dis.in: Likewise.
 111         * cgen-ibld.in: Likewise.
 112         * cgen-opc.c: Likewise.
 113         * cris-dis.c: Likewise.
 114         * d10v-dis.c: Likewise.
 115         * d30v-dis.c: Likewise.
 116         * d30v-opc.c: Likewise.
 117         * dis-buf.c: Likewise.
 118         * dlx-dis.c: Likewise.
 119         * h8300-dis.c: Likewise.
 120         * h8500-dis.c: Likewise.
 121         * hppa-dis.c: Likewise.
 122         * i370-dis.c: Likewise.
 123         * i370-opc.c: Likewise.
 124         * m10200-dis.c: Likewise.
 125         * m10300-dis.c: Likewise.
 126         * m68k-dis.c: Likewise.
 127         * m88k-dis.c: Likewise.
 128         * mips-dis.c: Likewise.
 129         * mmix-dis.c: Likewise.
 130         * msp430-dis.c: Likewise.
 131         * ns32k-dis.c: Likewise.
 132         * or32-dis.c: Likewise.
 133         * or32-opc.c: Likewise.
 134         * pdp11-dis.c: Likewise.
 135         * pj-dis.c: Likewise.
 136         * s390-dis.c: Likewise.
 137         * sh-dis.c: Likewise.
 138         * sh64-dis.c: Likewise.
 139         * sparc-dis.c: Likewise.
 140         * sparc-opc.c: Likewise.
 141         * sysdep.h: Likewise.
 142         * tic30-dis.c: Likewise.
 143         * tic4x-dis.c: Likewise.
 144         * tic80-dis.c: Likewise.
 145         * v850-dis.c: Likewise.
 146         * v850-opc.c: Likewise.
 147         * vax-dis.c: Likewise.
 148         * w65-dis.c: Likewise.
 149         * z8kgen.c: Likewise.
 150
 151         * fr30-*: Regenerate.
 152         * frv-*: Regenerate.
 153         * ip2k-*: Regenerate.
 154         * iq2000-*: Regenerate.
 155         * m32r-*: Regenerate.
 156         * ms1-*: Regenerate.
 157         * openrisc-*: Regenerate.
 158         * xstormy16-*: Regenerate.
 159
 160 2005-06-23  Ben Elliston  <bje@gnu.org>
 161
 162         * m68k-dis.c: Use ISC C90.
 163         * m68k-opc.c: Formatting fixes.
 164
 165 2005-06-16  David Ung  <davidu@mips.com>
 166
 167         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 168         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 169
 170 2005-06-15  Dave Brolley  <brolley@redhat.com>
 171
 172         Contribute Morpho ms1 on behalf of Red Hat
 173         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 174         ms1-opc.h: New files, Morpho ms1 target.
 175
 176         2004-05-14  Stan Cox  <scox@redhat.com>
 177
 178         * disassemble.c (ARCH_ms1): Define.
 179         (disassembler): Handle bfd_arch_ms1
 180
 181         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 182
 183         * Makefile.am, Makefile.in: Add ms1 target.
 184         * configure.in: Ditto.
 185
 186 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 187
 188         * arm-opc.h: Delete; fold contents into ...
 189         * arm-dis.c: ... here.  Move includes of internal COFF headers
 190         next to includes of internal ELF headers.
 191         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 192         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 193         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 194         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 195         (iwmmxt_wwnames, iwmmxt_wwssnames):
 196         Make const.
 197         (regnames): Remove iWMMXt coprocessor register sets.
 198         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 199         (get_arm_regnames): Adjust fourth argument to match above changes.
 200         (set_iwmmxt_regnames): Delete.
 201         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 202         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 203         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 204         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 205         ISO syntax for function pointer calls.
 206
 207 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 208
 209         * arm-dis.c: Split up the comments describing the format codes, so
 210         that the ARM and 16-bit Thumb opcode tables each have comments
 211         preceding them that describe all the codes, and only the codes,
 212         valid in those tables.  (32-bit Thumb table is already like this.)
 213         Reorder the lists in all three comments to match the order in
 214         which the codes are implemented.
 215         Remove all forward declarations of static functions.  Convert all
 216         function definitions to ISO C format.
 217         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 218         Return nothing.
 219         (print_insn_thumb16): Remove unused case 'I'.
 220         (print_insn): Update for changed calling convention of subroutines.
 221
 222 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 223
 224         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 225         hex (but retain it being displayed as signed). Remove redundant
 226         checks. Add handling of displacements for 16-bit addressing in Intel
 227         mode.
 228
 229 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 230
 231         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 232         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 233         masking of 'rm' in 16-bit memory address handling.
 234
 235 2005-05-19  Anton Blanchard  <anton@samba.org>
 236
 237         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 238         (print_ppc_disassembler_options): Document it.
 239         * ppc-opc.c (SVC_LEV): Define.
 240         (LEV): Allow optional operand.
 241         (POWER5): Define.
 242         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 243         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 244
 245 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 246
 247         * Makefile.in:  Regenerate.
 248
 249 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 250
 251         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 252         instructions.  Adjust disassembly of some opcodes to match
 253         unified syntax.
 254         (thumb32_opcodes): New table.
 255         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 256         two-halfword branches here.
 257         (print_insn_thumb32): New function.
 258         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 259         and print_insn_thumb32.  Be consistent about order of
 260         halfwords when printing 32-bit instructions.
 261
 262 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 263
 264         PR 843
 265         * i386-dis.c (branch_v_mode): New.
 266         (indirEv): Use branch_v_mode instead of v_mode.
 267         (OP_E): Handle branch_v_mode.
 268
 269 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 270
 271         * d10v-dis.c (dis_2_short): Support 64bit host.
 272
 273 2005-05-07  Nick Clifton  <nickc@redhat.com>
 274
 275         * po/nl.po: Updated translation.
 276
 277 2005-05-07  Nick Clifton  <nickc@redhat.com>
 278
 279         * Update the address and phone number of the FSF organization in
 280         the GPL notices in the following files:
 281         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 282         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 283         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 284         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 285         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 286         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 287         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 288         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 289         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 290         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 291         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 292         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 293         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 294         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 295         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 296         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 297         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 298         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 299         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 300         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 301         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 302         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 303         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 304         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 305         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 306         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 307         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 308         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 309         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 310         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 311         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 312         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 313         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 314
 315 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 316
 317         * ia64-opc.c: Include sysdep.h before libiberty.h.
 318
 319 2005-05-05  Nick Clifton  <nickc@redhat.com>
 320
 321         * configure.in (ALL_LINGUAS): Add vi.
 322         * configure: Regenerate.
 323         * po/vi.po: New.
 324
 325 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 326
 327         * configure.in: Fix the check for basename declaration.
 328         * configure: Regenerate.
 329
 330 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 331
 332         * ppc-opc.c (RTO): Define.
 333         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 334         entries to suit PPC440.
 335
 336 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 337
 338         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 339         Add xcrypt-ctr.
 340
 341 2005-04-14  Nick Clifton  <nickc@redhat.com>
 342
 343         * po/fi.po: New translation: Finnish.
 344         * configure.in (ALL_LINGUAS): Add fi.
 345         * configure: Regenerate.
 346
 347 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 348
 349         * Makefile.am (NO_WERROR): Define.
 350         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 351         * Makefile.in: Regenerate.
 352         * aclocal.m4: Regenerate.
 353         * configure: Regenerate.
 354
 355 2005-04-04  Nick Clifton  <nickc@redhat.com>
 356
 357         * fr30-asm.c: Regenerate.
 358         * frv-asm.c: Regenerate.
 359         * iq2000-asm.c: Regenerate.
 360         * m32r-asm.c: Regenerate.
 361         * openrisc-asm.c: Regenerate.
 362
 363 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 364
 365         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 366         visible operands in Intel mode. The first operand of monitor is
 367         %rax in 64-bit mode.
 368
 369 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 370
 371         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 372         easier future additions.
 373
 374 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 375
 376         * configure.in: Check for basename.
 377         * configure: Regenerate.
 378         * config.in: Ditto.
 379
 380 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 381
 382         * i386-dis.c (SEG_Fixup): New.
 383         (Sv): New.
 384         (dis386): Use "Sv" for 0x8c and 0x8e.
 385
 386 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 387             Nick Clifton  <nickc@redhat.com>
 388
 389         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 390         function entry mask addresses.
 391         (entry_addr_occupied_slots): New variable: The number of occupied
 392         elements in entry_addr.
 393         (entry_addr_total_slots): New variable: The total number of
 394         elements in entry_addr.
 395         (parse_disassembler_options): New function.  Fills in the entry_addr
 396         array.
 397         (free_entry_array): New function.  Release the memory used by the
 398         entry addr array.  Suppressed because there is no way to call it.
 399         (is_function_entry): Check if a given address is a function's
 400         start address by looking at supplied entry mask addresses and
 401         symbol information, if available.
 402         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 403
 404 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 405
 406         * cris-dis.c (print_with_operands): Use ~31L for long instead
 407         of ~31.
 408
 409 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 410
 411         * mmix-opc.c (O): Revert the last change.
 412         (Z): Likewise.
 413
 414 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 415
 416         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 417         (Z): Likewise.
 418
 419 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 420
 421         * mmix-opc.c (O, Z): Force expression as unsigned long.
 422
 423 2005-03-18  Nick Clifton  <nickc@redhat.com>
 424
 425         * ip2k-asm.c: Regenerate.
 426         * op/opcodes.pot: Regenerate.
 427
 428 2005-03-16  Nick Clifton  <nickc@redhat.com>
 429             Ben Elliston  <bje@au.ibm.com>
 430
 431         * configure.in (werror): New switch: Add -Werror to the
 432         compiler command line.  Enabled by default.  Disable via
 433         --disable-werror.
 434         * configure: Regenerate.
 435
 436 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 437
 438         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 439         BOOKE.
 440
 441 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 442
 443         * po/es.po: Commit new Spanish translation.
 444
 445         * po/fr.po: Commit new French translation.
 446
 447 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 448
 449         * vax-dis.c: Fix spelling error
 450         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 451         of just "Entry mask: < r1 ... >"
 452
 453 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 454
 455         * arm-dis.c (arm_opcodes): Document %E and %V.
 456         Add entries for v6T2 ARM instructions:
 457         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 458         (print_insn_arm): Add support for %E and %V.
 459         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 460
 461 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 462             Alan Modra  <amodra@bigpond.net.au>
 463
 464         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 465         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 466         (SPRG_MASK): Delete.
 467         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 468         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 469         mfsprg4..7 after msprg and consolidate.
 470
 471 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 472
 473         * vax-dis.c (entry_mask_bit): New array.
 474         (print_insn_vax): Decode function entry mask.
 475
 476 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 477
 478         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 479
 480 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 481
 482         * po/opcodes.pot: Regenerate.
 483
 484 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 485
 486         * arc-dis.c (a4_decoding_class): New enum.
 487         (dsmOneArcInst): Use the enum values for the decoding class.
 488         Remove redundant case in the switch for decodingClass value 11.
 489
 490 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 491
 492         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 493         accesses.
 494         (OP_C): Consider lock prefix in non-64-bit modes.
 495
 496 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 497
 498         * cris-dis.c (format_hex): Remove ineffective warning fix.
 499         * crx-dis.c (make_instruction): Warning fix.
 500         * frv-asm.c: Regenerate.
 501
 502 2005-02-23  Nick Clifton  <nickc@redhat.com>
 503
 504         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 505         read_memory.
 506
 507         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 508
 509         * crx-dis.c (make_instruction): Move argument structure into inner
 510         scope and ensure that all of its fields are initialised before
 511         they are used.
 512
 513         * fr30-asm.c: Regenerate.
 514         * fr30-dis.c: Regenerate.
 515         * frv-asm.c: Regenerate.
 516         * frv-dis.c: Regenerate.
 517         * ip2k-asm.c: Regenerate.
 518         * ip2k-dis.c: Regenerate.
 519         * iq2000-asm.c: Regenerate.
 520         * iq2000-dis.c: Regenerate.
 521         * m32r-asm.c: Regenerate.
 522         * m32r-dis.c: Regenerate.
 523         * openrisc-asm.c: Regenerate.
 524         * openrisc-dis.c: Regenerate.
 525         * xstormy16-asm.c: Regenerate.
 526         * xstormy16-dis.c: Regenerate.
 527
 528 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 529
 530         * arc-ext.c: Warning fixes.
 531         * arc-ext.h: Likewise.
 532         * cgen-opc.c: Likewise.
 533         * ia64-gen.c: Likewise.
 534         * maxq-dis.c: Likewise.
 535         * ns32k-dis.c: Likewise.
 536         * w65-dis.c: Likewise.
 537         * ia64-asmtab.c: Regenerate.
 538
 539 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 540
 541         * fr30-desc.c: Regenerate.
 542         * fr30-desc.h: Regenerate.
 543         * fr30-opc.c: Regenerate.
 544         * fr30-opc.h: Regenerate.
 545         * frv-desc.c: Regenerate.
 546         * frv-desc.h: Regenerate.
 547         * frv-opc.c: Regenerate.
 548         * frv-opc.h: Regenerate.
 549         * ip2k-desc.c: Regenerate.
 550         * ip2k-desc.h: Regenerate.
 551         * ip2k-opc.c: Regenerate.
 552         * ip2k-opc.h: Regenerate.
 553         * iq2000-desc.c: Regenerate.
 554         * iq2000-desc.h: Regenerate.
 555         * iq2000-opc.c: Regenerate.
 556         * iq2000-opc.h: Regenerate.
 557         * m32r-desc.c: Regenerate.
 558         * m32r-desc.h: Regenerate.
 559         * m32r-opc.c: Regenerate.
 560         * m32r-opc.h: Regenerate.
 561         * m32r-opinst.c: Regenerate.
 562         * openrisc-desc.c: Regenerate.
 563         * openrisc-desc.h: Regenerate.
 564         * openrisc-opc.c: Regenerate.
 565         * openrisc-opc.h: Regenerate.
 566         * xstormy16-desc.c: Regenerate.
 567         * xstormy16-desc.h: Regenerate.
 568         * xstormy16-opc.c: Regenerate.
 569         * xstormy16-opc.h: Regenerate.
 570
 571 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 572
 573         * Makefile.am: Run "make dep-am"
 574         * Makefile.in: Regenerate.
 575
 576 2005-02-15  Nick Clifton  <nickc@redhat.com>
 577
 578         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 579         compile time warnings.
 580         (print_keyword): Likewise.
 581         (default_print_insn): Likewise.
 582
 583         * fr30-desc.c: Regenerated.
 584         * fr30-desc.h: Regenerated.
 585         * fr30-dis.c: Regenerated.
 586         * fr30-opc.c: Regenerated.
 587         * fr30-opc.h: Regenerated.
 588         * frv-desc.c: Regenerated.
 589         * frv-dis.c: Regenerated.
 590         * frv-opc.c: Regenerated.
 591         * ip2k-asm.c: Regenerated.
 592         * ip2k-desc.c: Regenerated.
 593         * ip2k-desc.h: Regenerated.
 594         * ip2k-dis.c: Regenerated.
 595         * ip2k-opc.c: Regenerated.
 596         * ip2k-opc.h: Regenerated.
 597         * iq2000-desc.c: Regenerated.
 598         * iq2000-dis.c: Regenerated.
 599         * iq2000-opc.c: Regenerated.
 600         * m32r-asm.c: Regenerated.
 601         * m32r-desc.c: Regenerated.
 602         * m32r-desc.h: Regenerated.
 603         * m32r-dis.c: Regenerated.
 604         * m32r-opc.c: Regenerated.
 605         * m32r-opc.h: Regenerated.
 606         * m32r-opinst.c: Regenerated.
 607         * openrisc-desc.c: Regenerated.
 608         * openrisc-desc.h: Regenerated.
 609         * openrisc-dis.c: Regenerated.
 610         * openrisc-opc.c: Regenerated.
 611         * openrisc-opc.h: Regenerated.
 612         * xstormy16-desc.c: Regenerated.
 613         * xstormy16-desc.h: Regenerated.
 614         * xstormy16-dis.c: Regenerated.
 615         * xstormy16-opc.c: Regenerated.
 616         * xstormy16-opc.h: Regenerated.
 617
 618 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 619
 620         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 621         address.
 622
 623 2005-02-11  Nick Clifton  <nickc@redhat.com>
 624
 625         * iq2000-asm.c: Regenerate.
 626
 627         * frv-dis.c: Regenerate.
 628
 629 2005-02-07  Jim Blandy  <jimb@redhat.com>
 630
 631         * Makefile.am (CGEN): Load guile.scm before calling the main
 632         application script.
 633         * Makefile.in: Regenerated.
 634         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 635         Simply pass the cgen-opc.scm path to ${cgen} as its first
 636         argument; ${cgen} itself now contains the '-s', or whatever is
 637         appropriate for the Scheme being used.
 638
 639 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 640
 641         * configure: Regenerate to track ../gettext.m4.
 642
 643 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 644
 645         * ia64-gen.c (NELEMS): Define.
 646         (shrink): Generate alias with missing second predicate register when
 647         opcode has two outputs and these are both predicates.
 648         * ia64-opc-i.c (FULL17): Define.
 649         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 650         here to generate output template.
 651         (TBITCM, TNATCM): Undefine after use.
 652         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 653         first input. Add ld16 aliases without ar.csd as second output. Add
 654         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 655         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 656         ar.ccv as third/fourth inputs. Consolidate through...
 657         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 658         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 659         * ia64-asmtab.c: Regenerate.
 660
 661 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 662
 663         * configure: Regenerate to track ../gettext.m4 change.
 664
 665 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 666
 667         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 668         * frv-asm.c: Rebuilt.
 669         * frv-desc.c: Rebuilt.
 670         * frv-desc.h: Rebuilt.
 671         * frv-dis.c: Rebuilt.
 672         * frv-ibld.c: Rebuilt.
 673         * frv-opc.c: Rebuilt.
 674         * frv-opc.h: Rebuilt.
 675
 676 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 677
 678         * configure: Regenerate, ../gettext.m4 was updated.
 679
 680 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 681
 682         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 683         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 684         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 685         * mips-dis.c: Ditto.
 686
 687 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 688
 689         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 690
 691 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 692
 693         * mips-dis.c (no_aliases): New disassembly option flag.
 694         (set_default_mips_dis_options): Init no_aliases to zero.
 695         (parse_mips_dis_option): Handle no-aliases option.
 696         (print_insn_mips): Ignore table entries that are aliases
 697         if no_aliases is set.
 698         (print_insn_mips16): Ditto.
 699         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 700         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 701         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 702         * mips16-opc.c (mips16_opcodes): Ditto.
 703
 704 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 705
 706         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 707         (inheritance diagram): Add missing edge.
 708         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 709         easier for the testsuite.
 710         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 711         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 712         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 713         arch_sh2a_or_sh4_up child.
 714         (sh_table): Do renaming as above.
 715         Correct comment for ldc.l for gas testsuite to read.
 716         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 717         Correct comments for movy.w and movy.l for gas testsuite to read.
 718         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 719
 720 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 721
 722         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 723
 724 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 725
 726         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 727
 728 2005-01-10  Andreas Schwab  <schwab@suse.de>
 729
 730         * disassemble.c (disassemble_init_for_target) <case
 731         bfd_arch_ia64>: Set skip_zeroes to 16.
 732         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 733
 734 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 735
 736         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 737
 738 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 739
 740         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 741         memory references. Convert avr_operand() to C90 formatting.
 742
 743 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 744
 745         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 746
 747 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 748
 749         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 750         (no_op_insn): Initialize array with instructions that have no
 751         operands.
 752         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 753
 754 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 755
 756         * arm-dis.c: Correct top-level comment.
 757
 758 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 759
 760         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 761         architecuture defining the insn.
 762         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 763         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 764         field.
 765         Also include opcode/arm.h.
 766         * Makefile.am (arm-dis.lo): Update dependency list.
 767         * Makefile.in: Regenerate.
 768
 769 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 770
 771         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 772         reflect the change to the short immediate syntax.
 773
 774 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 775
 776         * or32-opc.c (debug): Warning fix.
 777         * po/POTFILES.in: Regenerate.
 778
 779         * maxq-dis.c: Formatting.
 780         (print_insn): Warning fix.
 781
 782 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 783
 784         * arm-dis.c (WORD_ADDRESS): Define.
 785         (print_insn): Use it.  Correct big-endian end-of-section handling.
 786
 787 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 788             Vineet Sharma      <vineets@noida.hcltech.com>
 789
 790         * maxq-dis.c: New file.
 791         * disassemble.c (ARCH_maxq): Define.
 792         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 793         instructions..
 794         * configure.in: Add case for bfd_maxq_arch.
 795         * configure: Regenerate.
 796         * Makefile.am: Add support for maxq-dis.c
 797         * Makefile.in: Regenerate.
 798         * aclocal.m4: Regenerate.
 799
 800 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 801
 802         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 803         mode.
 804         * crx-dis.c: Likewise.
 805
 806 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 807
 808         Generally, handle CRISv32.
 809         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 810         (struct cris_disasm_data): New type.
 811         (format_reg, format_hex, cris_constraint, print_flags)
 812         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 813         callers changed.
 814         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 815         (print_insn_crisv32_without_register_prefix)
 816         (print_insn_crisv10_v32_with_register_prefix)
 817         (print_insn_crisv10_v32_without_register_prefix)
 818         (cris_parse_disassembler_options): New functions.
 819         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 820         parameter.  All callers changed.
 821         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 822         failure.
 823         (cris_constraint) <case 'Y', 'U'>: New cases.
 824         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 825         for constraint 'n'.
 826         (print_with_operands) <case 'Y'>: New case.
 827         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 828         <case 'N', 'Y', 'Q'>: New cases.
 829         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 830         (print_insn_cris_with_register_prefix)
 831         (print_insn_cris_without_register_prefix): Call
 832         cris_parse_disassembler_options.
 833         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 834         for CRISv32 and the size of immediate operands.  New v32-only
 835         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 836         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 837         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 838         Change brp to be v3..v10.
 839         (cris_support_regs): New vector.
 840         (cris_opcodes): Update head comment.  New format characters '[',
 841         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 842         Add new opcodes for v32 and adjust existing opcodes to accommodate
 843         differences to earlier variants.
 844         (cris_cond15s): New vector.
 845
 846 2004-11-04 Jan Beulich <jbeulich@novell.com>
 847
 848         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 849         (indirEb): Remove.
 850         (Mp): Use f_mode rather than none at all.
 851         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 852         replaces what previously was x_mode; x_mode now means 128-bit SSE
 853         operands.
 854         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 855         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 856         pinsrw's second operand is Edqw.
 857         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 858         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 859         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 860         mode when an operand size override is present or always suffixing.
 861         More instructions will need to be added to this group.
 862         (putop): Handle new macro chars 'C' (short/long suffix selector),
 863         'I' (Intel mode override for following macro char), and 'J' (for
 864         adding the 'l' prefix to far branches in AT&T mode). When an
 865         alternative was specified in the template, honor macro character when
 866         specified for Intel mode.
 867         (OP_E): Handle new *_mode values. Correct pointer specifications for
 868         memory operands. Consolidate output of index register.
 869         (OP_G): Handle new *_mode values.
 870         (OP_I): Handle const_1_mode.
 871         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 872         respective opcode prefix bits have been consumed.
 873         (OP_EM, OP_EX): Provide some default handling for generating pointer
 874         specifications.
 875
 876 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 877
 878         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 879         COP_INST macro.
 880
 881 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 882
 883         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 884         (getregliststring): Support HI/LO and user registers.
 885         * crx-opc.c (crx_instruction): Update data structure according to the
 886         rearrangement done in CRX opcode header file.
 887         (crx_regtab):  Likewise.
 888         (crx_optab):  Likewise.
 889         (crx_instruction): Reorder load/stor instructions, remove unsupported
 890         formats.
 891         support new Co-Processor instruction 'cpi'.
 892
 893 2004-10-27  Nick Clifton  <nickc@redhat.com>
 894
 895         * opcodes/iq2000-asm.c: Regenerate.
 896         * opcodes/iq2000-desc.c: Regenerate.
 897         * opcodes/iq2000-desc.h: Regenerate.
 898         * opcodes/iq2000-dis.c: Regenerate.
 899         * opcodes/iq2000-ibld.c: Regenerate.
 900         * opcodes/iq2000-opc.c: Regenerate.
 901         * opcodes/iq2000-opc.h: Regenerate.
 902
 903 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 904
 905         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 906         us4, us5 (respectively).
 907         Remove unsupported 'popa' instruction.
 908         Reverse operands order in store co-processor instructions.
 909
 910 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 911
 912         * Makefile.am: Run "make dep-am"
 913         * Makefile.in: Regenerate.
 914
 915 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 916
 917         * xtensa-dis.c: Use ISO C90 formatting.
 918
 919 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 920
 921         * ppc-opc.c: Revert 2004-09-09 change.
 922
 923 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 924
 925         * xtensa-dis.c (state_names): Delete.
 926         (fetch_data): Use xtensa_isa_maxlength.
 927         (print_xtensa_operand): Replace operand parameter with opcode/operand
 928         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 929         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 930         instruction bundles.  Use xmalloc instead of malloc.
 931
 932 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 933
 934         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 935         initializers.
 936
 937 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 938
 939         * crx-opc.c (crx_instruction): Support Co-processor insns.
 940         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 941         (getregliststring): Change function to use the above enum.
 942         (print_arg): Handle CO-Processor insns.
 943         (crx_cinvs): Add 'b' option to invalidate the branch-target
 944         cache.
 945
 946 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 947
 948         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 949         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 950         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 951         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 952         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 953
 954 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 955
 956         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 957         rather than add it.
 958
 959 2004-09-30  Paul Brook  <paul@codesourcery.com>
 960
 961         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 962         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 963
 964 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 965
 966         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 967         (CONFIG_STATUS_DEPENDENCIES): New.
 968         (Makefile): Removed.
 969         (config.status): Likewise.
 970         * Makefile.in: Regenerated.
 971
 972 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 973
 974         * Makefile.am: Run "make dep-am".
 975         * Makefile.in: Regenerate.
 976         * aclocal.m4: Regenerate.
 977         * configure: Regenerate.
 978         * po/POTFILES.in: Regenerate.
 979         * po/opcodes.pot: Regenerate.
 980
 981 2004-09-11  Andreas Schwab  <schwab@suse.de>
 982
 983         * configure: Rebuild.
 984
 985 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 986
 987         * ppc-opc.c (L): Make this field not optional.
 988
 989 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 990
 991         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 992         Fix parameter to 'm[t|f]csr' insns.
 993
 994 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 995
 996         * configure.in: Autoupdate to autoconf 2.59.
 997         * aclocal.m4: Rebuild with aclocal 1.4p6.
 998         * configure: Rebuild with autoconf 2.59.
 999         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1000         bfd changes for autoconf 2.59 on the way).
1001         * config.in: Rebuild with autoheader 2.59.
1002
1003 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1004
1005         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1006
1007 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1008
1009         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1010         (GRPPADLCK2): New define.
1011         (twobyte_has_modrm): True for 0xA6.
1012         (grps): GRPPADLCK2 for opcode 0xA6.
1013
1014 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1015
1016         Introduce SH2a support.
1017         * sh-opc.h (arch_sh2a_base): Renumber.
1018         (arch_sh2a_nofpu_base): Remove.
1019         (arch_sh_base_mask): Adjust.
1020         (arch_opann_mask): New.
1021         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1022         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1023         (sh_table): Adjust whitespace.
1024         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1025         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1026         instruction list throughout.
1027         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1028         of arch_sh2a in instruction list throughout.
1029         (arch_sh2e_up): Accomodate above changes.
1030         (arch_sh2_up): Ditto.
1031         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1032         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1033         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1034         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1035         * sh-opc.h (arch_sh2a_nofpu): New.
1036         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1037         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1038         instruction.
1039         2004-01-20  DJ Delorie  <dj@redhat.com>
1040         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1041         2003-12-29  DJ Delorie  <dj@redhat.com>
1042         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1043         sh_opcode_info, sh_table): Add sh2a support.
1044         (arch_op32): New, to tag 32-bit opcodes.
1045         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1046         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1047         * sh-opc.h (arch_sh2a): Add.
1048         * sh-dis.c (arch_sh2a): Handle.
1049         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1050
1051 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1052
1053         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1054
1055 2004-07-22  Nick Clifton  <nickc@redhat.com>
1056
1057         PR/280
1058         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1059         insns - this is done by objdump itself.
1060         * h8500-dis.c (print_insn_h8500): Likewise.
1061
1062 2004-07-21  Jan Beulich <jbeulich@novell.com>
1063
1064         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1065         regardless of address size prefix in effect.
1066         (ptr_reg): Size or address registers does not depend on rex64, but
1067         on the presence of an address size override.
1068         (OP_MMX): Use rex.x only for xmm registers.
1069         (OP_EM): Use rex.z only for xmm registers.
1070
1071 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1072
1073         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1074         move/branch operations to the bottom so that VR5400 multimedia
1075         instructions take precedence in disassembly.
1076
1077 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1078
1079         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1080         ISA-specific "break" encoding.
1081
1082 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1083
1084         * arm-opc.h: Fix typo in comment.
1085
1086 2004-07-11  Andreas Schwab  <schwab@suse.de>
1087
1088         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1089
1090 2004-07-09  Andreas Schwab  <schwab@suse.de>
1091
1092         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1093
1094 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1095
1096         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1097         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1098         (crx-dis.lo): New target.
1099         (crx-opc.lo): Likewise.
1100         * Makefile.in: Regenerate.
1101         * configure.in: Handle bfd_crx_arch.
1102         * configure: Regenerate.
1103         * crx-dis.c: New file.
1104         * crx-opc.c: New file.
1105         * disassemble.c (ARCH_crx): Define.
1106         (disassembler): Handle ARCH_crx.
1107
1108 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1109
1110         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1111         * ia64-asmtab.c: Regnerate.
1112
1113 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1114
1115         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1116         (extract_fxm): Don't test dialect.
1117         (XFXFXM_MASK): Include the power4 bit.
1118         (XFXM): Add p4 param.
1119         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1120
1121 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1122
1123         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1124         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1125
1126 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1127
1128         * ppc-opc.c (BH, XLBH_MASK): Define.
1129         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1130
1131 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1132
1133         * i386-dis.c (x_mode): Comment.
1134         (two_source_ops): File scope.
1135         (float_mem): Correct fisttpll and fistpll.
1136         (float_mem_mode): New table.
1137         (dofloat): Use it.
1138         (OP_E): Correct intel mode PTR output.
1139         (ptr_reg): Use open_char and close_char.
1140         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1141         operands.  Set two_source_ops.
1142
1143 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1144
1145         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1146         instead of _raw_size.
1147
1148 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1149
1150         * ia64-gen.c (in_iclass): Handle more postinc st
1151         and ld variants.
1152         * ia64-asmtab.c: Rebuilt.
1153
1154 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1155
1156         * s390-opc.txt: Correct architecture mask for some opcodes.
1157         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1158         in the esa mode as well.
1159
1160 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1161
1162         * sh-dis.c (target_arch): Make unsigned.
1163         (print_insn_sh): Replace (most of) switch with a call to
1164         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1165         * sh-opc.h: Redefine architecture flags values.
1166         Add sh3-nommu architecture.
1167         Reorganise <arch>_up macros so they make more visual sense.
1168         (SH_MERGE_ARCH_SET): Define new macro.
1169         (SH_VALID_BASE_ARCH_SET): Likewise.
1170         (SH_VALID_MMU_ARCH_SET): Likewise.
1171         (SH_VALID_CO_ARCH_SET): Likewise.
1172         (SH_VALID_ARCH_SET): Likewise.
1173         (SH_MERGE_ARCH_SET_VALID): Likewise.
1174         (SH_ARCH_SET_HAS_FPU): Likewise.
1175         (SH_ARCH_SET_HAS_DSP): Likewise.
1176         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1177         (sh_get_arch_from_bfd_mach): Add prototype.
1178         (sh_get_arch_up_from_bfd_mach): Likewise.
1179         (sh_get_bfd_mach_from_arch_set): Likewise.
1180         (sh_merge_bfd_arc): Likewise.
1181
1182 2004-05-24  Peter Barada  <peter@the-baradas.com>
1183
1184         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1185         into new match_insn_m68k function.  Loop over canidate
1186         matches and select first that completely matches.
1187         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1188         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1189         to verify addressing for MAC/EMAC.
1190         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1191         reigster halves since 'fpu' and 'spl' look misleading.
1192         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1193         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1194         first, tighten up match masks.
1195         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1196         'size' from special case code in print_insn_m68k to
1197         determine decode size of insns.
1198
1199 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1200
1201         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1202         well as when -mpower4.
1203
1204 2004-05-13  Nick Clifton  <nickc@redhat.com>
1205
1206         * po/fr.po: Updated French translation.
1207
1208 2004-05-05  Peter Barada  <peter@the-baradas.com>
1209
1210         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1211         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1212         * m68k-op.c: Switch from ColdFire chips to core variants.
1213
1214 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1215
1216         PR 147.
1217         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1218
1219 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1220
1221         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1222         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1223
1224 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1225
1226         * sh-dis.c (print_insn_sh): Print the value in constant pool
1227         as a symbol if it looks like a symbol.
1228
1229 2004-04-22  Peter Barada <peter@the-baradas.com>
1230
1231         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1232         appropriate ColdFire architectures.
1233         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1234         mask addressing.
1235         Add EMAC instructions, fix MAC instructions. Remove
1236         macmw/macml/msacmw/msacml instructions since mask addressing now
1237         supported.
1238
1239 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1240
1241         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1242         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1243         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1244         macro.  Adjust all users.
1245
1246 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1247
1248         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1249         separately.
1250
1251 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1252
1253         * m32r-asm.c: Regenerate.
1254
1255 2004-03-29  Stan Shebs  <shebs@apple.com>
1256
1257         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1258         used.
1259
1260 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1261
1262         * aclocal.m4: Regenerate.
1263         * config.in: Regenerate.
1264         * configure: Regenerate.
1265         * po/POTFILES.in: Regenerate.
1266         * po/opcodes.pot: Regenerate.
1267
1268 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1269
1270         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1271         PPC_OPERANDS_GPR_0.
1272         * ppc-opc.c (RA0): Define.
1273         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1274         (RAOPT): Rename from RAO.  Update all uses.
1275         (powerpc_opcodes): Use RA0 as appropriate.
1276
1277 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1278
1279         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1280
1281 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1282
1283         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1284
1285 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1286
1287         * i386-dis.c (GRPPLOCK): Delete.
1288         (grps): Delete GRPPLOCK entry.
1289
1290 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1291
1292         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1293         (M, Mp): Use OP_M.
1294         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1295         (GRPPADLCK): Define.
1296         (dis386): Use NOP_Fixup on "nop".
1297         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1298         (twobyte_has_modrm): Set for 0xa7.
1299         (padlock_table): Delete.  Move to..
1300         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1301         and clflush.
1302         (print_insn): Revert PADLOCK_SPECIAL code.
1303         (OP_E): Delete sfence, lfence, mfence checks.
1304
1305 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1306
1307         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1308         (INVLPG_Fixup): New function.
1309         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1310
1311 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1312
1313         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1314         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1315         (padlock_table): New struct with PadLock instructions.
1316         (print_insn): Handle PADLOCK_SPECIAL.
1317
1318 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1319
1320         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1321         (OP_E): Twiddle clflush to sfence here.
1322
1323 2004-03-08  Nick Clifton  <nickc@redhat.com>
1324
1325         * po/de.po: Updated German translation.
1326
1327 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1328
1329         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1330         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1331         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1332         accordingly.
1333
1334 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1335
1336         * frv-asm.c: Regenerate.
1337         * frv-desc.c: Regenerate.
1338         * frv-desc.h: Regenerate.
1339         * frv-dis.c: Regenerate.
1340         * frv-ibld.c: Regenerate.
1341         * frv-opc.c: Regenerate.
1342         * frv-opc.h: Regenerate.
1343
1344 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1345
1346         * frv-desc.c, frv-opc.c: Regenerate.
1347
1348 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1349
1350         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1351
1352 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1353
1354         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1355         Also correct mistake in the comment.
1356
1357 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1358
1359         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1360         ensure that double registers have even numbers.
1361         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1362         that reserved instruction 0xfffd does not decode the same
1363         as 0xfdfd (ftrv).
1364         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1365         REG_N refers to a double register.
1366         Add REG_N_B01 nibble type and use it instead of REG_NM
1367         in ftrv.
1368         Adjust the bit patterns in a few comments.
1369
1370 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1371
1372         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1373
1374 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1375
1376         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1377
1378 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1379
1380         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1381
1382 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1383
1384         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1385         mtivor32, mtivor33, mtivor34.
1386
1387 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1388
1389         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1390
1391 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1392
1393         * arm-opc.h Maverick accumulator register opcode fixes.
1394
1395 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1396
1397         * m32r-dis.c: Regenerate.
1398
1399 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1400
1401         * sh-opc.h (sh_table): "fsrra", not "fssra".
1402
1403 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1404
1405         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1406         contraints.
1407
1408 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1409
1410         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1411
1412 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1413
1414         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1415         1.  Don't print scale factor on AT&T mode when index missing.
1416
1417 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1418
1419         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1420         when loaded into XR registers.
1421
1422 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1423
1424         * frv-desc.h: Regenerate.
1425         * frv-desc.c: Regenerate.
1426         * frv-opc.c: Regenerate.
1427
1428 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1429
1430         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1431
1432 2004-01-09  Paul Brook  <paul@codesourcery.com>
1433
1434         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1435         specific opcodes.
1436
1437 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1438
1439         * Makefile.am (libopcodes_la_DEPENDENCIES)
1440         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1441         comment about the problem.
1442         * Makefile.in: Regenerate.
1443
1444 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1445
1446         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1447         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1448         cut&paste errors in shifting/truncating numerical operands.
1449         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1450         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1451         (parse_uslo16): Likewise.
1452         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1453         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1454         (parse_s12): Likewise.
1455         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1456         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1457         (parse_uslo16): Likewise.
1458         (parse_uhi16): Parse gothi and gotfuncdeschi.
1459         (parse_d12): Parse got12 and gotfuncdesc12.
1460         (parse_s12): Likewise.
1461
1462 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1463
1464         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1465         instruction which looks similar to an 'rla' instruction.
1466
1467 For older changes see ChangeLog-0203
1468 \f
1469 Local Variables:
1470 mode: change-log
1471 left-margin: 8
1472 fill-column: 74
1473 version-control: never
1474 End: