opcodes/ChangeLog

   1 2020-02-11  Alan Modra  <amodra@gmail.com>
   2
   3         * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
   4         * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
   5         * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
   6         * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
   7         * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
   8
   9 2020-02-10  Matthew Malcomson  <matthew.malcomson@arm.com>
  10
  11         * arm-dis.c (print_insn_cde): Define 'V' parse character.
  12         (cde_opcodes): Add VCX* instructions.
  13
  14 2020-02-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
  15             Matthew Malcomson  <matthew.malcomson@arm.com>
  16
  17         * arm-dis.c (struct cdeopcode32): New.
  18         (CDE_OPCODE): New macro.
  19         (cde_opcodes): New disassembly table.
  20         (regnames): New option to table.
  21         (cde_coprocs): New global variable.
  22         (print_insn_cde): New
  23         (print_insn_thumb32): Use print_insn_cde.
  24         (parse_arm_disassembler_options): Parse coprocN args.
  25
  26 2020-02-10  H.J. Lu  <hongjiu.lu@intel.com>
  27
  28         PR gas/25516
  29         * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
  30         with ISA64.
  31         * i386-opc.h (AMD64): Removed.
  32         (Intel64): Likewose.
  33         (AMD64): New.
  34         (INTEL64): Likewise.
  35         (INTEL64ONLY): Likewise.
  36         (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
  37         * i386-opc.tbl (Amd64): New.
  38         (Intel64): Likewise.
  39         (Intel64Only): Likewise.
  40         Replace AMD64 with Amd64.  Update sysenter/sysenter with
  41         Cpu64 and Intel64Only.  Remove AMD64 from sysenter/sysenter.
  42         * i386-tbl.h: Regenerated.
  43
  44 2020-02-07  Sergey Belyashov  <sergey.belyashov@gmail.com>
  45
  46         PR 25469
  47         * z80-dis.c: Add support for GBZ80 opcodes.
  48
  49 2020-02-04  Alan Modra  <amodra@gmail.com>
  50
  51         * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
  52
  53 2020-02-03  Alan Modra  <amodra@gmail.com>
  54
  55         * m32c-ibld.c: Regenerate.
  56
  57 2020-02-01  Alan Modra  <amodra@gmail.com>
  58
  59         * frv-ibld.c: Regenerate.
  60
  61 2020-01-31  Jan Beulich  <jbeulich@suse.com>
  62
  63         * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
  64         (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
  65         (OP_E_memory): Replace xmm_mdq_mode case label by
  66         vex_scalar_w_dq_mode one.
  67         * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
  68
  69 2020-01-31  Jan Beulich  <jbeulich@suse.com>
  70
  71         * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
  72         (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
  73         vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
  74         (intel_operand_size): Drop vex_w_dq_mode case label.
  75
  76 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
  77
  78         * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
  79         Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
  80
  81 2020-01-30  Alan Modra  <amodra@gmail.com>
  82
  83         * m32c-ibld.c: Regenerate.
  84
  85 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
  86
  87         * bpf-opc.c: Regenerate.
  88
  89 2020-01-30  Jan Beulich  <jbeulich@suse.com>
  90
  91         * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
  92         (dis386): Use them to replace C2/C3 table entries.
  93         (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
  94         * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
  95         ones. Use Size64 instead of DefaultSize on Intel64 ones.
  96         * i386-tbl.h: Re-generate.
  97
  98 2020-01-30  Jan Beulich  <jbeulich@suse.com>
  99
 100         * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
 101         forms.
 102         (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
 103         DefaultSize.
 104         * i386-tbl.h: Re-generate.
 105
 106 2020-01-30  Alan Modra  <amodra@gmail.com>
 107
 108         * tic4x-dis.c (tic4x_dp): Make unsigned.
 109
 110 2020-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 111             Jan Beulich  <jbeulich@suse.com>
 112
 113         PR binutils/25445
 114         * i386-dis.c (MOVSXD_Fixup): New function.
 115         (movsxd_mode): New enum.
 116         (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
 117         (intel_operand_size): Handle movsxd_mode.
 118         (OP_E_register): Likewise.
 119         (OP_G): Likewise.
 120         * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
 121         register on movsxd.  Add movsxd with 16-bit destination register
 122         for AMD64 and Intel64 ISAs.
 123         * i386-tbl.h: Regenerated.
 124
 125 2020-01-27  Tamar Christina  <tamar.christina@arm.com>
 126
 127         PR 25403
 128         * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
 129         * aarch64-asm-2.c: Regenerate
 130         * aarch64-dis-2.c: Likewise.
 131         * aarch64-opc-2.c: Likewise.
 132
 133 2020-01-21  Jan Beulich  <jbeulich@suse.com>
 134
 135         * i386-opc.tbl (sysret): Drop DefaultSize.
 136         * i386-tbl.h: Re-generate.
 137
 138 2020-01-21  Jan Beulich  <jbeulich@suse.com>
 139
 140         * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
 141         Dword.
 142         (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
 143         * i386-tbl.h: Re-generate.
 144
 145 2020-01-20  Nick Clifton  <nickc@redhat.com>
 146
 147         * po/de.po: Updated German translation.
 148         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 149         * po/uk.po: Updated Ukranian translation.
 150
 151 2020-01-20  Alan Modra  <amodra@gmail.com>
 152
 153         * hppa-dis.c (fput_const): Remove useless cast.
 154
 155 2020-01-20  Alan Modra  <amodra@gmail.com>
 156
 157         * arm-dis.c (print_insn_arm): Wrap 'T' value.
 158
 159 2020-01-18  Nick Clifton  <nickc@redhat.com>
 160
 161         * configure: Regenerate.
 162         * po/opcodes.pot: Regenerate.
 163
 164 2020-01-18  Nick Clifton  <nickc@redhat.com>
 165
 166         Binutils 2.34 branch created.
 167
 168 2020-01-17  Christian Biesinger  <cbiesinger@google.com>
 169
 170         * opintl.h: Fix spelling error (seperate).
 171
 172 2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
 173
 174         * i386-opc.tbl: Add {vex} pseudo prefix.
 175         * i386-tbl.h: Regenerated.
 176
 177 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 178
 179         PR 25376
 180         * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
 181         (neon_opcodes): Likewise.
 182         (select_arm_features): Make sure we enable MVE bits when selecting
 183         armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
 184         any architecture.
 185
 186 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 187
 188         * i386-opc.tbl: Drop stale comment from XOP section.
 189
 190 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 191
 192         * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
 193         (extractps): Add VexWIG to SSE2AVX forms.
 194         * i386-tbl.h: Re-generate.
 195
 196 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 197
 198         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
 199         Size64 from and use VexW1 on SSE2AVX forms.
 200         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
 201         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
 202         * i386-tbl.h: Re-generate.
 203
 204 2020-01-15  Alan Modra  <amodra@gmail.com>
 205
 206         * tic4x-dis.c (tic4x_version): Make unsigned long.
 207         (optab, optab_special, registernames): New file scope vars.
 208         (tic4x_print_register): Set up registernames rather than
 209         malloc'd registertable.
 210         (tic4x_disassemble): Delete optable and optable_special.  Use
 211         optab and optab_special instead.  Throw away old optab,
 212         optab_special and registernames when info->mach changes.
 213
 214 2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
 215
 216         PR 25377
 217         * z80-dis.c (suffix): Use .db instruction to generate double
 218         prefix.
 219
 220 2020-01-14  Alan Modra  <amodra@gmail.com>
 221
 222         * z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
 223         values to unsigned before shifting.
 224
 225 2020-01-13  Thomas Troeger  <tstroege@gmx.de>
 226
 227         * arm-dis.c (print_insn_arm): Fill in insn info fields for control
 228         flow instructions.
 229         (print_insn_thumb16, print_insn_thumb32): Likewise.
 230         (print_insn): Initialize the insn info.
 231         * i386-dis.c (print_insn): Initialize the insn info fields, and
 232         detect jumps.
 233
 234 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
 235
 236         * arc-opc.c (C_NE): Make it required.
 237
 238 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
 239
 240         * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
 241         reserved register name.
 242
 243 2020-01-13  Alan Modra  <amodra@gmail.com>
 244
 245         * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
 246         (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
 247
 248 2020-01-13  Alan Modra  <amodra@gmail.com>
 249
 250         * wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
 251         result of wasm_read_leb128 in a uint64_t and check that bits
 252         are not lost when copying to other locals.  Use uint32_t for
 253         most locals.  Use PRId64 when printing int64_t.
 254
 255 2020-01-13  Alan Modra  <amodra@gmail.com>
 256
 257         * score-dis.c: Formatting.
 258         * score7-dis.c: Formatting.
 259
 260 2020-01-13  Alan Modra  <amodra@gmail.com>
 261
 262         * score-dis.c (print_insn_score48): Use unsigned variables for
 263         unsigned values.  Don't left shift negative values.
 264         (print_insn_score32): Likewise.
 265         * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
 266
 267 2020-01-13  Alan Modra  <amodra@gmail.com>
 268
 269         * tic4x-dis.c (tic4x_print_register): Remove dead code.
 270
 271 2020-01-13  Alan Modra  <amodra@gmail.com>
 272
 273         * fr30-ibld.c: Regenerate.
 274
 275 2020-01-13  Alan Modra  <amodra@gmail.com>
 276
 277         * xgate-dis.c (print_insn): Don't left shift signed value.
 278         (ripBits): Formatting, use 1u.
 279
 280 2020-01-10  Alan Modra  <amodra@gmail.com>
 281
 282         * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
 283         * tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
 284
 285 2020-01-10  Alan Modra  <amodra@gmail.com>
 286
 287         * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
 288         and XRREG value earlier to avoid a shift with negative exponent.
 289         * m10200-dis.c (disassemble): Similarly.
 290
 291 2020-01-09  Nick Clifton  <nickc@redhat.com>
 292
 293         PR 25224
 294         * z80-dis.c (ld_ii_ii): Use correct cast.
 295
 296 2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
 297
 298         PR 25224
 299         * z80-dis.c (ld_ii_ii): Use character constant when checking
 300         opcode byte value.
 301
 302 2020-01-09  Jan Beulich  <jbeulich@suse.com>
 303
 304         * i386-dis.c (SEP_Fixup): New.
 305         (SEP): Define.
 306         (dis386_twobyte): Use it for sysenter/sysexit.
 307         (enum x86_64_isa): Change amd64 enumerator to value 1.
 308         (OP_J): Compare isa64 against intel64 instead of amd64.
 309         * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
 310         forms.
 311         * i386-tbl.h: Re-generate.
 312
 313 2020-01-08  Alan Modra  <amodra@gmail.com>
 314
 315         * z8k-dis.c: Include libiberty.h
 316         (instr_data_s): Make max_fetched unsigned.
 317         (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
 318         Don't exceed byte_info bounds.
 319         (output_instr): Make num_bytes unsigned.
 320         (unpack_instr): Likewise for nibl_count and loop.
 321         * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
 322         idx unsigned.
 323         * z8k-opc.h: Regenerate.
 324
 325 2020-01-07  Shahab Vahedi  <shahab@synopsys.com>
 326
 327         * arc-tbl.h (llock): Use 'LLOCK' as class.
 328         (llockd): Likewise.
 329         (scond): Use 'SCOND' as class.
 330         (scondd): Likewise.
 331         (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
 332         (scondd): Likewise.
 333
 334 2020-01-06  Alan Modra  <amodra@gmail.com>
 335
 336         * m32c-ibld.c: Regenerate.
 337
 338 2020-01-06  Alan Modra  <amodra@gmail.com>
 339
 340         PR 25344
 341         * z80-dis.c (suffix): Don't use a local struct buffer copy.
 342         Peek at next byte to prevent recursion on repeated prefix bytes.
 343         Ensure uninitialised "mybuf" is not accessed.
 344         (print_insn_z80): Don't zero n_fetch and n_used here,..
 345         (print_insn_z80_buf): ..do it here instead.
 346
 347 2020-01-04  Alan Modra  <amodra@gmail.com>
 348
 349         * m32r-ibld.c: Regenerate.
 350
 351 2020-01-04  Alan Modra  <amodra@gmail.com>
 352
 353         * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
 354
 355 2020-01-04  Alan Modra  <amodra@gmail.com>
 356
 357         * crx-dis.c (match_opcode): Avoid shift left of signed value.
 358
 359 2020-01-04  Alan Modra  <amodra@gmail.com>
 360
 361         * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
 362
 363 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 364
 365         * aarch64-tbl.h (aarch64_opcode_table): Use
 366         SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
 367
 368 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 369
 370         * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
 371         forms of SUDOT and USDOT.
 372
 373 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 374
 375         * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
 376         uzip{1,2}.
 377         * opcodes/aarch64-dis-2.c: Re-generate.
 378
 379 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 380
 381         * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
 382         FMMLA encoding.
 383         * opcodes/aarch64-dis-2.c: Re-generate.
 384
 385 2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
 386
 387         * z80-dis.c: Add support for eZ80 and Z80 instructions.
 388
 389 2020-01-01  Alan Modra  <amodra@gmail.com>
 390
 391         Update year range in copyright notice of all files.
 392
 393 For older changes see ChangeLog-2019
 394 \f
 395 Copyright (C) 2020 Free Software Foundation, Inc.
 396
 397 Copying and distribution of this file, with or without modification,
 398 are permitted in any medium without royalty provided the copyright
 399 notice and this notice are preserved.
 400
 401 Local Variables:
 402 mode: change-log
 403 left-margin: 8
 404 fill-column: 74
 405 version-control: never
 406 End: