1 2015-04-15 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-dis.c (prefix_requirement): Removed.
4 (print_insn): Don't set prefix_requirement. Check
5 dp->prefix_requirement instead of prefix_requirement.
7 2015-04-15 H.J. Lu <hongjiu.lu@intel.com>
10 * i386-dis.c (PREFIX_0FC7_REG_6): Renamed to ...
11 (PREFIX_MOD_0_0FC7_REG_6): This.
12 (PREFIX_MOD_3_0FC7_REG_6): New.
13 (PREFIX_MOD_3_0FC7_REG_7): Likewise.
14 (prefix_table): Replace PREFIX_0FC7_REG_6 with
15 PREFIX_MOD_0_0FC7_REG_6. Add PREFIX_MOD_3_0FC7_REG_6 and
16 PREFIX_MOD_3_0FC7_REG_7.
17 (mod_table): Replace PREFIX_0FC7_REG_6 with
18 PREFIX_MOD_0_0FC7_REG_6. Use PREFIX_MOD_3_0FC7_REG_6 and
19 PREFIX_MOD_3_0FC7_REG_7.
21 2015-04-15 H.J. Lu <hongjiu.lu@intel.com>
23 * i386-dis.c (PREFIX_MANDATORY_REPZ): Removed.
24 (PREFIX_MANDATORY_REPNZ): Likewise.
25 (PREFIX_MANDATORY_DATA): Likewise.
26 (PREFIX_MANDATORY_ADDR): Likewise.
27 (PREFIX_MANDATORY_LOCK): Likewise.
28 (PREFIX_MANDATORY): Likewise.
29 (PREFIX_UD_SHIFT): Set to 8
30 (PREFIX_UD_REPZ): Updated.
31 (PREFIX_UD_REPNZ): Likewise.
32 (PREFIX_UD_DATA): Likewise.
33 (PREFIX_UD_ADDR): Likewise.
34 (PREFIX_UD_LOCK): Likewise.
35 (PREFIX_IGNORED_SHIFT): New.
36 (PREFIX_IGNORED_REPZ): Likewise.
37 (PREFIX_IGNORED_REPNZ): Likewise.
38 (PREFIX_IGNORED_DATA): Likewise.
39 (PREFIX_IGNORED_ADDR): Likewise.
40 (PREFIX_IGNORED_LOCK): Likewise.
41 (PREFIX_OPCODE): Likewise.
42 (PREFIX_IGNORED): Likewise.
43 (Bad_Opcode): Replace PREFIX_MANDATORY with 0.
44 (dis386_twobyte): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
45 (three_byte_table): Likewise.
46 (mod_table): Likewise.
47 (mandatory_prefix): Renamed to ...
48 (prefix_requirement): This.
49 (prefix_table): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
50 Update PREFIX_90 entry.
51 (get_valid_dis386): Check prefix_requirement to see if a prefix
53 (print_insn): Replace mandatory_prefix with prefix_requirement.
55 2015-04-15 Renlin Li <renlin.li@arm.com>
57 * arm-dis.c (thumb32_opcodes): Define 'D' format control code,
58 use it for ssat and ssat16.
59 (print_insn_thumb32): Add handle case for 'D' control code.
61 2015-04-06 Ilya Tocar <ilya.tocar@intel.com>
62 H.J. Lu <hongjiu.lu@intel.com>
64 * i386-dis-evex.h (evex_table): Fill prefix_requirement field.
65 * i386-dis.c (PREFIX_MANDATORY_REPZ, PREFIX_MANDATORY_REPNZ,
66 PREFIX_MANDATORY_DATA, PREFIX_MANDATORY_ADDR, PREFIX_MANDATORY_LOCK,
67 PREFIX_UD_SHIFT, PREFIX_UD_REPZ, REFIX_UD_REPNZ, PREFIX_UD_DATA,
68 PREFIX_UD_ADDR, PREFIX_UD_LOCK, PREFIX_MANDATORY): Define.
69 (Bad_Opcode, FLOAT, DIS386, DIS386_PREFIX, THREE_BYTE_TABLE_PREFIX):
70 Fill prefix_requirement field.
71 (struct dis386): Add prefix_requirement field.
72 (dis386): Fill prefix_requirement field.
73 (dis386_twobyte): Ditto.
74 (twobyte_has_mandatory_prefix_: Remove.
75 (reg_table): Fill prefix_requirement field.
76 (prefix_table): Ditto.
77 (x86_64_table): Ditto.
78 (three_byte_table): Ditto.
81 (vex_len_table): Ditto.
85 (print_insn): Use prefix_requirement.
86 (FGRPd9_2, FGRPd9_4, FGRPd9_5, FGRPd9_6, FGRPd9_7, FGRPda_5, FGRPdb_4,
87 FGRPde_3, FGRPdf_4): Fill prefix_requirement field.
90 2015-03-30 Mike Frysinger <vapier@gentoo.org>
92 * d10v-opc.c (d10v_reg_name_cnt): Convert old style prototype.
94 2015-03-29 H.J. Lu <hongjiu.lu@intel.com>
96 * Makefile.in: Regenerated.
98 2015-03-25 Anton Blanchard <anton@samba.org>
100 * ppc-dis.c (disassemble_init_powerpc): Only initialise
101 powerpc_opcd_indices and vle_opcd_indices once.
103 2015-03-25 Anton Blanchard <anton@samba.org>
105 * ppc-opc.c (powerpc_opcodes): Add slbfee.
107 2015-03-24 Terry Guo <terry.guo@arm.com>
109 * arm-dis.c (opcode32): Updated to use new arm feature struct.
110 (opcode16): Likewise.
111 (coprocessor_opcodes): Replace bit with feature struct.
112 (neon_opcodes): Likewise.
113 (arm_opcodes): Likewise.
114 (thumb_opcodes): Likewise.
115 (thumb32_opcodes): Likewise.
116 (print_insn_coprocessor): Likewise.
117 (print_insn_arm): Likewise.
118 (select_arm_features): Follow new feature struct.
120 2015-03-17 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
122 * i386-dis.c (rm_table): Add clzero.
123 * i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS.
124 Add CPU_CLZERO_FLAGS.
125 (cpu_flags): Add CpuCLZERO.
126 * i386-opc.h: Add CpuCLZERO.
127 * i386-opc.tbl: Add clzero.
128 * i386-init.h: Re-generated.
129 * i386-tbl.h: Re-generated.
131 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
133 * mips-opc.c (decode_mips_operand): Fix constraint issues
134 with u and y operands.
136 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
138 * mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
140 2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
142 * s390-opc.c: Add new IBM z13 instructions.
143 * s390-opc.txt: Likewise.
145 2015-03-10 Renlin Li <renlin.li@arm.com>
147 * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
148 stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
150 * aarch64-asm-2.c: Regenerate.
151 * aarch64-dis-2.c: Likewise.
152 * aarch64-opc-2.c: Likewise.
154 2015-03-03 Jiong Wang <jiong.wang@arm.com>
156 * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
158 2015-02-25 Oleg Endo <olegendo@gcc.gnu.org>
160 * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
162 (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
163 arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
165 2015-02-23 Vinay <Vinay.G@kpit.com>
167 * rl78-decode.opc (MOV): Added space between two operands for
168 'mov' instruction in index addressing mode.
169 * rl78-decode.c: Regenerate.
171 2015-02-19 Pedro Alves <palves@redhat.com>
173 * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
175 2015-02-10 Pedro Alves <palves@redhat.com>
176 Tom Tromey <tromey@redhat.com>
178 * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
179 microblaze_and, microblaze_xor.
180 * microblaze-opc.h (opcodes): Adjust.
182 2015-01-28 James Bowman <james.bowman@ftdichip.com>
184 * Makefile.am: Add FT32 files.
185 * configure.ac: Handle FT32.
186 * disassemble.c (disassembler): Call print_insn_ft32.
187 * ft32-dis.c: New file.
188 * ft32-opc.c: New file.
189 * Makefile.in: Regenerate.
190 * configure: Regenerate.
191 * po/POTFILES.in: Regenerate.
193 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
195 * nds32-asm.c (keyword_sr): Add new system registers.
197 2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
199 * s390-dis.c (s390_extract_operand): Support vector register
201 (s390_print_insn_with_opcode): Support new operands types and add
202 new handling of optional operands.
203 * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
204 and include opcode/s390.h instead.
205 (struct op_struct): New field `flags'.
206 (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
207 (dumpTable): Dump flags.
208 (main): Parse flags from the s390-opc.txt file. Add z13 as cpu
210 * s390-opc.c: Add new operands types, instruction formats, and
212 (s390_opformats): Add new formats for .insn.
213 * s390-opc.txt: Add new instructions.
215 2015-01-01 Alan Modra <amodra@gmail.com>
217 Update year range in copyright notice of all files.
219 For older changes see ChangeLog-2014
221 Copyright (C) 2015 Free Software Foundation, Inc.
223 Copying and distribution of this file, with or without modification,
224 are permitted in any medium without royalty provided the copyright
225 notice and this notice are preserved.
231 version-control: never