Update.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2010-07-03 Andreas Schwab <schwab@linux-m68k.org>
2
3 * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
4 ppc_cpu_t before inverting.
5 (ppc_parse_cpu): Likewise.
6 (print_insn_powerpc): Likewise.
7
8 2010-07-03 Alan Modra <amodra@gmail.com>
9
10 * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
11 * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
12 (PPC64, MFDEC2): Update.
13 (NON32, NO371): Define.
14 (powerpc_opcode): Update to not use old opcode flags, and avoid
15 -m601 duplicates.
16
17 2010-07-03 DJ Delorie <dj@delorie.com>
18
19 * m32c-ibld.c: Regenerate.
20
21 2010-07-03 Alan Modra <amodra@gmail.com>
22
23 * ppc-opc.c (PWR2COM): Define.
24 (PPCPWR2): Add PPC_OPCODE_COMMON.
25 (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
26 "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
27 "rac" from -mcom.
28
29 2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
30
31 AVX Programming Reference (June, 2010)
32 * i386-dis.c (PREFIX_0FAE_REG_0): New.
33 (PREFIX_0FAE_REG_1): Likewise.
34 (PREFIX_0FAE_REG_2): Likewise.
35 (PREFIX_0FAE_REG_3): Likewise.
36 (PREFIX_VEX_3813): Likewise.
37 (PREFIX_VEX_3A1D): Likewise.
38 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
39 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
40 PREFIX_VEX_3A1D.
41 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
42 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
43 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
44
45 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
46 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
47 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
48
49 * i386-opc.h (CpuXsaveopt): New.
50 (CpuFSGSBase):Likewise.
51 (CpuRdRnd): Likewise.
52 (CpuF16C): Likewise.
53 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
54 cpuf16c.
55
56 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
57 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
58 * i386-init.h: Regenerated.
59 * i386-tbl.h: Likewise.
60
61 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
62
63 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
64 and mtocrf on EFS.
65
66 2010-06-29 Alan Modra <amodra@gmail.com>
67
68 * maxq-dis.c: Delete file.
69 * Makefile.am: Remove references to maxq.
70 * configure.in: Likewise.
71 * disassemble.c: Likewise.
72 * Makefile.in: Regenerate.
73 * configure: Regenerate.
74 * po/POTFILES.in: Regenerate.
75
76 2010-06-29 Alan Modra <amodra@gmail.com>
77
78 * mep-dis.c: Regenerate.
79
80 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
81
82 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
83
84 2010-06-27 Alan Modra <amodra@gmail.com>
85
86 * arc-dis.c (arc_sprintf): Delete set but unused variables.
87 (decodeInstr): Likewise.
88 * dlx-dis.c (print_insn_dlx): Likewise.
89 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
90 * maxq-dis.c (check_move, print_insn): Likewise.
91 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
92 * msp430-dis.c (msp430_branchinstr): Likewise.
93 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
94 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
95 * sparc-dis.c (print_insn_sparc): Likewise.
96 * fr30-asm.c: Regenerate.
97 * frv-asm.c: Regenerate.
98 * ip2k-asm.c: Regenerate.
99 * iq2000-asm.c: Regenerate.
100 * lm32-asm.c: Regenerate.
101 * m32c-asm.c: Regenerate.
102 * m32r-asm.c: Regenerate.
103 * mep-asm.c: Regenerate.
104 * mt-asm.c: Regenerate.
105 * openrisc-asm.c: Regenerate.
106 * xc16x-asm.c: Regenerate.
107 * xstormy16-asm.c: Regenerate.
108
109 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
110
111 PR gas/11673
112 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
113
114 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
115
116 PR binutils/11676
117 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
118
119 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
120
121 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
122 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
123 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
124 touch floating point regs and are enabled by COM, PPC or PPCCOM.
125 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
126 Treat lwsync as msync on e500.
127
128 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
129
130 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
131
132 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
133
134 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
135 constants is the same on 32-bit and 64-bit hosts.
136
137 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
138
139 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
140 .short directives so that they can be reassembled.
141
142 2010-05-26 Catherine Moore <clm@codesourcery.com>
143 David Ung <davidu@mips.com>
144
145 * mips-opc.c: Change membership to I1 for instructions ssnop and
146 ehb.
147
148 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
149
150 * i386-dis.c (sib): New.
151 (get_sib): Likewise.
152 (print_insn): Call get_sib.
153 OP_E_memory): Use sib.
154
155 2010-05-26 Catherine Moore <clm@codesoourcery.com>
156
157 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
158 * mips-opc.c (I16): Remove.
159 (mips_builtin_op): Reclassify jalx.
160
161 2010-05-19 Alan Modra <amodra@gmail.com>
162
163 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
164 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
165
166 2010-05-13 Alan Modra <amodra@gmail.com>
167
168 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
169
170 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
171
172 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
173 format.
174 (print_insn_thumb16): Add support for new %W format.
175
176 2010-05-07 Tristan Gingold <gingold@adacore.com>
177
178 * Makefile.in: Regenerate with automake 1.11.1.
179 * aclocal.m4: Ditto.
180
181 2010-05-05 Nick Clifton <nickc@redhat.com>
182
183 * po/es.po: Updated Spanish translation.
184
185 2010-04-22 Nick Clifton <nickc@redhat.com>
186
187 * po/opcodes.pot: Updated by the Translation project.
188 * po/vi.po: Updated Vietnamese translation.
189
190 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
191
192 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
193 bits in opcode.
194
195 2010-04-09 Nick Clifton <nickc@redhat.com>
196
197 * i386-dis.c (print_insn): Remove unused variable op.
198 (OP_sI): Remove unused variable mask.
199
200 2010-04-07 Alan Modra <amodra@gmail.com>
201
202 * configure: Regenerate.
203
204 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
205
206 * ppc-opc.c (RBOPT): New define.
207 ("dccci"): Enable for PPCA2. Make operands optional.
208 ("iccci"): Likewise. Do not deprecate for PPC476.
209
210 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
211
212 * cr16-opc.c (cr16_instruction): Fix typo in comment.
213
214 2010-03-25 Joseph Myers <joseph@codesourcery.com>
215
216 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
217 * Makefile.in: Regenerate.
218 * configure.in (bfd_tic6x_arch): New.
219 * configure: Regenerate.
220 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
221 (disassembler): Handle TI C6X.
222 * tic6x-dis.c: New.
223
224 2010-03-24 Mike Frysinger <vapier@gentoo.org>
225
226 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
227
228 2010-03-23 Joseph Myers <joseph@codesourcery.com>
229
230 * dis-buf.c (buffer_read_memory): Give error for reading just
231 before the start of memory.
232
233 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
234 Quentin Neill <quentin.neill@amd.com>
235
236 * i386-dis.c (OP_LWP_I): Removed.
237 (reg_table): Do not use OP_LWP_I, use Iq.
238 (OP_LWPCB_E): Remove use of names16.
239 (OP_LWP_E): Same.
240 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
241 should not set the Vex.length bit.
242 * i386-tbl.h: Regenerated.
243
244 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
245
246 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
247
248 2010-02-24 Nick Clifton <nickc@redhat.com>
249
250 PR binutils/6773
251 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
252 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
253 (thumb32_opcodes): Likewise.
254
255 2010-02-15 Nick Clifton <nickc@redhat.com>
256
257 * po/vi.po: Updated Vietnamese translation.
258
259 2010-02-12 Doug Evans <dje@sebabeach.org>
260
261 * lm32-opinst.c: Regenerate.
262
263 2010-02-11 Doug Evans <dje@sebabeach.org>
264
265 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
266 (print_address): Delete CGEN_PRINT_ADDRESS.
267 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
268 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
269 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
270 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
271
272 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
273 * frv-desc.c, * frv-desc.h, * frv-opc.c,
274 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
275 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
276 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
277 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
278 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
279 * mep-desc.c, * mep-desc.h, * mep-opc.c,
280 * mt-desc.c, * mt-desc.h, * mt-opc.c,
281 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
282 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
283 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
284
285 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
286
287 * i386-dis.c: Update copyright.
288 * i386-gen.c: Likewise.
289 * i386-opc.h: Likewise.
290 * i386-opc.tbl: Likewise.
291
292 2010-02-10 Quentin Neill <quentin.neill@amd.com>
293 Sebastian Pop <sebastian.pop@amd.com>
294
295 * i386-dis.c (OP_EX_VexImmW): Reintroduced
296 function to handle 5th imm8 operand.
297 (PREFIX_VEX_3A48): Added.
298 (PREFIX_VEX_3A49): Added.
299 (VEX_W_3A48_P_2): Added.
300 (VEX_W_3A49_P_2): Added.
301 (prefix table): Added entries for PREFIX_VEX_3A48
302 and PREFIX_VEX_3A49.
303 (vex table): Added entries for VEX_W_3A48_P_2 and
304 and VEX_W_3A49_P_2.
305 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
306 for Vec_Imm4 operands.
307 * i386-opc.h (enum): Added Vec_Imm4.
308 (i386_operand_type): Added vec_imm4.
309 * i386-opc.tbl: Add entries for vpermilp[ds].
310 * i386-init.h: Regenerated.
311 * i386-tbl.h: Regenerated.
312
313 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
314
315 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
316 and "pwr7". Move "a2" into alphabetical order.
317
318 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
319
320 * ppc-dis.c (ppc_opts): Add titan entry.
321 * ppc-opc.c (TITAN, MULHW): Define.
322 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
323
324 2010-02-03 Quentin Neill <quentin.neill@amd.com>
325
326 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
327 to CPU_BDVER1_FLAGS
328 * i386-init.h: Regenerated.
329
330 2010-02-03 Anthony Green <green@moxielogic.com>
331
332 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
333 0x0f, and make 0x00 an illegal instruction.
334
335 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
336
337 * opcodes/arm-dis.c (struct arm_private_data): New.
338 (print_insn_coprocessor, print_insn_arm): Update to use struct
339 arm_private_data.
340 (is_mapping_symbol, get_map_sym_type): New functions.
341 (get_sym_code_type): Check the symbol's section. Do not check
342 mapping symbols.
343 (print_insn): Default to disassembling ARM mode code. Check
344 for mapping symbols separately from other symbols. Use
345 struct arm_private_data.
346
347 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
348
349 * i386-dis.c (EXVexWdqScalar): New.
350 (vex_scalar_w_dq_mode): Likewise.
351 (prefix_table): Update entries for PREFIX_VEX_3899,
352 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
353 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
354 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
355 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
356 (intel_operand_size): Handle vex_scalar_w_dq_mode.
357 (OP_EX): Likewise.
358
359 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
360
361 * i386-dis.c (XMScalar): New.
362 (EXdScalar): Likewise.
363 (EXqScalar): Likewise.
364 (EXqScalarS): Likewise.
365 (VexScalar): Likewise.
366 (EXdVexScalarS): Likewise.
367 (EXqVexScalarS): Likewise.
368 (XMVexScalar): Likewise.
369 (scalar_mode): Likewise.
370 (d_scalar_mode): Likewise.
371 (d_scalar_swap_mode): Likewise.
372 (q_scalar_mode): Likewise.
373 (q_scalar_swap_mode): Likewise.
374 (vex_scalar_mode): Likewise.
375 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
376 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
377 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
378 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
379 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
380 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
381 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
382 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
383 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
384 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
385 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
386 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
387 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
388 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
389 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
390 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
391 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
392 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
393 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
394 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
395 q_scalar_mode, q_scalar_swap_mode.
396 (OP_XMM): Handle scalar_mode.
397 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
398 and q_scalar_swap_mode.
399 (OP_VEX): Handle vex_scalar_mode.
400
401 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
402
403 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
404
405 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
406
407 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
408
409 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
410
411 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
412
413 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
414
415 * i386-dis.c (Bad_Opcode): New.
416 (bad_opcode): Likewise.
417 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
418 (dis386_twobyte): Likewise.
419 (reg_table): Likewise.
420 (prefix_table): Likewise.
421 (x86_64_table): Likewise.
422 (vex_len_table): Likewise.
423 (vex_w_table): Likewise.
424 (mod_table): Likewise.
425 (rm_table): Likewise.
426 (float_reg): Likewise.
427 (reg_table): Remove trailing "(bad)" entries.
428 (prefix_table): Likewise.
429 (x86_64_table): Likewise.
430 (vex_len_table): Likewise.
431 (vex_w_table): Likewise.
432 (mod_table): Likewise.
433 (rm_table): Likewise.
434 (get_valid_dis386): Handle bytemode 0.
435
436 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
437
438 * i386-opc.h (VEXScalar): New.
439
440 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
441 instructions.
442 * i386-tbl.h: Regenerated.
443
444 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
445
446 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
447
448 * i386-opc.tbl: Add xsave64 and xrstor64.
449 * i386-tbl.h: Regenerated.
450
451 2010-01-20 Nick Clifton <nickc@redhat.com>
452
453 PR 11170
454 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
455 based post-indexed addressing.
456
457 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
458
459 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
460 * i386-tbl.h: Regenerated.
461
462 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
463
464 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
465 comments.
466
467 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
468
469 * i386-dis.c (names_mm): New.
470 (intel_names_mm): Likewise.
471 (att_names_mm): Likewise.
472 (names_xmm): Likewise.
473 (intel_names_xmm): Likewise.
474 (att_names_xmm): Likewise.
475 (names_ymm): Likewise.
476 (intel_names_ymm): Likewise.
477 (att_names_ymm): Likewise.
478 (print_insn): Set names_mm, names_xmm and names_ymm.
479 (OP_MMX): Use names_mm, names_xmm and names_ymm.
480 (OP_XMM): Likewise.
481 (OP_EM): Likewise.
482 (OP_EMC): Likewise.
483 (OP_MXC): Likewise.
484 (OP_EX): Likewise.
485 (XMM_Fixup): Likewise.
486 (OP_VEX): Likewise.
487 (OP_EX_VexReg): Likewise.
488 (OP_Vex_2src): Likewise.
489 (OP_Vex_2src_1): Likewise.
490 (OP_Vex_2src_2): Likewise.
491 (OP_REG_VexI4): Likewise.
492
493 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
494
495 * i386-dis.c (print_insn): Update comments.
496
497 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
498
499 * i386-dis.c (rex_original): Removed.
500 (ckprefix): Remove rex_original.
501 (print_insn): Update comments.
502
503 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
504
505 * Makefile.in: Regenerate.
506 * configure: Regenerate.
507
508 2010-01-07 Doug Evans <dje@sebabeach.org>
509
510 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
511 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
512 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
513 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
514 * xstormy16-ibld.c: Regenerate.
515
516 2010-01-06 Quentin Neill <quentin.neill@amd.com>
517
518 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
519 * i386-init.h: Regenerated.
520
521 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
522
523 * arm-dis.c (print_insn): Fixed search for next symbol and data
524 dumping condition, and the initial mapping symbol state.
525
526 2010-01-05 Doug Evans <dje@sebabeach.org>
527
528 * cgen-ibld.in: #include "cgen/basic-modes.h".
529 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
530 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
531 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
532 * xstormy16-ibld.c: Regenerate.
533
534 2010-01-04 Nick Clifton <nickc@redhat.com>
535
536 PR 11123
537 * arm-dis.c (print_insn_coprocessor): Initialise value.
538
539 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
540
541 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
542
543 2010-01-02 Doug Evans <dje@sebabeach.org>
544
545 * cgen-asm.in: Update copyright year.
546 * cgen-dis.in: Update copyright year.
547 * cgen-ibld.in: Update copyright year.
548 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
549 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
550 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
551 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
552 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
553 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
554 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
555 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
556 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
557 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
558 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
559 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
560 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
561 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
562 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
563 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
564 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
565 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
566 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
567 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
568 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
569
570 For older changes see ChangeLog-2009
571 \f
572 Local Variables:
573 mode: change-log
574 left-margin: 8
575 fill-column: 74
576 version-control: never
577 End:
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