1 2008-11-26 Andreas Schwab <schwab@suse.de>
3 * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
4 (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
5 (save_printer, save_print_address): Remove.
6 (fetch_data): Don't use them.
7 (match_insn_m68k): Always restore printing functions.
8 (print_insn_m68k): Don't save/restore printing functions.
10 2008-11-25 Nick Clifton <nickc@redhat.com>
12 * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
14 2008-11-18 Catherine Moore <clm@codesourcery.com>
16 * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
18 (neon_opcodes): Likewise.
19 (print_insn_coprocessor): Print 't' or 'b' for vcvt
22 2008-11-14 Tristan Gingold <gingold@adacore.com>
24 * makefile.vms (OBJS): Update list of objects.
28 2008-11-06 Chao-ying Fu <fu@mips.com>
30 * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
32 (sync): New instruction with 5-bit sync type.
33 * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
35 2008-11-06 Nick Clifton <nickc@redhat.com>
37 * avr-dis.c: Replace uses of sprintf without a format string with
40 2008-11-03 H.J. Lu <hongjiu.lu@intel.com>
42 * i386-opc.tbl: Add cmovpe and cmovpo.
43 * i386-tbl.h: Regenerated.
45 2008-10-22 Nick Clifton <nickc@redhat.com>
48 * configure.in (SHARED_LIBADD): Revert previous change.
49 Add a comment explaining why.
50 (SHARED_DEPENDENCIES): Revert previous change.
51 * configure: Regenerate.
53 2008-10-10 Nick Clifton <nickc@redhat.com>
56 * configure.in (SHARED_LIBADD): Add libiberty.a.
57 (SHARED_DEPENDENCIES): Add libiberty.a.
59 2008-09-30 H.J. Lu <hongjiu.lu@intel.com>
61 * i386-gen.c: Include "hashtab.h".
62 (next_field): Take a new argument, last. Check last.
63 (process_i386_cpu_flag): Updated.
64 (process_i386_opcode_modifier): Likewise.
65 (process_i386_operand_type): Likewise.
66 (process_i386_registers): Likewise.
67 (output_i386_opcode): New.
68 (opcode_hash_entry): Likewise.
69 (opcode_hash_table): Likewise.
70 (opcode_hash_hash): Likewise.
71 (opcode_hash_eq): Likewise.
72 (process_i386_opcodes): Use opcode hash table and opcode array.
74 2008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
76 * s390-opc.txt (stdy, stey): Fix description
78 2008-09-30 Alan Modra <amodra@bigpond.net.au>
80 * Makefile.am: Run "make dep-am".
81 * Makefile.in: Regenerate.
83 2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
85 * aclocal.m4: Regenerated.
86 * configure: Likewise.
87 * Makefile.in: Likewise.
89 2008-09-29 Nick Clifton <nickc@redhat.com>
91 * po/vi.po: Updated Vietnamese translation.
92 * po/fr.po: Updated French translation.
94 2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
96 * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
97 (cfxr, cfdr, cfer, clclu): Add esa flag.
98 (sqd): Instruction added.
99 (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
100 * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
102 2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
104 * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
105 (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
107 2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
109 * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
110 * i386-tbl.h: Regenerated.
112 2008-08-28 Jan Beulich <jbeulich@novell.com>
114 * i386-dis.c (dis386): Adjust far return mnemonics.
115 * i386-opc.tbl: Add retf.
116 * i386-tbl.h: Re-generate.
118 2008-08-28 Jan Beulich <jbeulich@novell.com>
120 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
122 2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
124 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
125 * ia64-gen.c (lookup_specifier): Likewise.
127 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
128 * ia64-raw.tbl: Likewise.
129 * ia64-waw.tbl: Likewise.
130 * ia64-asmtab.c: Regenerated.
132 2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
134 * i386-opc.tbl: Correct fidivr operand size.
136 * i386-tbl.h: Regenerated.
138 2008-08-24 Alan Modra <amodra@bigpond.net.au>
140 * configure.in: Update a number of obsolete autoconf macros.
141 * aclocal.m4: Regenerate.
143 2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
145 AVX Programming Reference (August, 2008)
146 * i386-dis.c (PREFIX_VEX_38DB): New.
147 (PREFIX_VEX_38DC): Likewise.
148 (PREFIX_VEX_38DD): Likewise.
149 (PREFIX_VEX_38DE): Likewise.
150 (PREFIX_VEX_38DF): Likewise.
151 (PREFIX_VEX_3ADF): Likewise.
152 (VEX_LEN_38DB_P_2): Likewise.
153 (VEX_LEN_38DC_P_2): Likewise.
154 (VEX_LEN_38DD_P_2): Likewise.
155 (VEX_LEN_38DE_P_2): Likewise.
156 (VEX_LEN_38DF_P_2): Likewise.
157 (VEX_LEN_3ADF_P_2): Likewise.
158 (PREFIX_VEX_3A04): Updated.
159 (VEX_LEN_3A06_P_2): Likewise.
160 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
161 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
162 (x86_64_table): Likewise.
163 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
164 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
167 * i386-opc.tbl: Add AES + AVX instructions.
168 * i386-init.h: Regenerated.
169 * i386-tbl.h: Likewise.
171 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
173 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
174 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
176 2008-08-15 Alan Modra <amodra@bigpond.net.au>
179 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
180 * Makefile.in: Regenerate.
181 * aclocal.m4: Regenerate.
182 * config.in: Regenerate.
183 * configure: Regenerate.
185 2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
188 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
190 2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
192 * i386-opc.tbl: Add syscall and sysret for Cpu64.
194 * i386-tbl.h: Regenerated.
196 2008-08-04 Alan Modra <amodra@bigpond.net.au>
198 * Makefile.am (POTFILES.in): Set LC_ALL=C.
199 * Makefile.in: Regenerate.
200 * po/POTFILES.in: Regenerate.
202 2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
204 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
205 (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
206 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
207 * ppc-opc.c (insert_xt6): New static function.
208 (extract_xt6): Likewise.
209 (insert_xa6): Likewise.
210 (extract_xa6: Likewise.
211 (insert_xb6): Likewise.
212 (extract_xb6): Likewise.
213 (insert_xb6s): Likewise.
214 (extract_xb6s): Likewise.
215 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
216 XX3DM_MASK, PPCVSX): New.
217 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
218 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
220 2008-08-01 Pedro Alves <pedro@codesourcery.com>
222 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
223 * Makefile.in: Regenerate.
225 2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
227 * i386-reg.tbl: Use Dw2Inval on AVX registers.
228 * i386-tbl.h: Regenerated.
230 2008-07-30 Michael J. Eager <eager@eagercon.com>
232 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
233 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
234 (insert_sprg, PPC405): Use PPC_OPCODE_405.
235 (powerpc_opcodes): Add Xilinx APU related opcodes.
237 2008-07-30 Alan Modra <amodra@bigpond.net.au>
239 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
241 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
243 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
245 2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
247 * mips-opc.c (CP): New macro.
248 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
249 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
250 dmtc2 Octeon instructions.
252 2008-07-07 Stan Shebs <stan@codesourcery.com>
254 * dis-init.c (init_disassemble_info): Init endian_code field.
255 * arm-dis.c (print_insn): Disassemble code according to
256 setting of endian_code.
257 (print_insn_big_arm): Detect when BE8 extension flag has been set.
259 2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
261 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
264 2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
266 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
267 (print_ppc_disassembler_options): Likewise.
268 * ppc-opc.c (PPC464): Define.
269 (powerpc_opcodes): Add mfdcrux and mtdcrux.
271 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
273 * configure: Regenerate.
275 2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
277 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
279 (struct dis_private): New.
280 (POWERPC_DIALECT): New define.
281 (powerpc_dialect): Renamed to...
282 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
284 (print_insn_big_powerpc): Update for using structure in
286 (print_insn_little_powerpc): Likewise.
287 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
288 (skip_optional_operands): Likewise.
289 (print_insn_powerpc): Likewise. Remove initialization of dialect.
290 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
291 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
292 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
293 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
294 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
295 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
296 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
297 param to be of type ppc_cpu_t. Update prototype.
299 2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
301 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
303 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
304 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
305 syncw, syncws, vm3mulu, vm0 and vmulu.
307 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
308 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
311 2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
313 * i386-opc.tbl: Add vmovd with 64bit operand.
314 * i386-tbl.h: Regenerated.
316 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
318 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
320 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
322 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
323 * i386-tbl.h: Regenerated.
325 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
328 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
329 into 32bit and 64bit. Remove Reg64|Qword and add
330 IgnoreSize|No_qSuf on 32bit version.
331 * i386-tbl.h: Regenerated.
333 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
335 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
336 * i386-tbl.h: Regenerated.
338 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
340 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
342 2008-05-14 Alan Modra <amodra@bigpond.net.au>
344 * Makefile.am: Run "make dep-am".
345 * Makefile.in: Regenerate.
347 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
349 * i386-dis.c (MOVBE_Fixup): New.
351 (PREFIX_0F3880): Likewise.
352 (PREFIX_0F3881): Likewise.
353 (PREFIX_0F38F0): Updated.
354 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
355 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
356 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
358 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
360 (cpu_flags): Add CpuMovbe and CpuEPT.
362 * i386-opc.h (CpuMovbe): New.
365 (i386_cpu_flags): Add cpumovbe and cpuept.
367 * i386-opc.tbl: Add entries for movbe and EPT instructions.
368 * i386-init.h: Regenerated.
369 * i386-tbl.h: Likewise.
371 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
373 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
374 the two drem and the two dremu macros.
376 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
378 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
379 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
380 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
381 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
383 2008-04-25 David S. Miller <davem@davemloft.net>
385 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
386 instead of %sys_tick_cmpr, as suggested in architecture manuals.
388 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
390 * aclocal.m4: Regenerate.
391 * configure: Regenerate.
393 2008-04-23 David S. Miller <davem@davemloft.net>
395 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
397 (prefetch_table): Add missing values.
399 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
401 * i386-gen.c (opcode_modifiers): Add NoAVX.
403 * i386-opc.h (NoAVX): New.
405 (i386_opcode_modifier): Add noavx.
407 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
408 instructions which don't have AVX equivalent.
409 * i386-tbl.h: Regenerated.
411 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
413 * i386-dis.c (OP_VEX_FMA): New.
414 (OP_EX_VexImmW): Likewise.
416 (Vex128FMA): Likewise.
417 (EXVexImmW): Likewise.
418 (get_vex_imm8): Likewise.
419 (OP_EX_VexReg): Likewise.
420 (vex_i4_done): Renamed to ...
422 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
423 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
425 (print_insn): Updated.
426 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
427 (OP_REG_VexI4): Check invalid high registers.
429 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
430 Michael Meissner <michael.meissner@amd.com>
432 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
433 * i386-tbl.h: Regenerate from i386-opc.tbl.
435 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
437 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
438 accept Power E500MC instructions.
439 (print_ppc_disassembler_options): Document -Me500mc.
440 * ppc-opc.c (DUIS, DUI, T): New.
441 (XRT, XRTRA): Likewise.
443 (powerpc_opcodes): Add new Power E500MC instructions.
445 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
447 * s390-dis.c (init_disasm): Evaluate disassembler_options.
448 (print_s390_disassembler_options): New function.
449 * disassemble.c (disassembler_usage): Invoke
450 print_s390_disassembler_options.
452 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
454 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
455 of local variables used for mnemonic parsing: prefix, suffix and
458 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
460 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
461 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
462 (s390_crb_extensions): New extensions table.
463 (insertExpandedMnemonic): Handle '$' tag.
464 * s390-opc.txt: Remove conditional jump variants which can now
465 be expanded automatically.
466 Replace '*' tag with '$' in the compare and branch instructions.
468 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
470 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
471 (PREFIX_VEX_3AXX): Likewis.
473 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
475 * i386-opc.tbl: Remove 4 extra blank lines.
477 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
479 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
480 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
481 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
482 * i386-opc.tbl: Likewise.
484 * i386-opc.h (CpuCLMUL): Renamed to ...
487 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
489 * i386-init.h: Regenerated.
491 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
493 * i386-dis.c (OP_E_register): New.
494 (OP_E_memory): Likewise.
496 (OP_EX_Vex): Likewise.
497 (OP_EX_VexW): Likewise.
498 (OP_XMM_Vex): Likewise.
499 (OP_XMM_VexW): Likewise.
500 (OP_REG_VexI4): Likewise.
501 (PCLMUL_Fixup): Likewise.
502 (VEXI4_Fixup): Likewise.
503 (VZERO_Fixup): Likewise.
504 (VCMP_Fixup): Likewise.
505 (VPERMIL2_Fixup): Likewise.
506 (rex_original): Likewise.
507 (rex_ignored): Likewise.
528 (VPERMIL2): Likewise.
529 (xmm_mode): Likewise.
530 (xmmq_mode): Likewise.
531 (ymmq_mode): Likewise.
532 (vex_mode): Likewise.
533 (vex128_mode): Likewise.
534 (vex256_mode): Likewise.
535 (USE_VEX_C4_TABLE): Likewise.
536 (USE_VEX_C5_TABLE): Likewise.
537 (USE_VEX_LEN_TABLE): Likewise.
538 (VEX_C4_TABLE): Likewise.
539 (VEX_C5_TABLE): Likewise.
540 (VEX_LEN_TABLE): Likewise.
541 (REG_VEX_XX): Likewise.
542 (MOD_VEX_XXX): Likewise.
543 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
544 (PREFIX_0F3A44): Likewise.
545 (PREFIX_0F3ADF): Likewise.
546 (PREFIX_VEX_XXX): Likewise.
548 (VEX_OF38): Likewise.
549 (VEX_OF3A): Likewise.
550 (VEX_LEN_XXX): Likewise.
552 (need_vex): Likewise.
553 (need_vex_reg): Likewise.
554 (vex_i4_done): Likewise.
555 (vex_table): Likewise.
556 (vex_len_table): Likewise.
557 (OP_REG_VexI4): Likewise.
558 (vex_cmp_op): Likewise.
559 (pclmul_op): Likewise.
560 (vpermil2_op): Likewise.
563 (PREFIX_0F38F0): Likewise.
564 (PREFIX_0F3A60): Likewise.
565 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
566 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
567 and PREFIX_VEX_XXX entries.
568 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
569 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
571 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
572 Add MOD_VEX_XXX entries.
573 (ckprefix): Initialize rex_original and rex_ignored. Store the
574 REX byte in rex_original.
575 (get_valid_dis386): Handle the implicit prefix in VEX prefix
576 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
577 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
578 calling get_valid_dis386. Use rex_original and rex_ignored when
580 (putop): Handle "XY".
581 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
583 (OP_E_extended): Updated to use OP_E_register and
585 (OP_XMM): Handle VEX.
587 (XMM_Fixup): Likewise.
588 (CMP_Fixup): Use ARRAY_SIZE.
590 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
591 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
592 (operand_type_init): Add OPERAND_TYPE_REGYMM and
593 OPERAND_TYPE_VEX_IMM4.
594 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
595 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
596 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
597 VexImmExt and SSE2AVX.
598 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
600 * i386-opc.h (CpuAVX): New.
602 (CpuCLMUL): Likewise.
613 (Vex3Sources): Likewise.
614 (VexImmExt): Likewise.
618 (Vex_Imm4): Likewise.
619 (Implicit1stXmm0): Likewise.
622 (ByteOkIntel): Likewise.
625 (Unspecified): Likewise.
627 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
628 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
629 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
630 vex3sources, veximmext and sse2avx.
631 (i386_operand_type): Add regymm, ymmword and vex_imm4.
633 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
635 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
637 * i386-init.h: Regenerated.
638 * i386-tbl.h: Likewise.
640 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
642 From Robin Getz <robin.getz@analog.com>
643 * bfin-dis.c (bu32): Typedef.
644 (enum const_forms_t): Add c_uimm32 and c_huimm32.
645 (constant_formats[]): Add uimm32 and huimm16.
650 (luimm16_val): Define.
651 (struct saved_state): Define.
652 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
653 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
654 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
656 (decode_LDIMMhalf_0): Print out the whole register value.
658 From Jie Zhang <jie.zhang@analog.com>
659 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
660 multiply and multiply-accumulate to data register instruction.
662 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
663 c_imm32, c_huimm32e): Define.
664 (constant_formats): Add flags for printing decimal, leading spaces, and
666 (comment, parallel): Add global flags in all disassembly.
667 (fmtconst): Take advantage of new flags, and print default in hex.
668 (fmtconst_val): Likewise.
669 (decode_macfunc): Be consistant with spaces, tabs, comments,
670 capitalization in disassembly, fix minor coding style issues.
671 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
672 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
673 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
674 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
675 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
676 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
677 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
678 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
679 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
680 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
681 _print_insn_bfin, print_insn_bfin): Likewise.
683 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
685 * aclocal.m4: Regenerate.
686 * configure: Likewise.
687 * Makefile.in: Likewise.
689 2008-03-13 Alan Modra <amodra@bigpond.net.au>
691 * Makefile.am: Run "make dep-am".
692 * Makefile.in: Regenerate.
693 * configure: Regenerate.
695 2008-03-07 Alan Modra <amodra@bigpond.net.au>
697 * ppc-opc.c (powerpc_opcodes): Order and format.
699 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
701 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
702 * i386-tbl.h: Regenerated.
704 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
706 * i386-opc.tbl: Disallow 16-bit near indirect branches for
708 * i386-tbl.h: Regenerated.
710 2008-02-21 Jan Beulich <jbeulich@novell.com>
712 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
713 and Fword for far indirect jmp. Allow Reg16 and Word for near
714 indirect jmp on x86-64. Disallow Fword for lcall.
715 * i386-tbl.h: Re-generate.
717 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
719 * cr16-opc.c (cr16_num_optab): Defined
721 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
723 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
724 * i386-init.h: Regenerated.
726 2008-02-14 Nick Clifton <nickc@redhat.com>
729 * configure.in (SHARED_LIBADD): Select the correct host specific
730 file extension for shared libraries.
731 * configure: Regenerate.
733 2008-02-13 Jan Beulich <jbeulich@novell.com>
735 * i386-opc.h (RegFlat): New.
736 * i386-reg.tbl (flat): Add.
737 * i386-tbl.h: Re-generate.
739 2008-02-13 Jan Beulich <jbeulich@novell.com>
741 * i386-dis.c (a_mode): New.
742 (cond_jump_mode): Adjust.
743 (Ma): Change to a_mode.
744 (intel_operand_size): Handle a_mode.
745 * i386-opc.tbl: Allow Dword and Qword for bound.
746 * i386-tbl.h: Re-generate.
748 2008-02-13 Jan Beulich <jbeulich@novell.com>
750 * i386-gen.c (process_i386_registers): Process new fields.
751 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
752 unsigned char. Add dw2_regnum and Dw2Inval.
753 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
755 * i386-tbl.h: Re-generate.
757 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
759 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
760 * i386-init.h: Updated.
762 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
764 * i386-gen.c (cpu_flags): Add CpuXsave.
766 * i386-opc.h (CpuXsave): New.
768 (i386_cpu_flags): Add cpuxsave.
770 * i386-dis.c (MOD_0FAE_REG_4): New.
771 (RM_0F01_REG_2): Likewise.
772 (MOD_0FAE_REG_5): Updated.
773 (RM_0F01_REG_3): Likewise.
774 (reg_table): Use MOD_0FAE_REG_4.
775 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
777 (rm_table): Add RM_0F01_REG_2.
779 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
780 * i386-init.h: Regenerated.
781 * i386-tbl.h: Likewise.
783 2008-02-11 Jan Beulich <jbeulich@novell.com>
785 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
786 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
787 * i386-tbl.h: Re-generate.
789 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
792 * configure: Regenerated.
794 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
796 * mips-dis.c: Update copyright.
797 (mips_arch_choices): Add Octeon.
798 * mips-opc.c: Update copyright.
800 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
802 2008-01-29 Alan Modra <amodra@bigpond.net.au>
804 * ppc-opc.c: Support optional L form mtmsr.
806 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
808 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
810 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
812 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
813 * i386-init.h: Regenerated.
815 2008-01-23 Tristan Gingold <gingold@adacore.com>
817 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
818 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
820 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
822 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
823 (cpu_flags): Likewise.
825 * i386-opc.h (CpuMMX2): Removed.
828 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
829 * i386-init.h: Regenerated.
830 * i386-tbl.h: Likewise.
832 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
834 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
836 * i386-init.h: Regenerated.
838 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
840 * i386-opc.tbl: Use Qword on movddup.
841 * i386-tbl.h: Regenerated.
843 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
845 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
846 * i386-tbl.h: Regenerated.
848 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
850 * i386-dis.c (Mx): New.
851 (PREFIX_0FC3): Likewise.
852 (PREFIX_0FC7_REG_6): Updated.
853 (dis386_twobyte): Use PREFIX_0FC3.
854 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
855 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
858 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
860 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
861 (operand_types): Add Mem.
863 * i386-opc.h (IntelSyntax): New.
864 * i386-opc.h (Mem): New.
866 (Opcode_Modifier_Max): Updated.
867 (i386_opcode_modifier): Add intelsyntax.
868 (i386_operand_type): Add mem.
870 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
873 * i386-reg.tbl: Add size for accumulator.
875 * i386-init.h: Regenerated.
876 * i386-tbl.h: Likewise.
878 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
880 * i386-opc.h (Byte): Fix a typo.
882 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
885 * i386-gen.c (operand_type_init): Add Dword to
886 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
887 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
889 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
890 Xmmword, Unspecified and Anysize.
891 (set_bitfield): Make Mmword an alias of Qword. Make Oword
894 * i386-opc.h (CheckSize): Removed.
902 (i386_opcode_modifier): Remove checksize, byte, word, dword,
906 (Unspecified): Likewise.
908 (i386_operand_type): Add byte, word, dword, fword, qword,
909 tbyte xmmword, unspecified and anysize.
911 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
912 Tbyte, Xmmword, Unspecified and Anysize.
914 * i386-reg.tbl: Add size for accumulator.
916 * i386-init.h: Regenerated.
917 * i386-tbl.h: Likewise.
919 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
921 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
923 (reg_table): Updated.
924 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
925 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
927 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
929 * i386-gen.c (set_bitfield): Use fail () on error.
931 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
933 * i386-gen.c (lineno): New.
934 (filename): Likewise.
935 (set_bitfield): Report filename and line numer on error.
936 (process_i386_opcodes): Set filename and update lineno.
937 (process_i386_registers): Likewise.
939 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
941 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
944 * i386-opc.h (IntelMnemonic): Renamed to ..
946 (Opcode_Modifier_Max): Updated.
947 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
950 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
951 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
952 * i386-tbl.h: Regenerated.
954 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
956 * i386-gen.c: Update copyright to 2008.
957 * i386-opc.h: Likewise.
958 * i386-opc.tbl: Likewise.
960 * i386-init.h: Regenerated.
961 * i386-tbl.h: Likewise.
963 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
965 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
966 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
967 * i386-tbl.h: Regenerated.
969 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
971 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
973 (cpu_flags): Likewise.
975 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
976 (CpuSSE4_2_Or_ABM): Likewise.
978 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
980 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
981 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
982 and CpuPadLock, respectively.
983 * i386-init.h: Regenerated.
984 * i386-tbl.h: Likewise.
986 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
988 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
990 * i386-opc.h (No_xSuf): Removed.
991 (CheckSize): Updated.
993 * i386-tbl.h: Regenerated.
995 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
997 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
998 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1000 (cpu_flags): Add CpuSSE4_2_Or_ABM.
1002 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1004 (i386_cpu_flags): Add cpusse4_2_or_abm.
1006 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1007 CpuABM|CpuSSE4_2 on popcnt.
1008 * i386-init.h: Regenerated.
1009 * i386-tbl.h: Likewise.
1011 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1013 * i386-opc.h: Update comments.
1015 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1017 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1018 * i386-opc.h: Likewise.
1019 * i386-opc.tbl: Likewise.
1021 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1024 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1025 Byte, Word, Dword, QWord and Xmmword.
1027 * i386-opc.h (No_xSuf): New.
1028 (CheckSize): Likewise.
1033 (Xmmword): Likewise.
1035 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1036 Dword, QWord and Xmmword.
1038 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1040 * i386-tbl.h: Regenerated.
1042 2008-01-02 Mark Kettenis <kettenis@gnu.org>
1044 * m88k-dis.c (instructions): Fix fcvt.* instructions.
1047 For older changes see ChangeLog-2007
1053 version-control: never