Updated Spanish translations.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2010-05-05 Nick Clifton <nickc@redhat.com>
2
3 * po/es.po: Updated Spanish translation.
4
5 2010-04-22 Nick Clifton <nickc@redhat.com>
6
7 * po/opcodes.pot: Updated by the Translation project.
8 * po/vi.po: Updated Vietnamese translation.
9
10 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
11
12 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
13 bits in opcode.
14
15 2010-04-09 Nick Clifton <nickc@redhat.com>
16
17 * i386-dis.c (print_insn): Remove unused variable op.
18 (OP_sI): Remove unused variable mask.
19
20 2010-04-07 Alan Modra <amodra@gmail.com>
21
22 * configure: Regenerate.
23
24 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
25
26 * ppc-opc.c (RBOPT): New define.
27 ("dccci"): Enable for PPCA2. Make operands optional.
28 ("iccci"): Likewise. Do not deprecate for PPC476.
29
30 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
31
32 * cr16-opc.c (cr16_instruction): Fix typo in comment.
33
34 2010-03-25 Joseph Myers <joseph@codesourcery.com>
35
36 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
37 * Makefile.in: Regenerate.
38 * configure.in (bfd_tic6x_arch): New.
39 * configure: Regenerate.
40 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
41 (disassembler): Handle TI C6X.
42 * tic6x-dis.c: New.
43
44 2010-03-24 Mike Frysinger <vapier@gentoo.org>
45
46 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
47
48 2010-03-23 Joseph Myers <joseph@codesourcery.com>
49
50 * dis-buf.c (buffer_read_memory): Give error for reading just
51 before the start of memory.
52
53 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
54 Quentin Neill <quentin.neill@amd.com>
55
56 * i386-dis.c (OP_LWP_I): Removed.
57 (reg_table): Do not use OP_LWP_I, use Iq.
58 (OP_LWPCB_E): Remove use of names16.
59 (OP_LWP_E): Same.
60 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
61 should not set the Vex.length bit.
62 * i386-tbl.h: Regenerated.
63
64 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
65
66 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
67
68 2010-02-24 Nick Clifton <nickc@redhat.com>
69
70 PR binutils/6773
71 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
72 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
73 (thumb32_opcodes): Likewise.
74
75 2010-02-15 Nick Clifton <nickc@redhat.com>
76
77 * po/vi.po: Updated Vietnamese translation.
78
79 2010-02-12 Doug Evans <dje@sebabeach.org>
80
81 * lm32-opinst.c: Regenerate.
82
83 2010-02-11 Doug Evans <dje@sebabeach.org>
84
85 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
86 (print_address): Delete CGEN_PRINT_ADDRESS.
87 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
88 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
89 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
90 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
91
92 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
93 * frv-desc.c, * frv-desc.h, * frv-opc.c,
94 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
95 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
96 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
97 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
98 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
99 * mep-desc.c, * mep-desc.h, * mep-opc.c,
100 * mt-desc.c, * mt-desc.h, * mt-opc.c,
101 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
102 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
103 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
104
105 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
106
107 * i386-dis.c: Update copyright.
108 * i386-gen.c: Likewise.
109 * i386-opc.h: Likewise.
110 * i386-opc.tbl: Likewise.
111
112 2010-02-10 Quentin Neill <quentin.neill@amd.com>
113 Sebastian Pop <sebastian.pop@amd.com>
114
115 * i386-dis.c (OP_EX_VexImmW): Reintroduced
116 function to handle 5th imm8 operand.
117 (PREFIX_VEX_3A48): Added.
118 (PREFIX_VEX_3A49): Added.
119 (VEX_W_3A48_P_2): Added.
120 (VEX_W_3A49_P_2): Added.
121 (prefix table): Added entries for PREFIX_VEX_3A48
122 and PREFIX_VEX_3A49.
123 (vex table): Added entries for VEX_W_3A48_P_2 and
124 and VEX_W_3A49_P_2.
125 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
126 for Vec_Imm4 operands.
127 * i386-opc.h (enum): Added Vec_Imm4.
128 (i386_operand_type): Added vec_imm4.
129 * i386-opc.tbl: Add entries for vpermilp[ds].
130 * i386-init.h: Regenerated.
131 * i386-tbl.h: Regenerated.
132
133 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
134
135 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
136 and "pwr7". Move "a2" into alphabetical order.
137
138 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
139
140 * ppc-dis.c (ppc_opts): Add titan entry.
141 * ppc-opc.c (TITAN, MULHW): Define.
142 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
143
144 2010-02-03 Quentin Neill <quentin.neill@amd.com>
145
146 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
147 to CPU_BDVER1_FLAGS
148 * i386-init.h: Regenerated.
149
150 2010-02-03 Anthony Green <green@moxielogic.com>
151
152 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
153 0x0f, and make 0x00 an illegal instruction.
154
155 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
156
157 * opcodes/arm-dis.c (struct arm_private_data): New.
158 (print_insn_coprocessor, print_insn_arm): Update to use struct
159 arm_private_data.
160 (is_mapping_symbol, get_map_sym_type): New functions.
161 (get_sym_code_type): Check the symbol's section. Do not check
162 mapping symbols.
163 (print_insn): Default to disassembling ARM mode code. Check
164 for mapping symbols separately from other symbols. Use
165 struct arm_private_data.
166
167 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
168
169 * i386-dis.c (EXVexWdqScalar): New.
170 (vex_scalar_w_dq_mode): Likewise.
171 (prefix_table): Update entries for PREFIX_VEX_3899,
172 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
173 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
174 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
175 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
176 (intel_operand_size): Handle vex_scalar_w_dq_mode.
177 (OP_EX): Likewise.
178
179 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
180
181 * i386-dis.c (XMScalar): New.
182 (EXdScalar): Likewise.
183 (EXqScalar): Likewise.
184 (EXqScalarS): Likewise.
185 (VexScalar): Likewise.
186 (EXdVexScalarS): Likewise.
187 (EXqVexScalarS): Likewise.
188 (XMVexScalar): Likewise.
189 (scalar_mode): Likewise.
190 (d_scalar_mode): Likewise.
191 (d_scalar_swap_mode): Likewise.
192 (q_scalar_mode): Likewise.
193 (q_scalar_swap_mode): Likewise.
194 (vex_scalar_mode): Likewise.
195 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
196 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
197 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
198 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
199 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
200 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
201 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
202 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
203 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
204 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
205 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
206 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
207 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
208 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
209 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
210 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
211 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
212 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
213 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
214 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
215 q_scalar_mode, q_scalar_swap_mode.
216 (OP_XMM): Handle scalar_mode.
217 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
218 and q_scalar_swap_mode.
219 (OP_VEX): Handle vex_scalar_mode.
220
221 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
222
223 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
224
225 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
226
227 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
228
229 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
230
231 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
232
233 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
234
235 * i386-dis.c (Bad_Opcode): New.
236 (bad_opcode): Likewise.
237 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
238 (dis386_twobyte): Likewise.
239 (reg_table): Likewise.
240 (prefix_table): Likewise.
241 (x86_64_table): Likewise.
242 (vex_len_table): Likewise.
243 (vex_w_table): Likewise.
244 (mod_table): Likewise.
245 (rm_table): Likewise.
246 (float_reg): Likewise.
247 (reg_table): Remove trailing "(bad)" entries.
248 (prefix_table): Likewise.
249 (x86_64_table): Likewise.
250 (vex_len_table): Likewise.
251 (vex_w_table): Likewise.
252 (mod_table): Likewise.
253 (rm_table): Likewise.
254 (get_valid_dis386): Handle bytemode 0.
255
256 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
257
258 * i386-opc.h (VEXScalar): New.
259
260 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
261 instructions.
262 * i386-tbl.h: Regenerated.
263
264 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
265
266 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
267
268 * i386-opc.tbl: Add xsave64 and xrstor64.
269 * i386-tbl.h: Regenerated.
270
271 2010-01-20 Nick Clifton <nickc@redhat.com>
272
273 PR 11170
274 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
275 based post-indexed addressing.
276
277 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
278
279 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
280 * i386-tbl.h: Regenerated.
281
282 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
283
284 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
285 comments.
286
287 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
288
289 * i386-dis.c (names_mm): New.
290 (intel_names_mm): Likewise.
291 (att_names_mm): Likewise.
292 (names_xmm): Likewise.
293 (intel_names_xmm): Likewise.
294 (att_names_xmm): Likewise.
295 (names_ymm): Likewise.
296 (intel_names_ymm): Likewise.
297 (att_names_ymm): Likewise.
298 (print_insn): Set names_mm, names_xmm and names_ymm.
299 (OP_MMX): Use names_mm, names_xmm and names_ymm.
300 (OP_XMM): Likewise.
301 (OP_EM): Likewise.
302 (OP_EMC): Likewise.
303 (OP_MXC): Likewise.
304 (OP_EX): Likewise.
305 (XMM_Fixup): Likewise.
306 (OP_VEX): Likewise.
307 (OP_EX_VexReg): Likewise.
308 (OP_Vex_2src): Likewise.
309 (OP_Vex_2src_1): Likewise.
310 (OP_Vex_2src_2): Likewise.
311 (OP_REG_VexI4): Likewise.
312
313 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
314
315 * i386-dis.c (print_insn): Update comments.
316
317 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
318
319 * i386-dis.c (rex_original): Removed.
320 (ckprefix): Remove rex_original.
321 (print_insn): Update comments.
322
323 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
324
325 * Makefile.in: Regenerate.
326 * configure: Regenerate.
327
328 2010-01-07 Doug Evans <dje@sebabeach.org>
329
330 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
331 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
332 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
333 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
334 * xstormy16-ibld.c: Regenerate.
335
336 2010-01-06 Quentin Neill <quentin.neill@amd.com>
337
338 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
339 * i386-init.h: Regenerated.
340
341 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
342
343 * arm-dis.c (print_insn): Fixed search for next symbol and data
344 dumping condition, and the initial mapping symbol state.
345
346 2010-01-05 Doug Evans <dje@sebabeach.org>
347
348 * cgen-ibld.in: #include "cgen/basic-modes.h".
349 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
350 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
351 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
352 * xstormy16-ibld.c: Regenerate.
353
354 2010-01-04 Nick Clifton <nickc@redhat.com>
355
356 PR 11123
357 * arm-dis.c (print_insn_coprocessor): Initialise value.
358
359 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
360
361 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
362
363 2010-01-02 Doug Evans <dje@sebabeach.org>
364
365 * cgen-asm.in: Update copyright year.
366 * cgen-dis.in: Update copyright year.
367 * cgen-ibld.in: Update copyright year.
368 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
369 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
370 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
371 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
372 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
373 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
374 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
375 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
376 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
377 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
378 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
379 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
380 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
381 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
382 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
383 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
384 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
385 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
386 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
387 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
388 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
389
390 For older changes see ChangeLog-2009
391 \f
392 Local Variables:
393 mode: change-log
394 left-margin: 8
395 fill-column: 74
396 version-control: never
397 End:
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