opcodes/ChangeLog

   1 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-dis.c (NOP_Fixup): Removed.
   4         (NOP_Fixup1): New.
   5         (NOP_Fixup2): Likewise.
   6         (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
   7
   8 2006-06-12  Julian Brown  <julian@codesourcery.com>
   9
  10         * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
  11         on 64-bit hosts.
  12
  13 2006-06-10  H.J. Lu  <hongjiu.lu@intel.com>
  14
  15         * i386.c (GRP10): Renamed to ...
  16         (GRP12): This.
  17         (GRP11): Renamed to ...
  18         (GRP13): This.
  19         (GRP12): Renamed to ...
  20         (GRP14): This.
  21         (GRP13): Renamed to ...
  22         (GRP15): This.
  23         (GRP14): Renamed to ...
  24         (GRP16): This.
  25         (dis386_twobyte): Updated.
  26         (grps): Likewise.
  27
  28 2006-06-09  Nick Clifton  <nickc@redhat.com>
  29
  30         * po/fi.po: Updated Finnish translation.
  31
  32 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
  33
  34         * po/Make-in (pdf, ps): New dummy targets.
  35
  36 2006-06-06  Paul Brook  <paul@codesourcery.com>
  37
  38         * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
  39         instructions.
  40         (neon_opcodes): Add conditional execution specifiers.
  41         (thumb_opcodes): Ditto.
  42         (thumb32_opcodes): Ditto.
  43         (arm_conditional): Change 0xe to "al" and add "" to end.
  44         (ifthen_state, ifthen_next_state, ifthen_address): New.
  45         (IFTHEN_COND): Define.
  46         (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
  47         (print_insn_arm): Change %c to use new values of arm_conditional.
  48         (print_insn_thumb16): Print thumb conditions.  Add %I.
  49         (print_insn_thumb32): Print thumb conditions.
  50         (find_ifthen_state): New function.
  51         (print_insn): Track IT block state.
  52
  53 2006-06-06  Ben Elliston  <bje@au.ibm.com>
  54             Anton Blanchard  <anton@samba.org>
  55             Peter Bergner  <bergner@vnet.ibm.com>
  56
  57         * ppc-dis.c (powerpc_dialect): Handle power6 option.
  58         (print_ppc_disassembler_options): Mention power6.
  59
  60 2006-06-06  Thiemo Seufer  <ths@mips.com>
  61             Chao-ying Fu  <fu@mips.com>
  62
  63         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
  64         * mips-opc.c: Add DSP64 instructions.
  65
  66 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
  67
  68         * m68hc11-dis.c (print_insn): Warning fix.
  69
  70 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
  71
  72         * po/Make-in (top_builddir): Define.
  73
  74 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
  75
  76         * Makefile.am: Run "make dep-am".
  77         * Makefile.in: Regenerate.
  78         * config.in: Regenerate.
  79
  80 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
  81
  82         * Makefile.am (INCLUDES): Use @INCINTL@.
  83         * acinclude.m4: Include new gettext macros.
  84         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
  85         Remove local code for po/Makefile.
  86         * Makefile.in, aclocal.m4, configure: Regenerated.
  87
  88 2006-05-30  Nick Clifton  <nickc@redhat.com>
  89
  90         * po/es.po: Updated Spanish translation.
  91
  92 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
  93
  94         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
  95         and fmovem entries.  Put register list entries before immediate
  96         mask entries.  Use "l" rather than "L" in the fmovem entries.
  97         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
  98         out from INFO.
  99         (m68k_scan_mask): New function, split out from...
 100         (print_insn_m68k): ...here.  If no architecture has been set,
 101         first try printing an m680x0 instruction, then try a Coldfire one.
 102
 103 2006-05-24  Nick Clifton  <nickc@redhat.com>
 104
 105         * po/ga.po: Updated Irish translation.
 106
 107 2006-05-22  Nick Clifton  <nickc@redhat.com>
 108
 109         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
 110
 111 2006-05-22  Nick Clifton  <nickc@redhat.com>
 112
 113         * po/nl.po: Updated translation.
 114
 115 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
 116
 117         * avr-dis.c: Formatting fix.
 118
 119 2006-05-14  Thiemo Seufer  <ths@mips.com>
 120
 121         * mips16-opc.c (I1, I32, I64): New shortcut defines.
 122         (mips16_opcodes): Change membership of instructions to their
 123         lowest baseline ISA.
 124
 125 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 126
 127         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
 128
 129 2006-05-05  Julian Brown  <julian@codesourcery.com>
 130
 131         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
 132         vldm/vstm.
 133
 134 2006-05-05  Thiemo Seufer  <ths@mips.com>
 135             David Ung  <davidu@mips.com>
 136
 137         * mips-opc.c: Add macro for cache instruction.
 138
 139 2006-05-04  Thiemo Seufer  <ths@mips.com>
 140             Nigel Stephens  <nigel@mips.com>
 141             David Ung  <davidu@mips.com>
 142
 143         * mips-dis.c (mips_arch_choices): Add smartmips instruction
 144         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
 145         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
 146         MIPS64R2.
 147         * mips-opc.c: fix random typos in comments.
 148         (INSN_SMARTMIPS): New defines.
 149         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
 150         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
 151         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
 152         FP_S and FP_D flags to denote single and double register
 153         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
 154         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
 155         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
 156         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
 157         release 2 ISAs.
 158         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 159
 160 2006-05-03  Thiemo Seufer  <ths@mips.com>
 161
 162         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 163
 164 2006-05-02  Thiemo Seufer  <ths@mips.com>
 165             Nigel Stephens  <nigel@mips.com>
 166             David Ung  <davidu@mips.com>
 167
 168         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 169         (print_mips16_insn_arg): Force mips16 to odd addresses.
 170
 171 2006-04-30  Thiemo Seufer  <ths@mips.com>
 172             David Ung  <davidu@mips.com>
 173
 174         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 175         "udi0" to "udi15".
 176         * mips-dis.c (print_insn_args): Adds udi argument handling.
 177
 178 2006-04-28  James E Wilson  <wilson@specifix.com>
 179
 180         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 181         error message.
 182
 183 2006-04-28  Thiemo Seufer  <ths@mips.com>
 184             David Ung  <davidu@mips.com>
 185             Nigel Stephens  <nigel@mips.com>
 186
 187         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 188         names.
 189
 190 2006-04-28  Thiemo Seufer  <ths@mips.com>
 191             Nigel Stephens  <nigel@mips.com>
 192             David Ung  <davidu@mips.com>
 193
 194         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 195         (print_insn_mips):  Adjust print_insn_args call.
 196
 197 2006-04-28  Thiemo Seufer  <ths@mips.com>
 198             Nigel Stephens  <nigel@mips.com>
 199
 200         * mips-dis.c (print_insn_args): Print $fcc only for FP
 201         instructions, use $cc elsewise.
 202
 203 2006-04-28  Thiemo Seufer  <ths@mips.com>
 204             Nigel Stephens  <nigel@mips.com>
 205
 206         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 207         Map MIPS16 registers to O32 names.
 208         (print_mips16_insn_arg): Use mips16_reg_names.
 209
 210 2006-04-26  Julian Brown  <julian@codesourcery.com>
 211
 212         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 213         VMOV.
 214
 215 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 216             Julian Brown  <julian@codesourcery.com>
 217
 218         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 219         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 220         Add unified load/store instruction names.
 221         (neon_opcode_table): New.
 222         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 223         (arm_decode_bitfield): New.
 224         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 225         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 226         (print_insn_neon): New.
 227         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 228         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 229         (print_insn_thumb32): Likewise.
 230
 231 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 232
 233         * Makefile.am: Run "make dep-am".
 234         * Makefile.in: Regenerate.
 235
 236 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 237
 238         * avr-dis.c (avr_operand): Warning fix.
 239
 240         * configure: Regenerate.
 241
 242 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 243
 244         * po/POTFILES.in: Regenerated.
 245
 246 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 247
 248         PR binutils/2454
 249         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 250         the symolic form of an address, so that the output of objdump -d
 251         can be reassembled.
 252
 253 2006-04-10  DJ Delorie  <dj@redhat.com>
 254
 255         * m32c-asm.c: Regenerate.
 256
 257 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 258
 259         * Makefile.am: Add install-html target.
 260         * Makefile.in: Regenerate.
 261
 262 2006-04-06  Nick Clifton  <nickc@redhat.com>
 263
 264         * po/vi/po: Updated Vietnamese translation.
 265
 266 2006-03-31  Paul Koning  <ni1d@arrl.net>
 267
 268         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 269
 270 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 271
 272         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 273         logic to identify halfword shifts.
 274
 275 2006-03-16  Paul Brook  <paul@codesourcery.com>
 276
 277         * arm-dis.c (arm_opcodes): Rename swi to svc.
 278         (thumb_opcodes): Ditto.
 279
 280 2006-03-13  DJ Delorie  <dj@redhat.com>
 281
 282         * m32c-asm.c: Regenerate.
 283         * m32c-desc.c: Likewise.
 284         * m32c-desc.h: Likewise.
 285         * m32c-dis.c: Likewise.
 286         * m32c-ibld.c: Likewise.
 287         * m32c-opc.c: Likewise.
 288         * m32c-opc.h: Likewise.
 289
 290 2006-03-10  DJ Delorie  <dj@redhat.com>
 291
 292         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 293         * m32c-opc.c: Likewise.
 294         * m32c-opc.h: Likewise.
 295
 296
 297 2006-03-09  Nick Clifton  <nickc@redhat.com>
 298
 299         * po/sv.po: Updated Swedish translation.
 300
 301 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 302
 303         PR binutils/2428
 304         * i386-dis.c (REP_Fixup): New function.
 305         (AL): Remove duplicate.
 306         (Xbr): New.
 307         (Xvr): Likewise.
 308         (Ybr): Likewise.
 309         (Yvr): Likewise.
 310         (indirDXr): Likewise.
 311         (ALr): Likewise.
 312         (eAXr): Likewise.
 313         (dis386): Updated entries of ins, outs, movs, lods and stos.
 314
 315 2006-03-05  Nick Clifton  <nickc@redhat.com>
 316
 317         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 318         signed 32-bit value into an unsigned 32-bit field when the host is
 319         a 64-bit machine.
 320         * fr30-ibld.c: Regenerate.
 321         * frv-ibld.c: Regenerate.
 322         * ip2k-ibld.c: Regenerate.
 323         * iq2000-asm.c: Regenerate.
 324         * iq2000-ibld.c: Regenerate.
 325         * m32c-ibld.c: Regenerate.
 326         * m32r-ibld.c: Regenerate.
 327         * openrisc-ibld.c: Regenerate.
 328         * xc16x-ibld.c: Regenerate.
 329         * xstormy16-ibld.c: Regenerate.
 330
 331 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 332
 333         * xc16x-asm.c: Regenerate.
 334         * xc16x-dis.c: Regenerate.
 335
 336 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 337
 338         * po/Make-in: Add html target.
 339
 340 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 341
 342         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 343         Intel Merom New Instructions.
 344         (THREE_BYTE_0): Likewise.
 345         (THREE_BYTE_1): Likewise.
 346         (three_byte_table): Likewise.
 347         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 348         THREE_BYTE_1 for entry 0x3a.
 349         (twobyte_has_modrm): Updated.
 350         (twobyte_uses_SSE_prefix): Likewise.
 351         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 352         Instructions.
 353
 354 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 355
 356         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 357         (v9_hpriv_reg_names): New table.
 358         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 359         New cases '$' and '%' for read/write hyperprivileged register.
 360         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 361         window handling and rdhpr/wrhpr instructions.
 362
 363 2006-02-24  DJ Delorie  <dj@redhat.com>
 364
 365         * m32c-desc.c: Regenerate with linker relaxation attributes.
 366         * m32c-desc.h: Likewise.
 367         * m32c-dis.c: Likewise.
 368         * m32c-opc.c: Likewise.
 369
 370 2006-02-24  Paul Brook  <paul@codesourcery.com>
 371
 372         * arm-dis.c (arm_opcodes): Add V7 instructions.
 373         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 374         (print_arm_address): New function.
 375         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 376         (psr_name): New function.
 377         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 378
 379 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 380
 381         * ia64-opc-i.c (bXc): New.
 382         (mXc): Likewise.
 383         (OpX2TaTbYaXcC): Likewise.
 384         (TF). Likewise.
 385         (TFCM). Likewise.
 386         (ia64_opcodes_i): Add instructions for tf.
 387
 388         * ia64-opc.h (IMMU5b): New.
 389
 390         * ia64-asmtab.c: Regenerated.
 391
 392 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 393
 394         * ia64-gen.c: Update copyright years.
 395         * ia64-opc-b.c: Likewise.
 396
 397 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 398
 399         * ia64-gen.c (lookup_regindex): Handle ".vm".
 400         (print_dependency_table): Handle '\"'.
 401
 402         * ia64-ic.tbl: Updated from SDM 2.2.
 403         * ia64-raw.tbl: Likewise.
 404         * ia64-waw.tbl: Likewise.
 405         * ia64-asmtab.c: Regenerated.
 406
 407         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 408
 409 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 410             Anil Paranjape   <anilp1@kpitcummins.com>
 411             Shilin Shakti    <shilins@kpitcummins.com>
 412
 413         * xc16x-desc.h: New file
 414         * xc16x-desc.c: New file
 415         * xc16x-opc.h: New file
 416         * xc16x-opc.c: New file
 417         * xc16x-ibld.c: New file
 418         * xc16x-asm.c: New file
 419         * xc16x-dis.c: New file
 420         * Makefile.am: Entries for xc16x
 421         * Makefile.in: Regenerate
 422         * cofigure.in: Add xc16x target information.
 423         * configure: Regenerate.
 424         * disassemble.c: Add xc16x target information.
 425
 426 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 427
 428         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 429         moves.
 430
 431 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 432
 433         * i386-dis.c ('Z'): Add a new macro.
 434         (dis386_twobyte): Use "movZ" for control register moves.
 435
 436 2006-02-10  Nick Clifton  <nickc@redhat.com>
 437
 438         * iq2000-asm.c: Regenerate.
 439
 440 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 441
 442         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 443
 444 2006-01-26  David Ung  <davidu@mips.com>
 445
 446         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 447         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 448         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 449         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 450         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 451
 452 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 453
 454         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 455         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 456         disassembled.
 457         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 458         buffer overflows when disassembling instructions like
 459         ld (ix+123),0x23
 460         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 461         operand, if the offset is negative.
 462
 463 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 464
 465         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 466         unsigned char to hold data to be disassembled.
 467
 468 2006-01-17  Andreas Schwab  <schwab@suse.de>
 469
 470         PR binutils/1486
 471         * disassemble.c (disassemble_init_for_target): Set
 472         disassembler_needs_relocs for bfd_arch_arm.
 473
 474 2006-01-16  Paul Brook  <paul@codesourcery.com>
 475
 476         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 477         f?add?, and f?sub? instructions.
 478
 479 2006-01-16  Nick Clifton  <nickc@redhat.com>
 480
 481         * po/zh_CN.po: New Chinese (simplified) translation.
 482         * configure.in (ALL_LINGUAS): Add "zh_CH".
 483         * configure: Regenerate.
 484
 485 2006-01-05  Paul Brook  <paul@codesourcery.com>
 486
 487         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 488
 489 2006-01-06  DJ Delorie  <dj@redhat.com>
 490
 491         * m32c-desc.c: Regenerate.
 492         * m32c-opc.c: Regenerate.
 493         * m32c-opc.h: Regenerate.
 494
 495 2006-01-03  DJ Delorie  <dj@redhat.com>
 496
 497         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 498         * m32c-ibld.c: Regenerated.
 499
 500 For older changes see ChangeLog-2005
 501 \f
 502 Local Variables:
 503 mode: change-log
 504 left-margin: 8
 505 fill-column: 74
 506 version-control: never
 507 End: