opcodes/ChangeLog

   1 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * cris-dis.c (format_hex): Remove ineffective warning fix.
   4         * crx-dis.c (make_instruction): Warning fix.
   5         * frv-asm.c: Regenerate.
   6
   7 2005-02-23  Nick Clifton  <nickc@redhat.com>
   8
   9         * cgen-dis.in: Use bfd_byte for buffers that are passed to
  10         read_memory.
  11
  12         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
  13
  14         * crx-dis.c (make_instruction): Move argument structure into inner
  15         scope and ensure that all of its fields are initialised before
  16         they are used.
  17
  18         * fr30-asm.c: Regenerate.
  19         * fr30-dis.c: Regenerate.
  20         * frv-asm.c: Regenerate.
  21         * frv-dis.c: Regenerate.
  22         * ip2k-asm.c: Regenerate.
  23         * ip2k-dis.c: Regenerate.
  24         * iq2000-asm.c: Regenerate.
  25         * iq2000-dis.c: Regenerate.
  26         * m32r-asm.c: Regenerate.
  27         * m32r-dis.c: Regenerate.
  28         * openrisc-asm.c: Regenerate.
  29         * openrisc-dis.c: Regenerate.
  30         * xstormy16-asm.c: Regenerate.
  31         * xstormy16-dis.c: Regenerate.
  32
  33 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
  34
  35         * arc-ext.c: Warning fixes.
  36         * arc-ext.h: Likewise.
  37         * cgen-opc.c: Likewise.
  38         * ia64-gen.c: Likewise.
  39         * maxq-dis.c: Likewise.
  40         * ns32k-dis.c: Likewise.
  41         * w65-dis.c: Likewise.
  42         * ia64-asmtab.c: Regenerate.
  43
  44 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
  45
  46         * fr30-desc.c: Regenerate.
  47         * fr30-desc.h: Regenerate.
  48         * fr30-opc.c: Regenerate.
  49         * fr30-opc.h: Regenerate.
  50         * frv-desc.c: Regenerate.
  51         * frv-desc.h: Regenerate.
  52         * frv-opc.c: Regenerate.
  53         * frv-opc.h: Regenerate.
  54         * ip2k-desc.c: Regenerate.
  55         * ip2k-desc.h: Regenerate.
  56         * ip2k-opc.c: Regenerate.
  57         * ip2k-opc.h: Regenerate.
  58         * iq2000-desc.c: Regenerate.
  59         * iq2000-desc.h: Regenerate.
  60         * iq2000-opc.c: Regenerate.
  61         * iq2000-opc.h: Regenerate.
  62         * m32r-desc.c: Regenerate.
  63         * m32r-desc.h: Regenerate.
  64         * m32r-opc.c: Regenerate.
  65         * m32r-opc.h: Regenerate.
  66         * m32r-opinst.c: Regenerate.
  67         * openrisc-desc.c: Regenerate.
  68         * openrisc-desc.h: Regenerate.
  69         * openrisc-opc.c: Regenerate.
  70         * openrisc-opc.h: Regenerate.
  71         * xstormy16-desc.c: Regenerate.
  72         * xstormy16-desc.h: Regenerate.
  73         * xstormy16-opc.c: Regenerate.
  74         * xstormy16-opc.h: Regenerate.
  75
  76 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
  77
  78         * Makefile.am: Run "make dep-am"
  79         * Makefile.in: Regenerate.
  80
  81 2005-02-15  Nick Clifton  <nickc@redhat.com>
  82
  83         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
  84         compile time warnings.
  85         (print_keyword): Likewise.
  86         (default_print_insn): Likewise.
  87
  88         * fr30-desc.c: Regenerated.
  89         * fr30-desc.h: Regenerated.
  90         * fr30-dis.c: Regenerated.
  91         * fr30-opc.c: Regenerated.
  92         * fr30-opc.h: Regenerated.
  93         * frv-desc.c: Regenerated.
  94         * frv-dis.c: Regenerated.
  95         * frv-opc.c: Regenerated.
  96         * ip2k-asm.c: Regenerated.
  97         * ip2k-desc.c: Regenerated.
  98         * ip2k-desc.h: Regenerated.
  99         * ip2k-dis.c: Regenerated.
 100         * ip2k-opc.c: Regenerated.
 101         * ip2k-opc.h: Regenerated.
 102         * iq2000-desc.c: Regenerated.
 103         * iq2000-dis.c: Regenerated.
 104         * iq2000-opc.c: Regenerated.
 105         * m32r-asm.c: Regenerated.
 106         * m32r-desc.c: Regenerated.
 107         * m32r-desc.h: Regenerated.
 108         * m32r-dis.c: Regenerated.
 109         * m32r-opc.c: Regenerated.
 110         * m32r-opc.h: Regenerated.
 111         * m32r-opinst.c: Regenerated.
 112         * openrisc-desc.c: Regenerated.
 113         * openrisc-desc.h: Regenerated.
 114         * openrisc-dis.c: Regenerated.
 115         * openrisc-opc.c: Regenerated.
 116         * openrisc-opc.h: Regenerated.
 117         * xstormy16-desc.c: Regenerated.
 118         * xstormy16-desc.h: Regenerated.
 119         * xstormy16-dis.c: Regenerated.
 120         * xstormy16-opc.c: Regenerated.
 121         * xstormy16-opc.h: Regenerated.
 122
 123 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 124
 125         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 126         address.
 127
 128 2005-02-11  Nick Clifton  <nickc@redhat.com>
 129
 130         * iq2000-asm.c: Regenerate.
 131
 132         * frv-dis.c: Regenerate.
 133
 134 2005-02-07  Jim Blandy  <jimb@redhat.com>
 135
 136         * Makefile.am (CGEN): Load guile.scm before calling the main
 137         application script.
 138         * Makefile.in: Regenerated.
 139         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 140         Simply pass the cgen-opc.scm path to ${cgen} as its first
 141         argument; ${cgen} itself now contains the '-s', or whatever is
 142         appropriate for the Scheme being used.
 143
 144 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 145
 146         * configure: Regenerate to track ../gettext.m4.
 147
 148 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 149
 150         * ia64-gen.c (NELEMS): Define.
 151         (shrink): Generate alias with missing second predicate register when
 152         opcode has two outputs and these are both predicates.
 153         * ia64-opc-i.c (FULL17): Define.
 154         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 155         here to generate output template.
 156         (TBITCM, TNATCM): Undefine after use.
 157         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 158         first input. Add ld16 aliases without ar.csd as second output. Add
 159         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 160         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 161         ar.ccv as third/fourth inputs. Consolidate through...
 162         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 163         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 164         * ia64-asmtab.c: Regenerate.
 165
 166 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 167
 168         * configure: Regenerate to track ../gettext.m4 change.
 169
 170 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 171
 172         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 173         * frv-asm.c: Rebuilt.
 174         * frv-desc.c: Rebuilt.
 175         * frv-desc.h: Rebuilt.
 176         * frv-dis.c: Rebuilt.
 177         * frv-ibld.c: Rebuilt.
 178         * frv-opc.c: Rebuilt.
 179         * frv-opc.h: Rebuilt.
 180
 181 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 182
 183         * configure: Regenerate, ../gettext.m4 was updated.
 184
 185 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 186
 187         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 188         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 189         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 190         * mips-dis.c: Ditto.
 191
 192 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 193
 194         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 195
 196 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 197
 198         * mips-dis.c (no_aliases): New disassembly option flag.
 199         (set_default_mips_dis_options): Init no_aliases to zero.
 200         (parse_mips_dis_option): Handle no-aliases option.
 201         (print_insn_mips): Ignore table entries that are aliases
 202         if no_aliases is set.
 203         (print_insn_mips16): Ditto.
 204         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 205         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 206         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 207         * mips16-opc.c (mips16_opcodes): Ditto.
 208
 209 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 210
 211         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 212         (inheritance diagram): Add missing edge.
 213         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 214         easier for the testsuite.
 215         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 216         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 217         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 218         arch_sh2a_or_sh4_up child.
 219         (sh_table): Do renaming as above.
 220         Correct comment for ldc.l for gas testsuite to read.
 221         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 222         Correct comments for movy.w and movy.l for gas testsuite to read.
 223         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 224
 225 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 226
 227         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 228
 229 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 230
 231         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 232
 233 2005-01-10  Andreas Schwab  <schwab@suse.de>
 234
 235         * disassemble.c (disassemble_init_for_target) <case
 236         bfd_arch_ia64>: Set skip_zeroes to 16.
 237         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 238
 239 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 240
 241         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 242
 243 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 244
 245         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 246         memory references. Convert avr_operand() to C90 formatting.
 247
 248 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 249
 250         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 251
 252 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 253
 254         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 255         (no_op_insn): Initialize array with instructions that have no
 256         operands.
 257         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 258
 259 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 260
 261         * arm-dis.c: Correct top-level comment.
 262
 263 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 264
 265         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 266         architecuture defining the insn.
 267         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 268         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 269         field.
 270         Also include opcode/arm.h.
 271         * Makefile.am (arm-dis.lo): Update dependency list.
 272         * Makefile.in: Regenerate.
 273
 274 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 275
 276         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 277         reflect the change to the short immediate syntax.
 278
 279 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 280
 281         * or32-opc.c (debug): Warning fix.
 282         * po/POTFILES.in: Regenerate.
 283
 284         * maxq-dis.c: Formatting.
 285         (print_insn): Warning fix.
 286
 287 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 288
 289         * arm-dis.c (WORD_ADDRESS): Define.
 290         (print_insn): Use it.  Correct big-endian end-of-section handling.
 291
 292 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 293             Vineet Sharma      <vineets@noida.hcltech.com>
 294
 295         * maxq-dis.c: New file.
 296         * disassemble.c (ARCH_maxq): Define.
 297         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 298         instructions..
 299         * configure.in: Add case for bfd_maxq_arch.
 300         * configure: Regenerate.
 301         * Makefile.am: Add support for maxq-dis.c
 302         * Makefile.in: Regenerate.
 303         * aclocal.m4: Regenerate.
 304
 305 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 306
 307         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 308         mode.
 309         * crx-dis.c: Likewise.
 310
 311 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 312
 313         Generally, handle CRISv32.
 314         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 315         (struct cris_disasm_data): New type.
 316         (format_reg, format_hex, cris_constraint, print_flags)
 317         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 318         callers changed.
 319         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 320         (print_insn_crisv32_without_register_prefix)
 321         (print_insn_crisv10_v32_with_register_prefix)
 322         (print_insn_crisv10_v32_without_register_prefix)
 323         (cris_parse_disassembler_options): New functions.
 324         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 325         parameter.  All callers changed.
 326         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 327         failure.
 328         (cris_constraint) <case 'Y', 'U'>: New cases.
 329         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 330         for constraint 'n'.
 331         (print_with_operands) <case 'Y'>: New case.
 332         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 333         <case 'N', 'Y', 'Q'>: New cases.
 334         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 335         (print_insn_cris_with_register_prefix)
 336         (print_insn_cris_without_register_prefix): Call
 337         cris_parse_disassembler_options.
 338         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 339         for CRISv32 and the size of immediate operands.  New v32-only
 340         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 341         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 342         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 343         Change brp to be v3..v10.
 344         (cris_support_regs): New vector.
 345         (cris_opcodes): Update head comment.  New format characters '[',
 346         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 347         Add new opcodes for v32 and adjust existing opcodes to accommodate
 348         differences to earlier variants.
 349         (cris_cond15s): New vector.
 350
 351 2004-11-04 Jan Beulich <jbeulich@novell.com>
 352
 353         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 354         (indirEb): Remove.
 355         (Mp): Use f_mode rather than none at all.
 356         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 357         replaces what previously was x_mode; x_mode now means 128-bit SSE
 358         operands.
 359         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 360         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 361         pinsrw's second operand is Edqw.
 362         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 363         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 364         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 365         mode when an operand size override is present or always suffixing.
 366         More instructions will need to be added to this group.
 367         (putop): Handle new macro chars 'C' (short/long suffix selector),
 368         'I' (Intel mode override for following macro char), and 'J' (for
 369         adding the 'l' prefix to far branches in AT&T mode). When an
 370         alternative was specified in the template, honor macro character when
 371         specified for Intel mode.
 372         (OP_E): Handle new *_mode values. Correct pointer specifications for
 373         memory operands. Consolidate output of index register.
 374         (OP_G): Handle new *_mode values.
 375         (OP_I): Handle const_1_mode.
 376         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 377         respective opcode prefix bits have been consumed.
 378         (OP_EM, OP_EX): Provide some default handling for generating pointer
 379         specifications.
 380
 381 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 382
 383         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 384         COP_INST macro.
 385
 386 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 387
 388         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 389         (getregliststring): Support HI/LO and user registers.
 390         * crx-opc.c (crx_instruction): Update data structure according to the
 391         rearrangement done in CRX opcode header file.
 392         (crx_regtab):  Likewise.
 393         (crx_optab):  Likewise.
 394         (crx_instruction): Reorder load/stor instructions, remove unsupported
 395         formats.
 396         support new Co-Processor instruction 'cpi'.
 397
 398 2004-10-27  Nick Clifton  <nickc@redhat.com>
 399
 400         * opcodes/iq2000-asm.c: Regenerate.
 401         * opcodes/iq2000-desc.c: Regenerate.
 402         * opcodes/iq2000-desc.h: Regenerate.
 403         * opcodes/iq2000-dis.c: Regenerate.
 404         * opcodes/iq2000-ibld.c: Regenerate.
 405         * opcodes/iq2000-opc.c: Regenerate.
 406         * opcodes/iq2000-opc.h: Regenerate.
 407
 408 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 409
 410         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 411         us4, us5 (respectively).
 412         Remove unsupported 'popa' instruction.
 413         Reverse operands order in store co-processor instructions.
 414
 415 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 416
 417         * Makefile.am: Run "make dep-am"
 418         * Makefile.in: Regenerate.
 419
 420 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 421
 422         * xtensa-dis.c: Use ISO C90 formatting.
 423
 424 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 425
 426         * ppc-opc.c: Revert 2004-09-09 change.
 427
 428 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 429
 430         * xtensa-dis.c (state_names): Delete.
 431         (fetch_data): Use xtensa_isa_maxlength.
 432         (print_xtensa_operand): Replace operand parameter with opcode/operand
 433         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 434         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 435         instruction bundles.  Use xmalloc instead of malloc.
 436
 437 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 438
 439         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 440         initializers.
 441
 442 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 443
 444         * crx-opc.c (crx_instruction): Support Co-processor insns.
 445         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 446         (getregliststring): Change function to use the above enum.
 447         (print_arg): Handle CO-Processor insns.
 448         (crx_cinvs): Add 'b' option to invalidate the branch-target
 449         cache.
 450
 451 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 452
 453         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 454         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 455         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 456         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 457         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 458
 459 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 460
 461         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 462         rather than add it.
 463
 464 2004-09-30  Paul Brook  <paul@codesourcery.com>
 465
 466         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 467         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 468
 469 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 470
 471         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 472         (CONFIG_STATUS_DEPENDENCIES): New.
 473         (Makefile): Removed.
 474         (config.status): Likewise.
 475         * Makefile.in: Regenerated.
 476
 477 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 478
 479         * Makefile.am: Run "make dep-am".
 480         * Makefile.in: Regenerate.
 481         * aclocal.m4: Regenerate.
 482         * configure: Regenerate.
 483         * po/POTFILES.in: Regenerate.
 484         * po/opcodes.pot: Regenerate.
 485
 486 2004-09-11  Andreas Schwab  <schwab@suse.de>
 487
 488         * configure: Rebuild.
 489
 490 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 491
 492         * ppc-opc.c (L): Make this field not optional.
 493
 494 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 495
 496         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 497         Fix parameter to 'm[t|f]csr' insns.
 498
 499 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 500
 501         * configure.in: Autoupdate to autoconf 2.59.
 502         * aclocal.m4: Rebuild with aclocal 1.4p6.
 503         * configure: Rebuild with autoconf 2.59.
 504         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 505         bfd changes for autoconf 2.59 on the way).
 506         * config.in: Rebuild with autoheader 2.59.
 507
 508 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 509
 510         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 511
 512 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 513
 514         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 515         (GRPPADLCK2): New define.
 516         (twobyte_has_modrm): True for 0xA6.
 517         (grps): GRPPADLCK2 for opcode 0xA6.
 518
 519 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 520
 521         Introduce SH2a support.
 522         * sh-opc.h (arch_sh2a_base): Renumber.
 523         (arch_sh2a_nofpu_base): Remove.
 524         (arch_sh_base_mask): Adjust.
 525         (arch_opann_mask): New.
 526         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 527         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 528         (sh_table): Adjust whitespace.
 529         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 530         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 531         instruction list throughout.
 532         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 533         of arch_sh2a in instruction list throughout.
 534         (arch_sh2e_up): Accomodate above changes.
 535         (arch_sh2_up): Ditto.
 536         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 537         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 538         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 539         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 540         * sh-opc.h (arch_sh2a_nofpu): New.
 541         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 542         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 543         instruction.
 544         2004-01-20  DJ Delorie  <dj@redhat.com>
 545         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 546         2003-12-29  DJ Delorie  <dj@redhat.com>
 547         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 548         sh_opcode_info, sh_table): Add sh2a support.
 549         (arch_op32): New, to tag 32-bit opcodes.
 550         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 551         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 552         * sh-opc.h (arch_sh2a): Add.
 553         * sh-dis.c (arch_sh2a): Handle.
 554         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 555
 556 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 557
 558         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 559
 560 2004-07-22  Nick Clifton  <nickc@redhat.com>
 561
 562         PR/280
 563         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 564         insns - this is done by objdump itself.
 565         * h8500-dis.c (print_insn_h8500): Likewise.
 566
 567 2004-07-21  Jan Beulich <jbeulich@novell.com>
 568
 569         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 570         regardless of address size prefix in effect.
 571         (ptr_reg): Size or address registers does not depend on rex64, but
 572         on the presence of an address size override.
 573         (OP_MMX): Use rex.x only for xmm registers.
 574         (OP_EM): Use rex.z only for xmm registers.
 575
 576 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 577
 578         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 579         move/branch operations to the bottom so that VR5400 multimedia
 580         instructions take precedence in disassembly.
 581
 582 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 583
 584         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 585         ISA-specific "break" encoding.
 586
 587 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 588
 589         * arm-opc.h: Fix typo in comment.
 590
 591 2004-07-11  Andreas Schwab  <schwab@suse.de>
 592
 593         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 594
 595 2004-07-09  Andreas Schwab  <schwab@suse.de>
 596
 597         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 598
 599 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 600
 601         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 602         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 603         (crx-dis.lo): New target.
 604         (crx-opc.lo): Likewise.
 605         * Makefile.in: Regenerate.
 606         * configure.in: Handle bfd_crx_arch.
 607         * configure: Regenerate.
 608         * crx-dis.c: New file.
 609         * crx-opc.c: New file.
 610         * disassemble.c (ARCH_crx): Define.
 611         (disassembler): Handle ARCH_crx.
 612
 613 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 614
 615         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 616         * ia64-asmtab.c: Regnerate.
 617
 618 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 619
 620         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 621         (extract_fxm): Don't test dialect.
 622         (XFXFXM_MASK): Include the power4 bit.
 623         (XFXM): Add p4 param.
 624         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 625
 626 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 627
 628         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 629         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 630
 631 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 632
 633         * ppc-opc.c (BH, XLBH_MASK): Define.
 634         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 635
 636 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 637
 638         * i386-dis.c (x_mode): Comment.
 639         (two_source_ops): File scope.
 640         (float_mem): Correct fisttpll and fistpll.
 641         (float_mem_mode): New table.
 642         (dofloat): Use it.
 643         (OP_E): Correct intel mode PTR output.
 644         (ptr_reg): Use open_char and close_char.
 645         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 646         operands.  Set two_source_ops.
 647
 648 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 649
 650         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 651         instead of _raw_size.
 652
 653 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 654
 655         * ia64-gen.c (in_iclass): Handle more postinc st
 656         and ld variants.
 657         * ia64-asmtab.c: Rebuilt.
 658
 659 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 660
 661         * s390-opc.txt: Correct architecture mask for some opcodes.
 662         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 663         in the esa mode as well.
 664
 665 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 666
 667         * sh-dis.c (target_arch): Make unsigned.
 668         (print_insn_sh): Replace (most of) switch with a call to
 669         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 670         * sh-opc.h: Redefine architecture flags values.
 671         Add sh3-nommu architecture.
 672         Reorganise <arch>_up macros so they make more visual sense.
 673         (SH_MERGE_ARCH_SET): Define new macro.
 674         (SH_VALID_BASE_ARCH_SET): Likewise.
 675         (SH_VALID_MMU_ARCH_SET): Likewise.
 676         (SH_VALID_CO_ARCH_SET): Likewise.
 677         (SH_VALID_ARCH_SET): Likewise.
 678         (SH_MERGE_ARCH_SET_VALID): Likewise.
 679         (SH_ARCH_SET_HAS_FPU): Likewise.
 680         (SH_ARCH_SET_HAS_DSP): Likewise.
 681         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 682         (sh_get_arch_from_bfd_mach): Add prototype.
 683         (sh_get_arch_up_from_bfd_mach): Likewise.
 684         (sh_get_bfd_mach_from_arch_set): Likewise.
 685         (sh_merge_bfd_arc): Likewise.
 686
 687 2004-05-24  Peter Barada  <peter@the-baradas.com>
 688
 689         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 690         into new match_insn_m68k function.  Loop over canidate
 691         matches and select first that completely matches.
 692         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 693         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 694         to verify addressing for MAC/EMAC.
 695         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 696         reigster halves since 'fpu' and 'spl' look misleading.
 697         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 698         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 699         first, tighten up match masks.
 700         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 701         'size' from special case code in print_insn_m68k to
 702         determine decode size of insns.
 703
 704 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 705
 706         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 707         well as when -mpower4.
 708
 709 2004-05-13  Nick Clifton  <nickc@redhat.com>
 710
 711         * po/fr.po: Updated French translation.
 712
 713 2004-05-05  Peter Barada  <peter@the-baradas.com>
 714
 715         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 716         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 717         * m68k-op.c: Switch from ColdFire chips to core variants.
 718
 719 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 720
 721         PR 147.
 722         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 723
 724 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 725
 726         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 727         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 728
 729 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 730
 731         * sh-dis.c (print_insn_sh): Print the value in constant pool
 732         as a symbol if it looks like a symbol.
 733
 734 2004-04-22  Peter Barada <peter@the-baradas.com>
 735
 736         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 737         appropriate ColdFire architectures.
 738         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 739         mask addressing.
 740         Add EMAC instructions, fix MAC instructions. Remove
 741         macmw/macml/msacmw/msacml instructions since mask addressing now
 742         supported.
 743
 744 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 745
 746         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 747         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 748         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 749         macro.  Adjust all users.
 750
 751 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 752
 753         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 754         separately.
 755
 756 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 757
 758         * m32r-asm.c: Regenerate.
 759
 760 2004-03-29  Stan Shebs  <shebs@apple.com>
 761
 762         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 763         used.
 764
 765 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 766
 767         * aclocal.m4: Regenerate.
 768         * config.in: Regenerate.
 769         * configure: Regenerate.
 770         * po/POTFILES.in: Regenerate.
 771         * po/opcodes.pot: Regenerate.
 772
 773 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 774
 775         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 776         PPC_OPERANDS_GPR_0.
 777         * ppc-opc.c (RA0): Define.
 778         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 779         (RAOPT): Rename from RAO.  Update all uses.
 780         (powerpc_opcodes): Use RA0 as appropriate.
 781
 782 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 783
 784         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 785
 786 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 787
 788         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 789
 790 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 791
 792         * i386-dis.c (GRPPLOCK): Delete.
 793         (grps): Delete GRPPLOCK entry.
 794
 795 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 796
 797         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 798         (M, Mp): Use OP_M.
 799         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 800         (GRPPADLCK): Define.
 801         (dis386): Use NOP_Fixup on "nop".
 802         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 803         (twobyte_has_modrm): Set for 0xa7.
 804         (padlock_table): Delete.  Move to..
 805         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 806         and clflush.
 807         (print_insn): Revert PADLOCK_SPECIAL code.
 808         (OP_E): Delete sfence, lfence, mfence checks.
 809
 810 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 811
 812         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 813         (INVLPG_Fixup): New function.
 814         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 815
 816 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 817
 818         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 819         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 820         (padlock_table): New struct with PadLock instructions.
 821         (print_insn): Handle PADLOCK_SPECIAL.
 822
 823 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 824
 825         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 826         (OP_E): Twiddle clflush to sfence here.
 827
 828 2004-03-08  Nick Clifton  <nickc@redhat.com>
 829
 830         * po/de.po: Updated German translation.
 831
 832 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 833
 834         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 835         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 836         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 837         accordingly.
 838
 839 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 840
 841         * frv-asm.c: Regenerate.
 842         * frv-desc.c: Regenerate.
 843         * frv-desc.h: Regenerate.
 844         * frv-dis.c: Regenerate.
 845         * frv-ibld.c: Regenerate.
 846         * frv-opc.c: Regenerate.
 847         * frv-opc.h: Regenerate.
 848
 849 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 850
 851         * frv-desc.c, frv-opc.c: Regenerate.
 852
 853 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 854
 855         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 856
 857 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 858
 859         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 860         Also correct mistake in the comment.
 861
 862 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 863
 864         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 865         ensure that double registers have even numbers.
 866         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 867         that reserved instruction 0xfffd does not decode the same
 868         as 0xfdfd (ftrv).
 869         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 870         REG_N refers to a double register.
 871         Add REG_N_B01 nibble type and use it instead of REG_NM
 872         in ftrv.
 873         Adjust the bit patterns in a few comments.
 874
 875 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 876
 877         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 878
 879 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 880
 881         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 882
 883 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 884
 885         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 886
 887 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 888
 889         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 890         mtivor32, mtivor33, mtivor34.
 891
 892 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 893
 894         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 895
 896 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 897
 898         * arm-opc.h Maverick accumulator register opcode fixes.
 899
 900 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 901
 902         * m32r-dis.c: Regenerate.
 903
 904 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 905
 906         * sh-opc.h (sh_table): "fsrra", not "fssra".
 907
 908 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 909
 910         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 911         contraints.
 912
 913 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 914
 915         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 916
 917 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 918
 919         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 920         1.  Don't print scale factor on AT&T mode when index missing.
 921
 922 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 923
 924         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 925         when loaded into XR registers.
 926
 927 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 928
 929         * frv-desc.h: Regenerate.
 930         * frv-desc.c: Regenerate.
 931         * frv-opc.c: Regenerate.
 932
 933 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 934
 935         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 936
 937 2004-01-09  Paul Brook  <paul@codesourcery.com>
 938
 939         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 940         specific opcodes.
 941
 942 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 943
 944         * Makefile.am (libopcodes_la_DEPENDENCIES)
 945         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 946         comment about the problem.
 947         * Makefile.in: Regenerate.
 948
 949 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 950
 951         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 952         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 953         cut&paste errors in shifting/truncating numerical operands.
 954         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 955         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 956         (parse_uslo16): Likewise.
 957         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 958         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 959         (parse_s12): Likewise.
 960         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 961         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 962         (parse_uslo16): Likewise.
 963         (parse_uhi16): Parse gothi and gotfuncdeschi.
 964         (parse_d12): Parse got12 and gotfuncdesc12.
 965         (parse_s12): Likewise.
 966
 967 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 968
 969         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 970         instruction which looks similar to an 'rla' instruction.
 971
 972 For older changes see ChangeLog-0203
 973 \f
 974 Local Variables:
 975 mode: change-log
 976 left-margin: 8
 977 fill-column: 74
 978 version-control: never
 979 End: