opcodes/ChangeLog

   1 2005-07-14  Jim Blandy  <jimb@redhat.com>
   2
   3         Add support for the Renesas M32C and M16C.
   4         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
   5         * m32c-desc.h, m32c-opc.h: New.
   6         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
   7         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
   8         m32c-opc.c.
   9         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
  10         m32c-ibld.lo, m32c-opc.lo.
  11         (CLEANFILES): List stamp-m32c.
  12         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
  13         (CGEN_CPUS): Add m32c.
  14         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
  15         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
  16         (m32c_opc_h): New variable.
  17         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
  18         (m32c-opc.lo): New rules.
  19         * Makefile.in: Regenerated.
  20         * configure.in: Add case for bfd_m32c_arch.
  21         * configure: Regenerated.
  22         * disassemble.c (ARCH_m32c): New.
  23         [ARCH_m32c]: #include "m32c-desc.h".
  24         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
  25         (disassemble_init_for_target) [ARCH_m32c]: Same.
  26
  27         * cgen-ops.h, cgen-types.h: New files.
  28         * Makefile.am (HFILES): List them.
  29         * Makefile.in: Regenerated.
  30
  31 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
  32
  33         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
  34         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
  35         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
  36         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
  37         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
  38         v850-dis.c: Fix format bugs.
  39         * ia64-gen.c (fail, warn): Add format attribute.
  40         * or32-opc.c (debug): Likewise.
  41
  42 2005-07-07  Khem Raj  <kraj@mvista.com>
  43
  44         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
  45         disassembly pattern.
  46
  47 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
  48
  49         * Makefile.am (stamp-m32r): Fix path to cpu files.
  50         (stamp-m32r, stamp-iq2000): Likewise.
  51         * Makefile.in: Regenerate.
  52         * m32r-asm.c: Regenerate.
  53         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
  54         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
  55
  56 2005-07-05  Nick Clifton  <nickc@redhat.com>
  57
  58         * iq2000-asm.c: Regenerate.
  59         * ms1-asm.c: Regenerate.
  60
  61 2005-07-05  Jan Beulich  <jbeulich@novell.com>
  62
  63         * i386-dis.c (SVME_Fixup): New.
  64         (grps): Use it for the lidt entry.
  65         (PNI_Fixup): Call OP_M rather than OP_E.
  66         (INVLPG_Fixup): Likewise.
  67
  68 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
  69
  70         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
  71
  72 2005-07-01  Nick Clifton  <nickc@redhat.com>
  73
  74         * a29k-dis.c: Update to ISO C90 style function declarations and
  75         fix formatting.
  76         * alpha-opc.c: Likewise.
  77         * arc-dis.c: Likewise.
  78         * arc-opc.c: Likewise.
  79         * avr-dis.c: Likewise.
  80         * cgen-asm.in: Likewise.
  81         * cgen-dis.in: Likewise.
  82         * cgen-ibld.in: Likewise.
  83         * cgen-opc.c: Likewise.
  84         * cris-dis.c: Likewise.
  85         * d10v-dis.c: Likewise.
  86         * d30v-dis.c: Likewise.
  87         * d30v-opc.c: Likewise.
  88         * dis-buf.c: Likewise.
  89         * dlx-dis.c: Likewise.
  90         * h8300-dis.c: Likewise.
  91         * h8500-dis.c: Likewise.
  92         * hppa-dis.c: Likewise.
  93         * i370-dis.c: Likewise.
  94         * i370-opc.c: Likewise.
  95         * m10200-dis.c: Likewise.
  96         * m10300-dis.c: Likewise.
  97         * m68k-dis.c: Likewise.
  98         * m88k-dis.c: Likewise.
  99         * mips-dis.c: Likewise.
 100         * mmix-dis.c: Likewise.
 101         * msp430-dis.c: Likewise.
 102         * ns32k-dis.c: Likewise.
 103         * or32-dis.c: Likewise.
 104         * or32-opc.c: Likewise.
 105         * pdp11-dis.c: Likewise.
 106         * pj-dis.c: Likewise.
 107         * s390-dis.c: Likewise.
 108         * sh-dis.c: Likewise.
 109         * sh64-dis.c: Likewise.
 110         * sparc-dis.c: Likewise.
 111         * sparc-opc.c: Likewise.
 112         * sysdep.h: Likewise.
 113         * tic30-dis.c: Likewise.
 114         * tic4x-dis.c: Likewise.
 115         * tic80-dis.c: Likewise.
 116         * v850-dis.c: Likewise.
 117         * v850-opc.c: Likewise.
 118         * vax-dis.c: Likewise.
 119         * w65-dis.c: Likewise.
 120         * z8kgen.c: Likewise.
 121
 122         * fr30-*: Regenerate.
 123         * frv-*: Regenerate.
 124         * ip2k-*: Regenerate.
 125         * iq2000-*: Regenerate.
 126         * m32r-*: Regenerate.
 127         * ms1-*: Regenerate.
 128         * openrisc-*: Regenerate.
 129         * xstormy16-*: Regenerate.
 130
 131 2005-06-23  Ben Elliston  <bje@gnu.org>
 132
 133         * m68k-dis.c: Use ISC C90.
 134         * m68k-opc.c: Formatting fixes.
 135
 136 2005-06-16  David Ung  <davidu@mips.com>
 137
 138         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 139         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 140
 141 2005-06-15  Dave Brolley  <brolley@redhat.com>
 142
 143         Contribute Morpho ms1 on behalf of Red Hat
 144         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 145         ms1-opc.h: New files, Morpho ms1 target.
 146
 147         2004-05-14  Stan Cox  <scox@redhat.com>
 148
 149         * disassemble.c (ARCH_ms1): Define.
 150         (disassembler): Handle bfd_arch_ms1
 151
 152         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 153
 154         * Makefile.am, Makefile.in: Add ms1 target.
 155         * configure.in: Ditto.
 156
 157 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 158
 159         * arm-opc.h: Delete; fold contents into ...
 160         * arm-dis.c: ... here.  Move includes of internal COFF headers
 161         next to includes of internal ELF headers.
 162         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 163         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 164         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 165         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 166         (iwmmxt_wwnames, iwmmxt_wwssnames):
 167         Make const.
 168         (regnames): Remove iWMMXt coprocessor register sets.
 169         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 170         (get_arm_regnames): Adjust fourth argument to match above changes.
 171         (set_iwmmxt_regnames): Delete.
 172         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 173         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 174         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 175         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 176         ISO syntax for function pointer calls.
 177
 178 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 179
 180         * arm-dis.c: Split up the comments describing the format codes, so
 181         that the ARM and 16-bit Thumb opcode tables each have comments
 182         preceding them that describe all the codes, and only the codes,
 183         valid in those tables.  (32-bit Thumb table is already like this.)
 184         Reorder the lists in all three comments to match the order in
 185         which the codes are implemented.
 186         Remove all forward declarations of static functions.  Convert all
 187         function definitions to ISO C format.
 188         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 189         Return nothing.
 190         (print_insn_thumb16): Remove unused case 'I'.
 191         (print_insn): Update for changed calling convention of subroutines.
 192
 193 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 194
 195         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 196         hex (but retain it being displayed as signed). Remove redundant
 197         checks. Add handling of displacements for 16-bit addressing in Intel
 198         mode.
 199
 200 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 201
 202         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 203         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 204         masking of 'rm' in 16-bit memory address handling.
 205
 206 2005-05-19  Anton Blanchard  <anton@samba.org>
 207
 208         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 209         (print_ppc_disassembler_options): Document it.
 210         * ppc-opc.c (SVC_LEV): Define.
 211         (LEV): Allow optional operand.
 212         (POWER5): Define.
 213         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 214         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 215
 216 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 217
 218         * Makefile.in:  Regenerate.
 219
 220 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 221
 222         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 223         instructions.  Adjust disassembly of some opcodes to match
 224         unified syntax.
 225         (thumb32_opcodes): New table.
 226         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 227         two-halfword branches here.
 228         (print_insn_thumb32): New function.
 229         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 230         and print_insn_thumb32.  Be consistent about order of
 231         halfwords when printing 32-bit instructions.
 232
 233 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 234
 235         PR 843
 236         * i386-dis.c (branch_v_mode): New.
 237         (indirEv): Use branch_v_mode instead of v_mode.
 238         (OP_E): Handle branch_v_mode.
 239
 240 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 241
 242         * d10v-dis.c (dis_2_short): Support 64bit host.
 243
 244 2005-05-07  Nick Clifton  <nickc@redhat.com>
 245
 246         * po/nl.po: Updated translation.
 247
 248 2005-05-07  Nick Clifton  <nickc@redhat.com>
 249
 250         * Update the address and phone number of the FSF organization in
 251         the GPL notices in the following files:
 252         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 253         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 254         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 255         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 256         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 257         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 258         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 259         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 260         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 261         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 262         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 263         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 264         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 265         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 266         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 267         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 268         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 269         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 270         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 271         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 272         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 273         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 274         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 275         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 276         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 277         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 278         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 279         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 280         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 281         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 282         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 283         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 284         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 285
 286 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 287
 288         * ia64-opc.c: Include sysdep.h before libiberty.h.
 289
 290 2005-05-05  Nick Clifton  <nickc@redhat.com>
 291
 292         * configure.in (ALL_LINGUAS): Add vi.
 293         * configure: Regenerate.
 294         * po/vi.po: New.
 295
 296 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 297
 298         * configure.in: Fix the check for basename declaration.
 299         * configure: Regenerate.
 300
 301 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 302
 303         * ppc-opc.c (RTO): Define.
 304         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 305         entries to suit PPC440.
 306
 307 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 308
 309         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 310         Add xcrypt-ctr.
 311
 312 2005-04-14  Nick Clifton  <nickc@redhat.com>
 313
 314         * po/fi.po: New translation: Finnish.
 315         * configure.in (ALL_LINGUAS): Add fi.
 316         * configure: Regenerate.
 317
 318 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 319
 320         * Makefile.am (NO_WERROR): Define.
 321         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 322         * Makefile.in: Regenerate.
 323         * aclocal.m4: Regenerate.
 324         * configure: Regenerate.
 325
 326 2005-04-04  Nick Clifton  <nickc@redhat.com>
 327
 328         * fr30-asm.c: Regenerate.
 329         * frv-asm.c: Regenerate.
 330         * iq2000-asm.c: Regenerate.
 331         * m32r-asm.c: Regenerate.
 332         * openrisc-asm.c: Regenerate.
 333
 334 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 335
 336         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 337         visible operands in Intel mode. The first operand of monitor is
 338         %rax in 64-bit mode.
 339
 340 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 341
 342         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 343         easier future additions.
 344
 345 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 346
 347         * configure.in: Check for basename.
 348         * configure: Regenerate.
 349         * config.in: Ditto.
 350
 351 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 352
 353         * i386-dis.c (SEG_Fixup): New.
 354         (Sv): New.
 355         (dis386): Use "Sv" for 0x8c and 0x8e.
 356
 357 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 358             Nick Clifton  <nickc@redhat.com>
 359
 360         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 361         function entry mask addresses.
 362         (entry_addr_occupied_slots): New variable: The number of occupied
 363         elements in entry_addr.
 364         (entry_addr_total_slots): New variable: The total number of
 365         elements in entry_addr.
 366         (parse_disassembler_options): New function.  Fills in the entry_addr
 367         array.
 368         (free_entry_array): New function.  Release the memory used by the
 369         entry addr array.  Suppressed because there is no way to call it.
 370         (is_function_entry): Check if a given address is a function's
 371         start address by looking at supplied entry mask addresses and
 372         symbol information, if available.
 373         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 374
 375 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 376
 377         * cris-dis.c (print_with_operands): Use ~31L for long instead
 378         of ~31.
 379
 380 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 381
 382         * mmix-opc.c (O): Revert the last change.
 383         (Z): Likewise.
 384
 385 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 386
 387         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 388         (Z): Likewise.
 389
 390 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 391
 392         * mmix-opc.c (O, Z): Force expression as unsigned long.
 393
 394 2005-03-18  Nick Clifton  <nickc@redhat.com>
 395
 396         * ip2k-asm.c: Regenerate.
 397         * op/opcodes.pot: Regenerate.
 398
 399 2005-03-16  Nick Clifton  <nickc@redhat.com>
 400             Ben Elliston  <bje@au.ibm.com>
 401
 402         * configure.in (werror): New switch: Add -Werror to the
 403         compiler command line.  Enabled by default.  Disable via
 404         --disable-werror.
 405         * configure: Regenerate.
 406
 407 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 408
 409         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 410         BOOKE.
 411
 412 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 413
 414         * po/es.po: Commit new Spanish translation.
 415
 416         * po/fr.po: Commit new French translation.
 417
 418 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 419
 420         * vax-dis.c: Fix spelling error
 421         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 422         of just "Entry mask: < r1 ... >"
 423
 424 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 425
 426         * arm-dis.c (arm_opcodes): Document %E and %V.
 427         Add entries for v6T2 ARM instructions:
 428         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 429         (print_insn_arm): Add support for %E and %V.
 430         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 431
 432 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 433             Alan Modra  <amodra@bigpond.net.au>
 434
 435         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 436         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 437         (SPRG_MASK): Delete.
 438         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 439         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 440         mfsprg4..7 after msprg and consolidate.
 441
 442 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 443
 444         * vax-dis.c (entry_mask_bit): New array.
 445         (print_insn_vax): Decode function entry mask.
 446
 447 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 448
 449         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 450
 451 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 452
 453         * po/opcodes.pot: Regenerate.
 454
 455 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 456
 457         * arc-dis.c (a4_decoding_class): New enum.
 458         (dsmOneArcInst): Use the enum values for the decoding class.
 459         Remove redundant case in the switch for decodingClass value 11.
 460
 461 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 462
 463         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 464         accesses.
 465         (OP_C): Consider lock prefix in non-64-bit modes.
 466
 467 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 468
 469         * cris-dis.c (format_hex): Remove ineffective warning fix.
 470         * crx-dis.c (make_instruction): Warning fix.
 471         * frv-asm.c: Regenerate.
 472
 473 2005-02-23  Nick Clifton  <nickc@redhat.com>
 474
 475         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 476         read_memory.
 477
 478         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 479
 480         * crx-dis.c (make_instruction): Move argument structure into inner
 481         scope and ensure that all of its fields are initialised before
 482         they are used.
 483
 484         * fr30-asm.c: Regenerate.
 485         * fr30-dis.c: Regenerate.
 486         * frv-asm.c: Regenerate.
 487         * frv-dis.c: Regenerate.
 488         * ip2k-asm.c: Regenerate.
 489         * ip2k-dis.c: Regenerate.
 490         * iq2000-asm.c: Regenerate.
 491         * iq2000-dis.c: Regenerate.
 492         * m32r-asm.c: Regenerate.
 493         * m32r-dis.c: Regenerate.
 494         * openrisc-asm.c: Regenerate.
 495         * openrisc-dis.c: Regenerate.
 496         * xstormy16-asm.c: Regenerate.
 497         * xstormy16-dis.c: Regenerate.
 498
 499 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 500
 501         * arc-ext.c: Warning fixes.
 502         * arc-ext.h: Likewise.
 503         * cgen-opc.c: Likewise.
 504         * ia64-gen.c: Likewise.
 505         * maxq-dis.c: Likewise.
 506         * ns32k-dis.c: Likewise.
 507         * w65-dis.c: Likewise.
 508         * ia64-asmtab.c: Regenerate.
 509
 510 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 511
 512         * fr30-desc.c: Regenerate.
 513         * fr30-desc.h: Regenerate.
 514         * fr30-opc.c: Regenerate.
 515         * fr30-opc.h: Regenerate.
 516         * frv-desc.c: Regenerate.
 517         * frv-desc.h: Regenerate.
 518         * frv-opc.c: Regenerate.
 519         * frv-opc.h: Regenerate.
 520         * ip2k-desc.c: Regenerate.
 521         * ip2k-desc.h: Regenerate.
 522         * ip2k-opc.c: Regenerate.
 523         * ip2k-opc.h: Regenerate.
 524         * iq2000-desc.c: Regenerate.
 525         * iq2000-desc.h: Regenerate.
 526         * iq2000-opc.c: Regenerate.
 527         * iq2000-opc.h: Regenerate.
 528         * m32r-desc.c: Regenerate.
 529         * m32r-desc.h: Regenerate.
 530         * m32r-opc.c: Regenerate.
 531         * m32r-opc.h: Regenerate.
 532         * m32r-opinst.c: Regenerate.
 533         * openrisc-desc.c: Regenerate.
 534         * openrisc-desc.h: Regenerate.
 535         * openrisc-opc.c: Regenerate.
 536         * openrisc-opc.h: Regenerate.
 537         * xstormy16-desc.c: Regenerate.
 538         * xstormy16-desc.h: Regenerate.
 539         * xstormy16-opc.c: Regenerate.
 540         * xstormy16-opc.h: Regenerate.
 541
 542 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 543
 544         * Makefile.am: Run "make dep-am"
 545         * Makefile.in: Regenerate.
 546
 547 2005-02-15  Nick Clifton  <nickc@redhat.com>
 548
 549         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 550         compile time warnings.
 551         (print_keyword): Likewise.
 552         (default_print_insn): Likewise.
 553
 554         * fr30-desc.c: Regenerated.
 555         * fr30-desc.h: Regenerated.
 556         * fr30-dis.c: Regenerated.
 557         * fr30-opc.c: Regenerated.
 558         * fr30-opc.h: Regenerated.
 559         * frv-desc.c: Regenerated.
 560         * frv-dis.c: Regenerated.
 561         * frv-opc.c: Regenerated.
 562         * ip2k-asm.c: Regenerated.
 563         * ip2k-desc.c: Regenerated.
 564         * ip2k-desc.h: Regenerated.
 565         * ip2k-dis.c: Regenerated.
 566         * ip2k-opc.c: Regenerated.
 567         * ip2k-opc.h: Regenerated.
 568         * iq2000-desc.c: Regenerated.
 569         * iq2000-dis.c: Regenerated.
 570         * iq2000-opc.c: Regenerated.
 571         * m32r-asm.c: Regenerated.
 572         * m32r-desc.c: Regenerated.
 573         * m32r-desc.h: Regenerated.
 574         * m32r-dis.c: Regenerated.
 575         * m32r-opc.c: Regenerated.
 576         * m32r-opc.h: Regenerated.
 577         * m32r-opinst.c: Regenerated.
 578         * openrisc-desc.c: Regenerated.
 579         * openrisc-desc.h: Regenerated.
 580         * openrisc-dis.c: Regenerated.
 581         * openrisc-opc.c: Regenerated.
 582         * openrisc-opc.h: Regenerated.
 583         * xstormy16-desc.c: Regenerated.
 584         * xstormy16-desc.h: Regenerated.
 585         * xstormy16-dis.c: Regenerated.
 586         * xstormy16-opc.c: Regenerated.
 587         * xstormy16-opc.h: Regenerated.
 588
 589 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 590
 591         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 592         address.
 593
 594 2005-02-11  Nick Clifton  <nickc@redhat.com>
 595
 596         * iq2000-asm.c: Regenerate.
 597
 598         * frv-dis.c: Regenerate.
 599
 600 2005-02-07  Jim Blandy  <jimb@redhat.com>
 601
 602         * Makefile.am (CGEN): Load guile.scm before calling the main
 603         application script.
 604         * Makefile.in: Regenerated.
 605         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 606         Simply pass the cgen-opc.scm path to ${cgen} as its first
 607         argument; ${cgen} itself now contains the '-s', or whatever is
 608         appropriate for the Scheme being used.
 609
 610 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 611
 612         * configure: Regenerate to track ../gettext.m4.
 613
 614 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 615
 616         * ia64-gen.c (NELEMS): Define.
 617         (shrink): Generate alias with missing second predicate register when
 618         opcode has two outputs and these are both predicates.
 619         * ia64-opc-i.c (FULL17): Define.
 620         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 621         here to generate output template.
 622         (TBITCM, TNATCM): Undefine after use.
 623         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 624         first input. Add ld16 aliases without ar.csd as second output. Add
 625         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 626         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 627         ar.ccv as third/fourth inputs. Consolidate through...
 628         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 629         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 630         * ia64-asmtab.c: Regenerate.
 631
 632 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 633
 634         * configure: Regenerate to track ../gettext.m4 change.
 635
 636 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 637
 638         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 639         * frv-asm.c: Rebuilt.
 640         * frv-desc.c: Rebuilt.
 641         * frv-desc.h: Rebuilt.
 642         * frv-dis.c: Rebuilt.
 643         * frv-ibld.c: Rebuilt.
 644         * frv-opc.c: Rebuilt.
 645         * frv-opc.h: Rebuilt.
 646
 647 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 648
 649         * configure: Regenerate, ../gettext.m4 was updated.
 650
 651 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 652
 653         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 654         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 655         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 656         * mips-dis.c: Ditto.
 657
 658 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 659
 660         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 661
 662 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 663
 664         * mips-dis.c (no_aliases): New disassembly option flag.
 665         (set_default_mips_dis_options): Init no_aliases to zero.
 666         (parse_mips_dis_option): Handle no-aliases option.
 667         (print_insn_mips): Ignore table entries that are aliases
 668         if no_aliases is set.
 669         (print_insn_mips16): Ditto.
 670         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 671         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 672         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 673         * mips16-opc.c (mips16_opcodes): Ditto.
 674
 675 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 676
 677         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 678         (inheritance diagram): Add missing edge.
 679         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 680         easier for the testsuite.
 681         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 682         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 683         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 684         arch_sh2a_or_sh4_up child.
 685         (sh_table): Do renaming as above.
 686         Correct comment for ldc.l for gas testsuite to read.
 687         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 688         Correct comments for movy.w and movy.l for gas testsuite to read.
 689         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 690
 691 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 692
 693         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 694
 695 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 696
 697         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 698
 699 2005-01-10  Andreas Schwab  <schwab@suse.de>
 700
 701         * disassemble.c (disassemble_init_for_target) <case
 702         bfd_arch_ia64>: Set skip_zeroes to 16.
 703         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 704
 705 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 706
 707         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 708
 709 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 710
 711         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 712         memory references. Convert avr_operand() to C90 formatting.
 713
 714 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 715
 716         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 717
 718 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 719
 720         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 721         (no_op_insn): Initialize array with instructions that have no
 722         operands.
 723         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 724
 725 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 726
 727         * arm-dis.c: Correct top-level comment.
 728
 729 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 730
 731         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 732         architecuture defining the insn.
 733         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 734         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 735         field.
 736         Also include opcode/arm.h.
 737         * Makefile.am (arm-dis.lo): Update dependency list.
 738         * Makefile.in: Regenerate.
 739
 740 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 741
 742         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 743         reflect the change to the short immediate syntax.
 744
 745 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 746
 747         * or32-opc.c (debug): Warning fix.
 748         * po/POTFILES.in: Regenerate.
 749
 750         * maxq-dis.c: Formatting.
 751         (print_insn): Warning fix.
 752
 753 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 754
 755         * arm-dis.c (WORD_ADDRESS): Define.
 756         (print_insn): Use it.  Correct big-endian end-of-section handling.
 757
 758 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 759             Vineet Sharma      <vineets@noida.hcltech.com>
 760
 761         * maxq-dis.c: New file.
 762         * disassemble.c (ARCH_maxq): Define.
 763         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 764         instructions..
 765         * configure.in: Add case for bfd_maxq_arch.
 766         * configure: Regenerate.
 767         * Makefile.am: Add support for maxq-dis.c
 768         * Makefile.in: Regenerate.
 769         * aclocal.m4: Regenerate.
 770
 771 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 772
 773         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 774         mode.
 775         * crx-dis.c: Likewise.
 776
 777 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 778
 779         Generally, handle CRISv32.
 780         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 781         (struct cris_disasm_data): New type.
 782         (format_reg, format_hex, cris_constraint, print_flags)
 783         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 784         callers changed.
 785         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 786         (print_insn_crisv32_without_register_prefix)
 787         (print_insn_crisv10_v32_with_register_prefix)
 788         (print_insn_crisv10_v32_without_register_prefix)
 789         (cris_parse_disassembler_options): New functions.
 790         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 791         parameter.  All callers changed.
 792         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 793         failure.
 794         (cris_constraint) <case 'Y', 'U'>: New cases.
 795         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 796         for constraint 'n'.
 797         (print_with_operands) <case 'Y'>: New case.
 798         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 799         <case 'N', 'Y', 'Q'>: New cases.
 800         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 801         (print_insn_cris_with_register_prefix)
 802         (print_insn_cris_without_register_prefix): Call
 803         cris_parse_disassembler_options.
 804         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 805         for CRISv32 and the size of immediate operands.  New v32-only
 806         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 807         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 808         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 809         Change brp to be v3..v10.
 810         (cris_support_regs): New vector.
 811         (cris_opcodes): Update head comment.  New format characters '[',
 812         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 813         Add new opcodes for v32 and adjust existing opcodes to accommodate
 814         differences to earlier variants.
 815         (cris_cond15s): New vector.
 816
 817 2004-11-04 Jan Beulich <jbeulich@novell.com>
 818
 819         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 820         (indirEb): Remove.
 821         (Mp): Use f_mode rather than none at all.
 822         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 823         replaces what previously was x_mode; x_mode now means 128-bit SSE
 824         operands.
 825         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 826         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 827         pinsrw's second operand is Edqw.
 828         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 829         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 830         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 831         mode when an operand size override is present or always suffixing.
 832         More instructions will need to be added to this group.
 833         (putop): Handle new macro chars 'C' (short/long suffix selector),
 834         'I' (Intel mode override for following macro char), and 'J' (for
 835         adding the 'l' prefix to far branches in AT&T mode). When an
 836         alternative was specified in the template, honor macro character when
 837         specified for Intel mode.
 838         (OP_E): Handle new *_mode values. Correct pointer specifications for
 839         memory operands. Consolidate output of index register.
 840         (OP_G): Handle new *_mode values.
 841         (OP_I): Handle const_1_mode.
 842         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 843         respective opcode prefix bits have been consumed.
 844         (OP_EM, OP_EX): Provide some default handling for generating pointer
 845         specifications.
 846
 847 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 848
 849         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 850         COP_INST macro.
 851
 852 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 853
 854         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 855         (getregliststring): Support HI/LO and user registers.
 856         * crx-opc.c (crx_instruction): Update data structure according to the
 857         rearrangement done in CRX opcode header file.
 858         (crx_regtab):  Likewise.
 859         (crx_optab):  Likewise.
 860         (crx_instruction): Reorder load/stor instructions, remove unsupported
 861         formats.
 862         support new Co-Processor instruction 'cpi'.
 863
 864 2004-10-27  Nick Clifton  <nickc@redhat.com>
 865
 866         * opcodes/iq2000-asm.c: Regenerate.
 867         * opcodes/iq2000-desc.c: Regenerate.
 868         * opcodes/iq2000-desc.h: Regenerate.
 869         * opcodes/iq2000-dis.c: Regenerate.
 870         * opcodes/iq2000-ibld.c: Regenerate.
 871         * opcodes/iq2000-opc.c: Regenerate.
 872         * opcodes/iq2000-opc.h: Regenerate.
 873
 874 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 875
 876         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 877         us4, us5 (respectively).
 878         Remove unsupported 'popa' instruction.
 879         Reverse operands order in store co-processor instructions.
 880
 881 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 882
 883         * Makefile.am: Run "make dep-am"
 884         * Makefile.in: Regenerate.
 885
 886 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 887
 888         * xtensa-dis.c: Use ISO C90 formatting.
 889
 890 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 891
 892         * ppc-opc.c: Revert 2004-09-09 change.
 893
 894 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 895
 896         * xtensa-dis.c (state_names): Delete.
 897         (fetch_data): Use xtensa_isa_maxlength.
 898         (print_xtensa_operand): Replace operand parameter with opcode/operand
 899         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 900         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 901         instruction bundles.  Use xmalloc instead of malloc.
 902
 903 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 904
 905         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 906         initializers.
 907
 908 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 909
 910         * crx-opc.c (crx_instruction): Support Co-processor insns.
 911         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 912         (getregliststring): Change function to use the above enum.
 913         (print_arg): Handle CO-Processor insns.
 914         (crx_cinvs): Add 'b' option to invalidate the branch-target
 915         cache.
 916
 917 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 918
 919         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 920         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 921         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 922         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 923         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 924
 925 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 926
 927         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 928         rather than add it.
 929
 930 2004-09-30  Paul Brook  <paul@codesourcery.com>
 931
 932         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 933         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 934
 935 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 936
 937         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 938         (CONFIG_STATUS_DEPENDENCIES): New.
 939         (Makefile): Removed.
 940         (config.status): Likewise.
 941         * Makefile.in: Regenerated.
 942
 943 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 944
 945         * Makefile.am: Run "make dep-am".
 946         * Makefile.in: Regenerate.
 947         * aclocal.m4: Regenerate.
 948         * configure: Regenerate.
 949         * po/POTFILES.in: Regenerate.
 950         * po/opcodes.pot: Regenerate.
 951
 952 2004-09-11  Andreas Schwab  <schwab@suse.de>
 953
 954         * configure: Rebuild.
 955
 956 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 957
 958         * ppc-opc.c (L): Make this field not optional.
 959
 960 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 961
 962         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 963         Fix parameter to 'm[t|f]csr' insns.
 964
 965 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 966
 967         * configure.in: Autoupdate to autoconf 2.59.
 968         * aclocal.m4: Rebuild with aclocal 1.4p6.
 969         * configure: Rebuild with autoconf 2.59.
 970         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 971         bfd changes for autoconf 2.59 on the way).
 972         * config.in: Rebuild with autoheader 2.59.
 973
 974 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 975
 976         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 977
 978 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 979
 980         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 981         (GRPPADLCK2): New define.
 982         (twobyte_has_modrm): True for 0xA6.
 983         (grps): GRPPADLCK2 for opcode 0xA6.
 984
 985 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 986
 987         Introduce SH2a support.
 988         * sh-opc.h (arch_sh2a_base): Renumber.
 989         (arch_sh2a_nofpu_base): Remove.
 990         (arch_sh_base_mask): Adjust.
 991         (arch_opann_mask): New.
 992         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 993         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 994         (sh_table): Adjust whitespace.
 995         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 996         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 997         instruction list throughout.
 998         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 999         of arch_sh2a in instruction list throughout.
1000         (arch_sh2e_up): Accomodate above changes.
1001         (arch_sh2_up): Ditto.
1002         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1003         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1004         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1005         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1006         * sh-opc.h (arch_sh2a_nofpu): New.
1007         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1008         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1009         instruction.
1010         2004-01-20  DJ Delorie  <dj@redhat.com>
1011         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1012         2003-12-29  DJ Delorie  <dj@redhat.com>
1013         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1014         sh_opcode_info, sh_table): Add sh2a support.
1015         (arch_op32): New, to tag 32-bit opcodes.
1016         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1017         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1018         * sh-opc.h (arch_sh2a): Add.
1019         * sh-dis.c (arch_sh2a): Handle.
1020         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1021
1022 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1023
1024         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1025
1026 2004-07-22  Nick Clifton  <nickc@redhat.com>
1027
1028         PR/280
1029         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1030         insns - this is done by objdump itself.
1031         * h8500-dis.c (print_insn_h8500): Likewise.
1032
1033 2004-07-21  Jan Beulich <jbeulich@novell.com>
1034
1035         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1036         regardless of address size prefix in effect.
1037         (ptr_reg): Size or address registers does not depend on rex64, but
1038         on the presence of an address size override.
1039         (OP_MMX): Use rex.x only for xmm registers.
1040         (OP_EM): Use rex.z only for xmm registers.
1041
1042 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1043
1044         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1045         move/branch operations to the bottom so that VR5400 multimedia
1046         instructions take precedence in disassembly.
1047
1048 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1049
1050         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1051         ISA-specific "break" encoding.
1052
1053 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1054
1055         * arm-opc.h: Fix typo in comment.
1056
1057 2004-07-11  Andreas Schwab  <schwab@suse.de>
1058
1059         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1060
1061 2004-07-09  Andreas Schwab  <schwab@suse.de>
1062
1063         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1064
1065 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1066
1067         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1068         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1069         (crx-dis.lo): New target.
1070         (crx-opc.lo): Likewise.
1071         * Makefile.in: Regenerate.
1072         * configure.in: Handle bfd_crx_arch.
1073         * configure: Regenerate.
1074         * crx-dis.c: New file.
1075         * crx-opc.c: New file.
1076         * disassemble.c (ARCH_crx): Define.
1077         (disassembler): Handle ARCH_crx.
1078
1079 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1080
1081         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1082         * ia64-asmtab.c: Regnerate.
1083
1084 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1085
1086         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1087         (extract_fxm): Don't test dialect.
1088         (XFXFXM_MASK): Include the power4 bit.
1089         (XFXM): Add p4 param.
1090         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1091
1092 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1093
1094         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1095         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1096
1097 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1098
1099         * ppc-opc.c (BH, XLBH_MASK): Define.
1100         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1101
1102 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1103
1104         * i386-dis.c (x_mode): Comment.
1105         (two_source_ops): File scope.
1106         (float_mem): Correct fisttpll and fistpll.
1107         (float_mem_mode): New table.
1108         (dofloat): Use it.
1109         (OP_E): Correct intel mode PTR output.
1110         (ptr_reg): Use open_char and close_char.
1111         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1112         operands.  Set two_source_ops.
1113
1114 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1115
1116         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1117         instead of _raw_size.
1118
1119 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1120
1121         * ia64-gen.c (in_iclass): Handle more postinc st
1122         and ld variants.
1123         * ia64-asmtab.c: Rebuilt.
1124
1125 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1126
1127         * s390-opc.txt: Correct architecture mask for some opcodes.
1128         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1129         in the esa mode as well.
1130
1131 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1132
1133         * sh-dis.c (target_arch): Make unsigned.
1134         (print_insn_sh): Replace (most of) switch with a call to
1135         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1136         * sh-opc.h: Redefine architecture flags values.
1137         Add sh3-nommu architecture.
1138         Reorganise <arch>_up macros so they make more visual sense.
1139         (SH_MERGE_ARCH_SET): Define new macro.
1140         (SH_VALID_BASE_ARCH_SET): Likewise.
1141         (SH_VALID_MMU_ARCH_SET): Likewise.
1142         (SH_VALID_CO_ARCH_SET): Likewise.
1143         (SH_VALID_ARCH_SET): Likewise.
1144         (SH_MERGE_ARCH_SET_VALID): Likewise.
1145         (SH_ARCH_SET_HAS_FPU): Likewise.
1146         (SH_ARCH_SET_HAS_DSP): Likewise.
1147         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1148         (sh_get_arch_from_bfd_mach): Add prototype.
1149         (sh_get_arch_up_from_bfd_mach): Likewise.
1150         (sh_get_bfd_mach_from_arch_set): Likewise.
1151         (sh_merge_bfd_arc): Likewise.
1152
1153 2004-05-24  Peter Barada  <peter@the-baradas.com>
1154
1155         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1156         into new match_insn_m68k function.  Loop over canidate
1157         matches and select first that completely matches.
1158         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1159         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1160         to verify addressing for MAC/EMAC.
1161         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1162         reigster halves since 'fpu' and 'spl' look misleading.
1163         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1164         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1165         first, tighten up match masks.
1166         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1167         'size' from special case code in print_insn_m68k to
1168         determine decode size of insns.
1169
1170 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1171
1172         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1173         well as when -mpower4.
1174
1175 2004-05-13  Nick Clifton  <nickc@redhat.com>
1176
1177         * po/fr.po: Updated French translation.
1178
1179 2004-05-05  Peter Barada  <peter@the-baradas.com>
1180
1181         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1182         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1183         * m68k-op.c: Switch from ColdFire chips to core variants.
1184
1185 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1186
1187         PR 147.
1188         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1189
1190 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1191
1192         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1193         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1194
1195 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1196
1197         * sh-dis.c (print_insn_sh): Print the value in constant pool
1198         as a symbol if it looks like a symbol.
1199
1200 2004-04-22  Peter Barada <peter@the-baradas.com>
1201
1202         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1203         appropriate ColdFire architectures.
1204         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1205         mask addressing.
1206         Add EMAC instructions, fix MAC instructions. Remove
1207         macmw/macml/msacmw/msacml instructions since mask addressing now
1208         supported.
1209
1210 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1211
1212         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1213         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1214         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1215         macro.  Adjust all users.
1216
1217 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1218
1219         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1220         separately.
1221
1222 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1223
1224         * m32r-asm.c: Regenerate.
1225
1226 2004-03-29  Stan Shebs  <shebs@apple.com>
1227
1228         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1229         used.
1230
1231 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1232
1233         * aclocal.m4: Regenerate.
1234         * config.in: Regenerate.
1235         * configure: Regenerate.
1236         * po/POTFILES.in: Regenerate.
1237         * po/opcodes.pot: Regenerate.
1238
1239 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1240
1241         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1242         PPC_OPERANDS_GPR_0.
1243         * ppc-opc.c (RA0): Define.
1244         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1245         (RAOPT): Rename from RAO.  Update all uses.
1246         (powerpc_opcodes): Use RA0 as appropriate.
1247
1248 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1249
1250         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1251
1252 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1253
1254         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1255
1256 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1257
1258         * i386-dis.c (GRPPLOCK): Delete.
1259         (grps): Delete GRPPLOCK entry.
1260
1261 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1262
1263         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1264         (M, Mp): Use OP_M.
1265         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1266         (GRPPADLCK): Define.
1267         (dis386): Use NOP_Fixup on "nop".
1268         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1269         (twobyte_has_modrm): Set for 0xa7.
1270         (padlock_table): Delete.  Move to..
1271         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1272         and clflush.
1273         (print_insn): Revert PADLOCK_SPECIAL code.
1274         (OP_E): Delete sfence, lfence, mfence checks.
1275
1276 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1277
1278         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1279         (INVLPG_Fixup): New function.
1280         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1281
1282 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1283
1284         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1285         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1286         (padlock_table): New struct with PadLock instructions.
1287         (print_insn): Handle PADLOCK_SPECIAL.
1288
1289 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1290
1291         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1292         (OP_E): Twiddle clflush to sfence here.
1293
1294 2004-03-08  Nick Clifton  <nickc@redhat.com>
1295
1296         * po/de.po: Updated German translation.
1297
1298 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1299
1300         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1301         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1302         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1303         accordingly.
1304
1305 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1306
1307         * frv-asm.c: Regenerate.
1308         * frv-desc.c: Regenerate.
1309         * frv-desc.h: Regenerate.
1310         * frv-dis.c: Regenerate.
1311         * frv-ibld.c: Regenerate.
1312         * frv-opc.c: Regenerate.
1313         * frv-opc.h: Regenerate.
1314
1315 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1316
1317         * frv-desc.c, frv-opc.c: Regenerate.
1318
1319 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1320
1321         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1322
1323 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1324
1325         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1326         Also correct mistake in the comment.
1327
1328 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1329
1330         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1331         ensure that double registers have even numbers.
1332         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1333         that reserved instruction 0xfffd does not decode the same
1334         as 0xfdfd (ftrv).
1335         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1336         REG_N refers to a double register.
1337         Add REG_N_B01 nibble type and use it instead of REG_NM
1338         in ftrv.
1339         Adjust the bit patterns in a few comments.
1340
1341 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1342
1343         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1344
1345 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1346
1347         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1348
1349 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1350
1351         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1352
1353 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1354
1355         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1356         mtivor32, mtivor33, mtivor34.
1357
1358 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1359
1360         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1361
1362 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1363
1364         * arm-opc.h Maverick accumulator register opcode fixes.
1365
1366 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1367
1368         * m32r-dis.c: Regenerate.
1369
1370 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1371
1372         * sh-opc.h (sh_table): "fsrra", not "fssra".
1373
1374 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1375
1376         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1377         contraints.
1378
1379 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1380
1381         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1382
1383 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1384
1385         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1386         1.  Don't print scale factor on AT&T mode when index missing.
1387
1388 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1389
1390         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1391         when loaded into XR registers.
1392
1393 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1394
1395         * frv-desc.h: Regenerate.
1396         * frv-desc.c: Regenerate.
1397         * frv-opc.c: Regenerate.
1398
1399 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1400
1401         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1402
1403 2004-01-09  Paul Brook  <paul@codesourcery.com>
1404
1405         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1406         specific opcodes.
1407
1408 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1409
1410         * Makefile.am (libopcodes_la_DEPENDENCIES)
1411         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1412         comment about the problem.
1413         * Makefile.in: Regenerate.
1414
1415 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1416
1417         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1418         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1419         cut&paste errors in shifting/truncating numerical operands.
1420         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1421         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1422         (parse_uslo16): Likewise.
1423         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1424         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1425         (parse_s12): Likewise.
1426         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1427         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1428         (parse_uslo16): Likewise.
1429         (parse_uhi16): Parse gothi and gotfuncdeschi.
1430         (parse_d12): Parse got12 and gotfuncdesc12.
1431         (parse_s12): Likewise.
1432
1433 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1434
1435         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1436         instruction which looks similar to an 'rla' instruction.
1437
1438 For older changes see ChangeLog-0203
1439 \f
1440 Local Variables:
1441 mode: change-log
1442 left-margin: 8
1443 fill-column: 74
1444 version-control: never
1445 End: