opcodes/ChangeLog

   1 2005-03-31  Jerome Guitton  <guitton@gnat.com>
   2
   3         * configure.in: Check for basename.
   4         * configure: Regenerate.
   5         * config.in: Ditto.
   6
   7 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
   8
   9         * i386-dis.c (SEG_Fixup): New.
  10         (Sv): New.
  11         (dis386): Use "Sv" for 0x8c and 0x8e.
  12
  13 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  14             Nick Clifton  <nickc@redhat.com>
  15
  16         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
  17         function entry mask addresses.
  18         (entry_addr_occupied_slots): New variable: The number of occupied
  19         elements in entry_addr.
  20         (entry_addr_total_slots): New variable: The total number of
  21         elements in entry_addr.
  22         (parse_disassembler_options): New function.  Fills in the entry_addr
  23         array.
  24         (free_entry_array): New function.  Release the memory used by the
  25         entry addr array.  Suppressed because there is no way to call it.
  26         (is_function_entry): Check if a given address is a function's
  27         start address by looking at supplied entry mask addresses and
  28         symbol information, if available.
  29         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
  30
  31 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
  32
  33         * cris-dis.c (print_with_operands): Use ~31L for long instead
  34         of ~31.
  35
  36 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
  37
  38         * mmix-opc.c (O): Revert the last change.
  39         (Z): Likewise.
  40
  41 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
  42
  43         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
  44         (Z): Likewise.
  45
  46 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
  47
  48         * mmix-opc.c (O, Z): Force expression as unsigned long.
  49
  50 2005-03-18  Nick Clifton  <nickc@redhat.com>
  51
  52         * ip2k-asm.c: Regenerate.
  53         * op/opcodes.pot: Regenerate.
  54
  55 2005-03-16  Nick Clifton  <nickc@redhat.com>
  56             Ben Elliston  <bje@au.ibm.com>
  57
  58         * configure.in (werror): New switch: Add -Werror to the
  59         compiler command line.  Enabled by default.  Disable via
  60         --disable-werror.
  61         * configure: Regenerate.
  62
  63 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
  64
  65         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
  66         BOOKE.
  67
  68 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
  69
  70         * po/es.po: Commit new Spanish translation.
  71
  72         * po/fr.po: Commit new French translation.
  73
  74 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  75
  76         * vax-dis.c: Fix spelling error
  77         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
  78         of just "Entry mask: < r1 ... >"
  79
  80 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
  81
  82         * arm-dis.c (arm_opcodes): Document %E and %V.
  83         Add entries for v6T2 ARM instructions:
  84         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
  85         (print_insn_arm): Add support for %E and %V.
  86         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
  87
  88 2005-03-10  Jeff Baker  <jbaker@qnx.com>
  89             Alan Modra  <amodra@bigpond.net.au>
  90
  91         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
  92         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
  93         (SPRG_MASK): Delete.
  94         (XSPRG_MASK): Mask off extra bits now part of sprg field.
  95         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
  96         mfsprg4..7 after msprg and consolidate.
  97
  98 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  99
 100         * vax-dis.c (entry_mask_bit): New array.
 101         (print_insn_vax): Decode function entry mask.
 102
 103 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 104
 105         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 106
 107 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 108
 109         * po/opcodes.pot: Regenerate.
 110
 111 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 112
 113         * arc-dis.c (a4_decoding_class): New enum.
 114         (dsmOneArcInst): Use the enum values for the decoding class.
 115         Remove redundant case in the switch for decodingClass value 11.
 116
 117 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 118
 119         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 120         accesses.
 121         (OP_C): Consider lock prefix in non-64-bit modes.
 122
 123 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 124
 125         * cris-dis.c (format_hex): Remove ineffective warning fix.
 126         * crx-dis.c (make_instruction): Warning fix.
 127         * frv-asm.c: Regenerate.
 128
 129 2005-02-23  Nick Clifton  <nickc@redhat.com>
 130
 131         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 132         read_memory.
 133
 134         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 135
 136         * crx-dis.c (make_instruction): Move argument structure into inner
 137         scope and ensure that all of its fields are initialised before
 138         they are used.
 139
 140         * fr30-asm.c: Regenerate.
 141         * fr30-dis.c: Regenerate.
 142         * frv-asm.c: Regenerate.
 143         * frv-dis.c: Regenerate.
 144         * ip2k-asm.c: Regenerate.
 145         * ip2k-dis.c: Regenerate.
 146         * iq2000-asm.c: Regenerate.
 147         * iq2000-dis.c: Regenerate.
 148         * m32r-asm.c: Regenerate.
 149         * m32r-dis.c: Regenerate.
 150         * openrisc-asm.c: Regenerate.
 151         * openrisc-dis.c: Regenerate.
 152         * xstormy16-asm.c: Regenerate.
 153         * xstormy16-dis.c: Regenerate.
 154
 155 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 156
 157         * arc-ext.c: Warning fixes.
 158         * arc-ext.h: Likewise.
 159         * cgen-opc.c: Likewise.
 160         * ia64-gen.c: Likewise.
 161         * maxq-dis.c: Likewise.
 162         * ns32k-dis.c: Likewise.
 163         * w65-dis.c: Likewise.
 164         * ia64-asmtab.c: Regenerate.
 165
 166 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 167
 168         * fr30-desc.c: Regenerate.
 169         * fr30-desc.h: Regenerate.
 170         * fr30-opc.c: Regenerate.
 171         * fr30-opc.h: Regenerate.
 172         * frv-desc.c: Regenerate.
 173         * frv-desc.h: Regenerate.
 174         * frv-opc.c: Regenerate.
 175         * frv-opc.h: Regenerate.
 176         * ip2k-desc.c: Regenerate.
 177         * ip2k-desc.h: Regenerate.
 178         * ip2k-opc.c: Regenerate.
 179         * ip2k-opc.h: Regenerate.
 180         * iq2000-desc.c: Regenerate.
 181         * iq2000-desc.h: Regenerate.
 182         * iq2000-opc.c: Regenerate.
 183         * iq2000-opc.h: Regenerate.
 184         * m32r-desc.c: Regenerate.
 185         * m32r-desc.h: Regenerate.
 186         * m32r-opc.c: Regenerate.
 187         * m32r-opc.h: Regenerate.
 188         * m32r-opinst.c: Regenerate.
 189         * openrisc-desc.c: Regenerate.
 190         * openrisc-desc.h: Regenerate.
 191         * openrisc-opc.c: Regenerate.
 192         * openrisc-opc.h: Regenerate.
 193         * xstormy16-desc.c: Regenerate.
 194         * xstormy16-desc.h: Regenerate.
 195         * xstormy16-opc.c: Regenerate.
 196         * xstormy16-opc.h: Regenerate.
 197
 198 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 199
 200         * Makefile.am: Run "make dep-am"
 201         * Makefile.in: Regenerate.
 202
 203 2005-02-15  Nick Clifton  <nickc@redhat.com>
 204
 205         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 206         compile time warnings.
 207         (print_keyword): Likewise.
 208         (default_print_insn): Likewise.
 209
 210         * fr30-desc.c: Regenerated.
 211         * fr30-desc.h: Regenerated.
 212         * fr30-dis.c: Regenerated.
 213         * fr30-opc.c: Regenerated.
 214         * fr30-opc.h: Regenerated.
 215         * frv-desc.c: Regenerated.
 216         * frv-dis.c: Regenerated.
 217         * frv-opc.c: Regenerated.
 218         * ip2k-asm.c: Regenerated.
 219         * ip2k-desc.c: Regenerated.
 220         * ip2k-desc.h: Regenerated.
 221         * ip2k-dis.c: Regenerated.
 222         * ip2k-opc.c: Regenerated.
 223         * ip2k-opc.h: Regenerated.
 224         * iq2000-desc.c: Regenerated.
 225         * iq2000-dis.c: Regenerated.
 226         * iq2000-opc.c: Regenerated.
 227         * m32r-asm.c: Regenerated.
 228         * m32r-desc.c: Regenerated.
 229         * m32r-desc.h: Regenerated.
 230         * m32r-dis.c: Regenerated.
 231         * m32r-opc.c: Regenerated.
 232         * m32r-opc.h: Regenerated.
 233         * m32r-opinst.c: Regenerated.
 234         * openrisc-desc.c: Regenerated.
 235         * openrisc-desc.h: Regenerated.
 236         * openrisc-dis.c: Regenerated.
 237         * openrisc-opc.c: Regenerated.
 238         * openrisc-opc.h: Regenerated.
 239         * xstormy16-desc.c: Regenerated.
 240         * xstormy16-desc.h: Regenerated.
 241         * xstormy16-dis.c: Regenerated.
 242         * xstormy16-opc.c: Regenerated.
 243         * xstormy16-opc.h: Regenerated.
 244
 245 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 246
 247         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 248         address.
 249
 250 2005-02-11  Nick Clifton  <nickc@redhat.com>
 251
 252         * iq2000-asm.c: Regenerate.
 253
 254         * frv-dis.c: Regenerate.
 255
 256 2005-02-07  Jim Blandy  <jimb@redhat.com>
 257
 258         * Makefile.am (CGEN): Load guile.scm before calling the main
 259         application script.
 260         * Makefile.in: Regenerated.
 261         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 262         Simply pass the cgen-opc.scm path to ${cgen} as its first
 263         argument; ${cgen} itself now contains the '-s', or whatever is
 264         appropriate for the Scheme being used.
 265
 266 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 267
 268         * configure: Regenerate to track ../gettext.m4.
 269
 270 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 271
 272         * ia64-gen.c (NELEMS): Define.
 273         (shrink): Generate alias with missing second predicate register when
 274         opcode has two outputs and these are both predicates.
 275         * ia64-opc-i.c (FULL17): Define.
 276         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 277         here to generate output template.
 278         (TBITCM, TNATCM): Undefine after use.
 279         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 280         first input. Add ld16 aliases without ar.csd as second output. Add
 281         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 282         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 283         ar.ccv as third/fourth inputs. Consolidate through...
 284         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 285         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 286         * ia64-asmtab.c: Regenerate.
 287
 288 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 289
 290         * configure: Regenerate to track ../gettext.m4 change.
 291
 292 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 293
 294         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 295         * frv-asm.c: Rebuilt.
 296         * frv-desc.c: Rebuilt.
 297         * frv-desc.h: Rebuilt.
 298         * frv-dis.c: Rebuilt.
 299         * frv-ibld.c: Rebuilt.
 300         * frv-opc.c: Rebuilt.
 301         * frv-opc.h: Rebuilt.
 302
 303 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 304
 305         * configure: Regenerate, ../gettext.m4 was updated.
 306
 307 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 308
 309         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 310         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 311         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 312         * mips-dis.c: Ditto.
 313
 314 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 315
 316         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 317
 318 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 319
 320         * mips-dis.c (no_aliases): New disassembly option flag.
 321         (set_default_mips_dis_options): Init no_aliases to zero.
 322         (parse_mips_dis_option): Handle no-aliases option.
 323         (print_insn_mips): Ignore table entries that are aliases
 324         if no_aliases is set.
 325         (print_insn_mips16): Ditto.
 326         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 327         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 328         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 329         * mips16-opc.c (mips16_opcodes): Ditto.
 330
 331 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 332
 333         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 334         (inheritance diagram): Add missing edge.
 335         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 336         easier for the testsuite.
 337         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 338         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 339         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 340         arch_sh2a_or_sh4_up child.
 341         (sh_table): Do renaming as above.
 342         Correct comment for ldc.l for gas testsuite to read.
 343         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 344         Correct comments for movy.w and movy.l for gas testsuite to read.
 345         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 346
 347 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 348
 349         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 350
 351 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 352
 353         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 354
 355 2005-01-10  Andreas Schwab  <schwab@suse.de>
 356
 357         * disassemble.c (disassemble_init_for_target) <case
 358         bfd_arch_ia64>: Set skip_zeroes to 16.
 359         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 360
 361 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 362
 363         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 364
 365 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 366
 367         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 368         memory references. Convert avr_operand() to C90 formatting.
 369
 370 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 371
 372         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 373
 374 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 375
 376         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 377         (no_op_insn): Initialize array with instructions that have no
 378         operands.
 379         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 380
 381 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 382
 383         * arm-dis.c: Correct top-level comment.
 384
 385 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 386
 387         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 388         architecuture defining the insn.
 389         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 390         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 391         field.
 392         Also include opcode/arm.h.
 393         * Makefile.am (arm-dis.lo): Update dependency list.
 394         * Makefile.in: Regenerate.
 395
 396 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 397
 398         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 399         reflect the change to the short immediate syntax.
 400
 401 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 402
 403         * or32-opc.c (debug): Warning fix.
 404         * po/POTFILES.in: Regenerate.
 405
 406         * maxq-dis.c: Formatting.
 407         (print_insn): Warning fix.
 408
 409 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 410
 411         * arm-dis.c (WORD_ADDRESS): Define.
 412         (print_insn): Use it.  Correct big-endian end-of-section handling.
 413
 414 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 415             Vineet Sharma      <vineets@noida.hcltech.com>
 416
 417         * maxq-dis.c: New file.
 418         * disassemble.c (ARCH_maxq): Define.
 419         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 420         instructions..
 421         * configure.in: Add case for bfd_maxq_arch.
 422         * configure: Regenerate.
 423         * Makefile.am: Add support for maxq-dis.c
 424         * Makefile.in: Regenerate.
 425         * aclocal.m4: Regenerate.
 426
 427 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 428
 429         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 430         mode.
 431         * crx-dis.c: Likewise.
 432
 433 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 434
 435         Generally, handle CRISv32.
 436         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 437         (struct cris_disasm_data): New type.
 438         (format_reg, format_hex, cris_constraint, print_flags)
 439         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 440         callers changed.
 441         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 442         (print_insn_crisv32_without_register_prefix)
 443         (print_insn_crisv10_v32_with_register_prefix)
 444         (print_insn_crisv10_v32_without_register_prefix)
 445         (cris_parse_disassembler_options): New functions.
 446         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 447         parameter.  All callers changed.
 448         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 449         failure.
 450         (cris_constraint) <case 'Y', 'U'>: New cases.
 451         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 452         for constraint 'n'.
 453         (print_with_operands) <case 'Y'>: New case.
 454         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 455         <case 'N', 'Y', 'Q'>: New cases.
 456         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 457         (print_insn_cris_with_register_prefix)
 458         (print_insn_cris_without_register_prefix): Call
 459         cris_parse_disassembler_options.
 460         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 461         for CRISv32 and the size of immediate operands.  New v32-only
 462         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 463         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 464         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 465         Change brp to be v3..v10.
 466         (cris_support_regs): New vector.
 467         (cris_opcodes): Update head comment.  New format characters '[',
 468         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 469         Add new opcodes for v32 and adjust existing opcodes to accommodate
 470         differences to earlier variants.
 471         (cris_cond15s): New vector.
 472
 473 2004-11-04 Jan Beulich <jbeulich@novell.com>
 474
 475         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 476         (indirEb): Remove.
 477         (Mp): Use f_mode rather than none at all.
 478         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 479         replaces what previously was x_mode; x_mode now means 128-bit SSE
 480         operands.
 481         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 482         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 483         pinsrw's second operand is Edqw.
 484         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 485         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 486         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 487         mode when an operand size override is present or always suffixing.
 488         More instructions will need to be added to this group.
 489         (putop): Handle new macro chars 'C' (short/long suffix selector),
 490         'I' (Intel mode override for following macro char), and 'J' (for
 491         adding the 'l' prefix to far branches in AT&T mode). When an
 492         alternative was specified in the template, honor macro character when
 493         specified for Intel mode.
 494         (OP_E): Handle new *_mode values. Correct pointer specifications for
 495         memory operands. Consolidate output of index register.
 496         (OP_G): Handle new *_mode values.
 497         (OP_I): Handle const_1_mode.
 498         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 499         respective opcode prefix bits have been consumed.
 500         (OP_EM, OP_EX): Provide some default handling for generating pointer
 501         specifications.
 502
 503 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 504
 505         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 506         COP_INST macro.
 507
 508 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 509
 510         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 511         (getregliststring): Support HI/LO and user registers.
 512         * crx-opc.c (crx_instruction): Update data structure according to the
 513         rearrangement done in CRX opcode header file.
 514         (crx_regtab):  Likewise.
 515         (crx_optab):  Likewise.
 516         (crx_instruction): Reorder load/stor instructions, remove unsupported
 517         formats.
 518         support new Co-Processor instruction 'cpi'.
 519
 520 2004-10-27  Nick Clifton  <nickc@redhat.com>
 521
 522         * opcodes/iq2000-asm.c: Regenerate.
 523         * opcodes/iq2000-desc.c: Regenerate.
 524         * opcodes/iq2000-desc.h: Regenerate.
 525         * opcodes/iq2000-dis.c: Regenerate.
 526         * opcodes/iq2000-ibld.c: Regenerate.
 527         * opcodes/iq2000-opc.c: Regenerate.
 528         * opcodes/iq2000-opc.h: Regenerate.
 529
 530 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 531
 532         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 533         us4, us5 (respectively).
 534         Remove unsupported 'popa' instruction.
 535         Reverse operands order in store co-processor instructions.
 536
 537 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 538
 539         * Makefile.am: Run "make dep-am"
 540         * Makefile.in: Regenerate.
 541
 542 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 543
 544         * xtensa-dis.c: Use ISO C90 formatting.
 545
 546 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 547
 548         * ppc-opc.c: Revert 2004-09-09 change.
 549
 550 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 551
 552         * xtensa-dis.c (state_names): Delete.
 553         (fetch_data): Use xtensa_isa_maxlength.
 554         (print_xtensa_operand): Replace operand parameter with opcode/operand
 555         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 556         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 557         instruction bundles.  Use xmalloc instead of malloc.
 558
 559 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 560
 561         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 562         initializers.
 563
 564 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 565
 566         * crx-opc.c (crx_instruction): Support Co-processor insns.
 567         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 568         (getregliststring): Change function to use the above enum.
 569         (print_arg): Handle CO-Processor insns.
 570         (crx_cinvs): Add 'b' option to invalidate the branch-target
 571         cache.
 572
 573 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 574
 575         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 576         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 577         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 578         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 579         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 580
 581 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 582
 583         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 584         rather than add it.
 585
 586 2004-09-30  Paul Brook  <paul@codesourcery.com>
 587
 588         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 589         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 590
 591 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 592
 593         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 594         (CONFIG_STATUS_DEPENDENCIES): New.
 595         (Makefile): Removed.
 596         (config.status): Likewise.
 597         * Makefile.in: Regenerated.
 598
 599 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 600
 601         * Makefile.am: Run "make dep-am".
 602         * Makefile.in: Regenerate.
 603         * aclocal.m4: Regenerate.
 604         * configure: Regenerate.
 605         * po/POTFILES.in: Regenerate.
 606         * po/opcodes.pot: Regenerate.
 607
 608 2004-09-11  Andreas Schwab  <schwab@suse.de>
 609
 610         * configure: Rebuild.
 611
 612 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 613
 614         * ppc-opc.c (L): Make this field not optional.
 615
 616 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 617
 618         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 619         Fix parameter to 'm[t|f]csr' insns.
 620
 621 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 622
 623         * configure.in: Autoupdate to autoconf 2.59.
 624         * aclocal.m4: Rebuild with aclocal 1.4p6.
 625         * configure: Rebuild with autoconf 2.59.
 626         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 627         bfd changes for autoconf 2.59 on the way).
 628         * config.in: Rebuild with autoheader 2.59.
 629
 630 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 631
 632         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 633
 634 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 635
 636         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 637         (GRPPADLCK2): New define.
 638         (twobyte_has_modrm): True for 0xA6.
 639         (grps): GRPPADLCK2 for opcode 0xA6.
 640
 641 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 642
 643         Introduce SH2a support.
 644         * sh-opc.h (arch_sh2a_base): Renumber.
 645         (arch_sh2a_nofpu_base): Remove.
 646         (arch_sh_base_mask): Adjust.
 647         (arch_opann_mask): New.
 648         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 649         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 650         (sh_table): Adjust whitespace.
 651         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 652         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 653         instruction list throughout.
 654         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 655         of arch_sh2a in instruction list throughout.
 656         (arch_sh2e_up): Accomodate above changes.
 657         (arch_sh2_up): Ditto.
 658         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 659         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 660         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 661         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 662         * sh-opc.h (arch_sh2a_nofpu): New.
 663         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 664         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 665         instruction.
 666         2004-01-20  DJ Delorie  <dj@redhat.com>
 667         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 668         2003-12-29  DJ Delorie  <dj@redhat.com>
 669         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 670         sh_opcode_info, sh_table): Add sh2a support.
 671         (arch_op32): New, to tag 32-bit opcodes.
 672         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 673         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 674         * sh-opc.h (arch_sh2a): Add.
 675         * sh-dis.c (arch_sh2a): Handle.
 676         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 677
 678 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 679
 680         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 681
 682 2004-07-22  Nick Clifton  <nickc@redhat.com>
 683
 684         PR/280
 685         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 686         insns - this is done by objdump itself.
 687         * h8500-dis.c (print_insn_h8500): Likewise.
 688
 689 2004-07-21  Jan Beulich <jbeulich@novell.com>
 690
 691         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 692         regardless of address size prefix in effect.
 693         (ptr_reg): Size or address registers does not depend on rex64, but
 694         on the presence of an address size override.
 695         (OP_MMX): Use rex.x only for xmm registers.
 696         (OP_EM): Use rex.z only for xmm registers.
 697
 698 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 699
 700         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 701         move/branch operations to the bottom so that VR5400 multimedia
 702         instructions take precedence in disassembly.
 703
 704 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 705
 706         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 707         ISA-specific "break" encoding.
 708
 709 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 710
 711         * arm-opc.h: Fix typo in comment.
 712
 713 2004-07-11  Andreas Schwab  <schwab@suse.de>
 714
 715         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 716
 717 2004-07-09  Andreas Schwab  <schwab@suse.de>
 718
 719         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 720
 721 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 722
 723         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 724         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 725         (crx-dis.lo): New target.
 726         (crx-opc.lo): Likewise.
 727         * Makefile.in: Regenerate.
 728         * configure.in: Handle bfd_crx_arch.
 729         * configure: Regenerate.
 730         * crx-dis.c: New file.
 731         * crx-opc.c: New file.
 732         * disassemble.c (ARCH_crx): Define.
 733         (disassembler): Handle ARCH_crx.
 734
 735 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 736
 737         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 738         * ia64-asmtab.c: Regnerate.
 739
 740 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 741
 742         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 743         (extract_fxm): Don't test dialect.
 744         (XFXFXM_MASK): Include the power4 bit.
 745         (XFXM): Add p4 param.
 746         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 747
 748 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 749
 750         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 751         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 752
 753 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 754
 755         * ppc-opc.c (BH, XLBH_MASK): Define.
 756         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 757
 758 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 759
 760         * i386-dis.c (x_mode): Comment.
 761         (two_source_ops): File scope.
 762         (float_mem): Correct fisttpll and fistpll.
 763         (float_mem_mode): New table.
 764         (dofloat): Use it.
 765         (OP_E): Correct intel mode PTR output.
 766         (ptr_reg): Use open_char and close_char.
 767         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 768         operands.  Set two_source_ops.
 769
 770 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 771
 772         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 773         instead of _raw_size.
 774
 775 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 776
 777         * ia64-gen.c (in_iclass): Handle more postinc st
 778         and ld variants.
 779         * ia64-asmtab.c: Rebuilt.
 780
 781 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 782
 783         * s390-opc.txt: Correct architecture mask for some opcodes.
 784         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 785         in the esa mode as well.
 786
 787 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 788
 789         * sh-dis.c (target_arch): Make unsigned.
 790         (print_insn_sh): Replace (most of) switch with a call to
 791         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 792         * sh-opc.h: Redefine architecture flags values.
 793         Add sh3-nommu architecture.
 794         Reorganise <arch>_up macros so they make more visual sense.
 795         (SH_MERGE_ARCH_SET): Define new macro.
 796         (SH_VALID_BASE_ARCH_SET): Likewise.
 797         (SH_VALID_MMU_ARCH_SET): Likewise.
 798         (SH_VALID_CO_ARCH_SET): Likewise.
 799         (SH_VALID_ARCH_SET): Likewise.
 800         (SH_MERGE_ARCH_SET_VALID): Likewise.
 801         (SH_ARCH_SET_HAS_FPU): Likewise.
 802         (SH_ARCH_SET_HAS_DSP): Likewise.
 803         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 804         (sh_get_arch_from_bfd_mach): Add prototype.
 805         (sh_get_arch_up_from_bfd_mach): Likewise.
 806         (sh_get_bfd_mach_from_arch_set): Likewise.
 807         (sh_merge_bfd_arc): Likewise.
 808
 809 2004-05-24  Peter Barada  <peter@the-baradas.com>
 810
 811         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 812         into new match_insn_m68k function.  Loop over canidate
 813         matches and select first that completely matches.
 814         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 815         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 816         to verify addressing for MAC/EMAC.
 817         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 818         reigster halves since 'fpu' and 'spl' look misleading.
 819         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 820         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 821         first, tighten up match masks.
 822         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 823         'size' from special case code in print_insn_m68k to
 824         determine decode size of insns.
 825
 826 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 827
 828         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 829         well as when -mpower4.
 830
 831 2004-05-13  Nick Clifton  <nickc@redhat.com>
 832
 833         * po/fr.po: Updated French translation.
 834
 835 2004-05-05  Peter Barada  <peter@the-baradas.com>
 836
 837         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 838         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 839         * m68k-op.c: Switch from ColdFire chips to core variants.
 840
 841 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 842
 843         PR 147.
 844         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 845
 846 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 847
 848         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 849         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 850
 851 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 852
 853         * sh-dis.c (print_insn_sh): Print the value in constant pool
 854         as a symbol if it looks like a symbol.
 855
 856 2004-04-22  Peter Barada <peter@the-baradas.com>
 857
 858         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 859         appropriate ColdFire architectures.
 860         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 861         mask addressing.
 862         Add EMAC instructions, fix MAC instructions. Remove
 863         macmw/macml/msacmw/msacml instructions since mask addressing now
 864         supported.
 865
 866 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 867
 868         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 869         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 870         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 871         macro.  Adjust all users.
 872
 873 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 874
 875         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 876         separately.
 877
 878 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 879
 880         * m32r-asm.c: Regenerate.
 881
 882 2004-03-29  Stan Shebs  <shebs@apple.com>
 883
 884         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 885         used.
 886
 887 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 888
 889         * aclocal.m4: Regenerate.
 890         * config.in: Regenerate.
 891         * configure: Regenerate.
 892         * po/POTFILES.in: Regenerate.
 893         * po/opcodes.pot: Regenerate.
 894
 895 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 896
 897         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 898         PPC_OPERANDS_GPR_0.
 899         * ppc-opc.c (RA0): Define.
 900         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 901         (RAOPT): Rename from RAO.  Update all uses.
 902         (powerpc_opcodes): Use RA0 as appropriate.
 903
 904 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 905
 906         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 907
 908 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 909
 910         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 911
 912 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 913
 914         * i386-dis.c (GRPPLOCK): Delete.
 915         (grps): Delete GRPPLOCK entry.
 916
 917 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 918
 919         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 920         (M, Mp): Use OP_M.
 921         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 922         (GRPPADLCK): Define.
 923         (dis386): Use NOP_Fixup on "nop".
 924         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 925         (twobyte_has_modrm): Set for 0xa7.
 926         (padlock_table): Delete.  Move to..
 927         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 928         and clflush.
 929         (print_insn): Revert PADLOCK_SPECIAL code.
 930         (OP_E): Delete sfence, lfence, mfence checks.
 931
 932 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 933
 934         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 935         (INVLPG_Fixup): New function.
 936         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 937
 938 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 939
 940         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 941         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 942         (padlock_table): New struct with PadLock instructions.
 943         (print_insn): Handle PADLOCK_SPECIAL.
 944
 945 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 946
 947         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 948         (OP_E): Twiddle clflush to sfence here.
 949
 950 2004-03-08  Nick Clifton  <nickc@redhat.com>
 951
 952         * po/de.po: Updated German translation.
 953
 954 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 955
 956         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 957         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 958         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 959         accordingly.
 960
 961 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 962
 963         * frv-asm.c: Regenerate.
 964         * frv-desc.c: Regenerate.
 965         * frv-desc.h: Regenerate.
 966         * frv-dis.c: Regenerate.
 967         * frv-ibld.c: Regenerate.
 968         * frv-opc.c: Regenerate.
 969         * frv-opc.h: Regenerate.
 970
 971 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 972
 973         * frv-desc.c, frv-opc.c: Regenerate.
 974
 975 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 976
 977         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 978
 979 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 980
 981         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 982         Also correct mistake in the comment.
 983
 984 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 985
 986         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 987         ensure that double registers have even numbers.
 988         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 989         that reserved instruction 0xfffd does not decode the same
 990         as 0xfdfd (ftrv).
 991         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 992         REG_N refers to a double register.
 993         Add REG_N_B01 nibble type and use it instead of REG_NM
 994         in ftrv.
 995         Adjust the bit patterns in a few comments.
 996
 997 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 998
 999         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1000
1001 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1002
1003         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1004
1005 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1006
1007         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1008
1009 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1010
1011         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1012         mtivor32, mtivor33, mtivor34.
1013
1014 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1015
1016         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1017
1018 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1019
1020         * arm-opc.h Maverick accumulator register opcode fixes.
1021
1022 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1023
1024         * m32r-dis.c: Regenerate.
1025
1026 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1027
1028         * sh-opc.h (sh_table): "fsrra", not "fssra".
1029
1030 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1031
1032         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1033         contraints.
1034
1035 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1036
1037         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1038
1039 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1040
1041         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1042         1.  Don't print scale factor on AT&T mode when index missing.
1043
1044 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1045
1046         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1047         when loaded into XR registers.
1048
1049 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1050
1051         * frv-desc.h: Regenerate.
1052         * frv-desc.c: Regenerate.
1053         * frv-opc.c: Regenerate.
1054
1055 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1056
1057         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1058
1059 2004-01-09  Paul Brook  <paul@codesourcery.com>
1060
1061         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1062         specific opcodes.
1063
1064 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1065
1066         * Makefile.am (libopcodes_la_DEPENDENCIES)
1067         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1068         comment about the problem.
1069         * Makefile.in: Regenerate.
1070
1071 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1072
1073         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1074         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1075         cut&paste errors in shifting/truncating numerical operands.
1076         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1077         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1078         (parse_uslo16): Likewise.
1079         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1080         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1081         (parse_s12): Likewise.
1082         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1083         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1084         (parse_uslo16): Likewise.
1085         (parse_uhi16): Parse gothi and gotfuncdeschi.
1086         (parse_d12): Parse got12 and gotfuncdesc12.
1087         (parse_s12): Likewise.
1088
1089 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1090
1091         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1092         instruction which looks similar to an 'rla' instruction.
1093
1094 For older changes see ChangeLog-0203
1095 \f
1096 Local Variables:
1097 mode: change-log
1098 left-margin: 8
1099 fill-column: 74
1100 version-control: never
1101 End: