opcodes/ChangeLog

   1 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
   4         instead of _raw_size.
   5
   6 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
   7
   8         * ia64-gen.c (in_iclass): Handle more postinc st
   9         and ld variants.
  10         * ia64-asmtab.c: Rebuilt.
  11
  12 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  13
  14         * s390-opc.txt: Correct architecture mask for some opcodes.
  15         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
  16         in the esa mode as well.
  17
  18 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
  19
  20         * sh-dis.c (target_arch): Make unsigned.
  21         (print_insn_sh): Replace (most of) switch with a call to
  22         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
  23         * sh-opc.h: Redefine architecture flags values.
  24         Add sh3-nommu architecture.
  25         Reorganise <arch>_up macros so they make more visual sense.
  26         (SH_MERGE_ARCH_SET): Define new macro.
  27         (SH_VALID_BASE_ARCH_SET): Likewise.
  28         (SH_VALID_MMU_ARCH_SET): Likewise.
  29         (SH_VALID_CO_ARCH_SET): Likewise.
  30         (SH_VALID_ARCH_SET): Likewise.
  31         (SH_MERGE_ARCH_SET_VALID): Likewise.
  32         (SH_ARCH_SET_HAS_FPU): Likewise.
  33         (SH_ARCH_SET_HAS_DSP): Likewise.
  34         (SH_ARCH_UNKNOWN_ARCH): Likewise.
  35         (sh_get_arch_from_bfd_mach): Add prototype.
  36         (sh_get_arch_up_from_bfd_mach): Likewise.
  37         (sh_get_bfd_mach_from_arch_set): Likewise.
  38         (sh_merge_bfd_arc): Likewise.
  39
  40 2004-05-24  Peter Barada  <peter@the-baradas.com>
  41
  42         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
  43         into new match_insn_m68k function.  Loop over canidate
  44         matches and select first that completely matches.
  45         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
  46         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
  47         to verify addressing for MAC/EMAC.
  48         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
  49         reigster halves since 'fpu' and 'spl' look misleading.
  50         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
  51         * m68k-opc.c: Rearragne mac/emac cases to use longest for
  52         first, tighten up match masks.
  53         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
  54         'size' from special case code in print_insn_m68k to
  55         determine decode size of insns.
  56
  57 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
  58
  59         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
  60         well as when -mpower4.
  61
  62 2004-05-13  Nick Clifton  <nickc@redhat.com>
  63
  64         * po/fr.po: Updated French translation.
  65
  66 2004-05-05  Peter Barada  <peter@the-baradas.com>
  67
  68         * m68k-dis.c(print_insn_m68k): Add new chips, use core
  69         variants in arch_mask.  Only set m68881/68851 for 68k chips.
  70         * m68k-op.c: Switch from ColdFire chips to core variants.
  71
  72 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
  73
  74         PR 147.
  75         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
  76
  77 2004-04-29  Ben Elliston  <bje@au.ibm.com>
  78
  79         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
  80         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
  81
  82 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
  83
  84         * sh-dis.c (print_insn_sh): Print the value in constant pool
  85         as a symbol if it looks like a symbol.
  86
  87 2004-04-22  Peter Barada <peter@the-baradas.com>
  88
  89         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
  90         appropriate ColdFire architectures.
  91         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
  92         mask addressing.
  93         Add EMAC instructions, fix MAC instructions. Remove
  94         macmw/macml/msacmw/msacml instructions since mask addressing now
  95         supported.
  96
  97 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
  98
  99         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 100         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 101         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 102         macro.  Adjust all users.
 103
 104 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 105
 106         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 107         separately.
 108
 109 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 110
 111         * m32r-asm.c: Regenerate.
 112
 113 2004-03-29  Stan Shebs  <shebs@apple.com>
 114
 115         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 116         used.
 117
 118 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 119
 120         * aclocal.m4: Regenerate.
 121         * config.in: Regenerate.
 122         * configure: Regenerate.
 123         * po/POTFILES.in: Regenerate.
 124         * po/opcodes.pot: Regenerate.
 125
 126 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 127
 128         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 129         PPC_OPERANDS_GPR_0.
 130         * ppc-opc.c (RA0): Define.
 131         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 132         (RAOPT): Rename from RAO.  Update all uses.
 133         (powerpc_opcodes): Use RA0 as appropriate.
 134
 135 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 136
 137         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 138
 139 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 140
 141         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 142
 143 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 144
 145         * i386-dis.c (GRPPLOCK): Delete.
 146         (grps): Delete GRPPLOCK entry.
 147
 148 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 149
 150         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 151         (M, Mp): Use OP_M.
 152         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 153         (GRPPADLCK): Define.
 154         (dis386): Use NOP_Fixup on "nop".
 155         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 156         (twobyte_has_modrm): Set for 0xa7.
 157         (padlock_table): Delete.  Move to..
 158         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 159         and clflush.
 160         (print_insn): Revert PADLOCK_SPECIAL code.
 161         (OP_E): Delete sfence, lfence, mfence checks.
 162
 163 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 164
 165         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 166         (INVLPG_Fixup): New function.
 167         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 168
 169 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 170
 171         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 172         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 173         (padlock_table): New struct with PadLock instructions.
 174         (print_insn): Handle PADLOCK_SPECIAL.
 175
 176 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 177
 178         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 179         (OP_E): Twiddle clflush to sfence here.
 180
 181 2004-03-08  Nick Clifton  <nickc@redhat.com>
 182
 183         * po/de.po: Updated German translation.
 184
 185 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 186
 187         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 188         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 189         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 190         accordingly.
 191
 192 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 193
 194         * frv-asm.c: Regenerate.
 195         * frv-desc.c: Regenerate.
 196         * frv-desc.h: Regenerate.
 197         * frv-dis.c: Regenerate.
 198         * frv-ibld.c: Regenerate.
 199         * frv-opc.c: Regenerate.
 200         * frv-opc.h: Regenerate.
 201
 202 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 203
 204         * frv-desc.c, frv-opc.c: Regenerate.
 205
 206 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 207
 208         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 209
 210 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 211
 212         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 213         Also correct mistake in the comment.
 214
 215 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 216
 217         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 218         ensure that double registers have even numbers.
 219         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 220         that reserved instruction 0xfffd does not decode the same
 221         as 0xfdfd (ftrv).
 222         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 223         REG_N refers to a double register.
 224         Add REG_N_B01 nibble type and use it instead of REG_NM
 225         in ftrv.
 226         Adjust the bit patterns in a few comments.
 227
 228 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 229
 230         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 231
 232 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 233
 234         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 235
 236 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 237
 238         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 239
 240 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 241
 242         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 243         mtivor32, mtivor33, mtivor34.
 244
 245 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 246
 247         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 248
 249 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 250
 251         * arm-opc.h Maverick accumulator register opcode fixes.
 252
 253 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 254
 255         * m32r-dis.c: Regenerate.
 256
 257 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 258
 259         * sh-opc.h (sh_table): "fsrra", not "fssra".
 260
 261 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 262
 263         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 264         contraints.
 265
 266 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 267
 268         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 269
 270 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 271
 272         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 273         1.  Don't print scale factor on AT&T mode when index missing.
 274
 275 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 276
 277         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 278         when loaded into XR registers.
 279
 280 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 281
 282         * frv-desc.h: Regenerate.
 283         * frv-desc.c: Regenerate.
 284         * frv-opc.c: Regenerate.
 285
 286 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 287
 288         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 289
 290 2004-01-09  Paul Brook  <paul@codesourcery.com>
 291
 292         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 293         specific opcodes.
 294
 295 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 296
 297         * Makefile.am (libopcodes_la_DEPENDENCIES)
 298         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 299         comment about the problem.
 300         * Makefile.in: Regenerate.
 301
 302 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 303
 304         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 305         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 306         cut&paste errors in shifting/truncating numerical operands.
 307         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 308         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 309         (parse_uslo16): Likewise.
 310         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 311         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 312         (parse_s12): Likewise.
 313         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 314         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 315         (parse_uslo16): Likewise.
 316         (parse_uhi16): Parse gothi and gotfuncdeschi.
 317         (parse_d12): Parse got12 and gotfuncdesc12.
 318         (parse_s12): Likewise.
 319
 320 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 321
 322         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 323         instruction which looks similar to an 'rla' instruction.
 324
 325 For older changes see ChangeLog-0203
 326 \f
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