opcodes/ChangeLog

   1 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * arc-ext.c: Warning fixes.
   4         * arc-ext.h: Likewise.
   5         * cgen-opc.c: Likewise.
   6         * ia64-gen.c: Likewise.
   7         * maxq-dis.c: Likewise.
   8         * ns32k-dis.c: Likewise.
   9         * w65-dis.c: Likewise.
  10         * ia64-asmtab.c: Regenerate.
  11
  12 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
  13
  14         * fr30-desc.c: Regenerate.
  15         * fr30-desc.h: Regenerate.
  16         * fr30-opc.c: Regenerate.
  17         * fr30-opc.h: Regenerate.
  18         * frv-desc.c: Regenerate.
  19         * frv-desc.h: Regenerate.
  20         * frv-opc.c: Regenerate.
  21         * frv-opc.h: Regenerate.
  22         * ip2k-desc.c: Regenerate.
  23         * ip2k-desc.h: Regenerate.
  24         * ip2k-opc.c: Regenerate.
  25         * ip2k-opc.h: Regenerate.
  26         * iq2000-desc.c: Regenerate.
  27         * iq2000-desc.h: Regenerate.
  28         * iq2000-opc.c: Regenerate.
  29         * iq2000-opc.h: Regenerate.
  30         * m32r-desc.c: Regenerate.
  31         * m32r-desc.h: Regenerate.
  32         * m32r-opc.c: Regenerate.
  33         * m32r-opc.h: Regenerate.
  34         * m32r-opinst.c: Regenerate.
  35         * openrisc-desc.c: Regenerate.
  36         * openrisc-desc.h: Regenerate.
  37         * openrisc-opc.c: Regenerate.
  38         * openrisc-opc.h: Regenerate.
  39         * xstormy16-desc.c: Regenerate.
  40         * xstormy16-desc.h: Regenerate.
  41         * xstormy16-opc.c: Regenerate.
  42         * xstormy16-opc.h: Regenerate.
  43
  44 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
  45
  46         * Makefile.am: Run "make dep-am"
  47         * Makefile.in: Regenerate.
  48
  49 2005-02-15  Nick Clifton  <nickc@redhat.com>
  50
  51         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
  52         compile time warnings.
  53         (print_keyword): Likewise.
  54         (default_print_insn): Likewise.
  55
  56         * fr30-desc.c: Regenerated.
  57         * fr30-desc.h: Regenerated.
  58         * fr30-dis.c: Regenerated.
  59         * fr30-opc.c: Regenerated.
  60         * fr30-opc.h: Regenerated.
  61         * frv-desc.c: Regenerated.
  62         * frv-dis.c: Regenerated.
  63         * frv-opc.c: Regenerated.
  64         * ip2k-asm.c: Regenerated.
  65         * ip2k-desc.c: Regenerated.
  66         * ip2k-desc.h: Regenerated.
  67         * ip2k-dis.c: Regenerated.
  68         * ip2k-opc.c: Regenerated.
  69         * ip2k-opc.h: Regenerated.
  70         * iq2000-desc.c: Regenerated.
  71         * iq2000-dis.c: Regenerated.
  72         * iq2000-opc.c: Regenerated.
  73         * m32r-asm.c: Regenerated.
  74         * m32r-desc.c: Regenerated.
  75         * m32r-desc.h: Regenerated.
  76         * m32r-dis.c: Regenerated.
  77         * m32r-opc.c: Regenerated.
  78         * m32r-opc.h: Regenerated.
  79         * m32r-opinst.c: Regenerated.
  80         * openrisc-desc.c: Regenerated.
  81         * openrisc-desc.h: Regenerated.
  82         * openrisc-dis.c: Regenerated.
  83         * openrisc-opc.c: Regenerated.
  84         * openrisc-opc.h: Regenerated.
  85         * xstormy16-desc.c: Regenerated.
  86         * xstormy16-desc.h: Regenerated.
  87         * xstormy16-dis.c: Regenerated.
  88         * xstormy16-opc.c: Regenerated.
  89         * xstormy16-opc.h: Regenerated.
  90
  91 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
  92
  93         * dis-buf.c (perror_memory): Use sprintf_vma to print out
  94         address.
  95
  96 2005-02-11  Nick Clifton  <nickc@redhat.com>
  97
  98         * iq2000-asm.c: Regenerate.
  99
 100         * frv-dis.c: Regenerate.
 101
 102 2005-02-07  Jim Blandy  <jimb@redhat.com>
 103
 104         * Makefile.am (CGEN): Load guile.scm before calling the main
 105         application script.
 106         * Makefile.in: Regenerated.
 107         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 108         Simply pass the cgen-opc.scm path to ${cgen} as its first
 109         argument; ${cgen} itself now contains the '-s', or whatever is
 110         appropriate for the Scheme being used.
 111
 112 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 113
 114         * configure: Regenerate to track ../gettext.m4.
 115
 116 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 117
 118         * ia64-gen.c (NELEMS): Define.
 119         (shrink): Generate alias with missing second predicate register when
 120         opcode has two outputs and these are both predicates.
 121         * ia64-opc-i.c (FULL17): Define.
 122         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 123         here to generate output template.
 124         (TBITCM, TNATCM): Undefine after use.
 125         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 126         first input. Add ld16 aliases without ar.csd as second output. Add
 127         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 128         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 129         ar.ccv as third/fourth inputs. Consolidate through...
 130         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 131         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 132         * ia64-asmtab.c: Regenerate.
 133
 134 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 135
 136         * configure: Regenerate to track ../gettext.m4 change.
 137
 138 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 139
 140         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 141         * frv-asm.c: Rebuilt.
 142         * frv-desc.c: Rebuilt.
 143         * frv-desc.h: Rebuilt.
 144         * frv-dis.c: Rebuilt.
 145         * frv-ibld.c: Rebuilt.
 146         * frv-opc.c: Rebuilt.
 147         * frv-opc.h: Rebuilt.
 148
 149 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 150
 151         * configure: Regenerate, ../gettext.m4 was updated.
 152
 153 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 154
 155         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 156         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 157         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 158         * mips-dis.c: Ditto.
 159
 160 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 161
 162         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 163
 164 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 165
 166         * mips-dis.c (no_aliases): New disassembly option flag.
 167         (set_default_mips_dis_options): Init no_aliases to zero.
 168         (parse_mips_dis_option): Handle no-aliases option.
 169         (print_insn_mips): Ignore table entries that are aliases
 170         if no_aliases is set.
 171         (print_insn_mips16): Ditto.
 172         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 173         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 174         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 175         * mips16-opc.c (mips16_opcodes): Ditto.
 176
 177 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 178
 179         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 180         (inheritance diagram): Add missing edge.
 181         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 182         easier for the testsuite.
 183         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 184         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 185         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 186         arch_sh2a_or_sh4_up child.
 187         (sh_table): Do renaming as above.
 188         Correct comment for ldc.l for gas testsuite to read.
 189         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 190         Correct comments for movy.w and movy.l for gas testsuite to read.
 191         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 192
 193 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 194
 195         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 196
 197 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 198
 199         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 200
 201 2005-01-10  Andreas Schwab  <schwab@suse.de>
 202
 203         * disassemble.c (disassemble_init_for_target) <case
 204         bfd_arch_ia64>: Set skip_zeroes to 16.
 205         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 206
 207 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 208
 209         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 210
 211 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 212
 213         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 214         memory references. Convert avr_operand() to C90 formatting.
 215
 216 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 217
 218         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 219
 220 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 221
 222         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 223         (no_op_insn): Initialize array with instructions that have no
 224         operands.
 225         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 226
 227 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 228
 229         * arm-dis.c: Correct top-level comment.
 230
 231 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 232
 233         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 234         architecuture defining the insn.
 235         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 236         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 237         field.
 238         Also include opcode/arm.h.
 239         * Makefile.am (arm-dis.lo): Update dependency list.
 240         * Makefile.in: Regenerate.
 241
 242 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 243
 244         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 245         reflect the change to the short immediate syntax.
 246
 247 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 248
 249         * or32-opc.c (debug): Warning fix.
 250         * po/POTFILES.in: Regenerate.
 251
 252         * maxq-dis.c: Formatting.
 253         (print_insn): Warning fix.
 254
 255 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 256
 257         * arm-dis.c (WORD_ADDRESS): Define.
 258         (print_insn): Use it.  Correct big-endian end-of-section handling.
 259
 260 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 261             Vineet Sharma      <vineets@noida.hcltech.com>
 262
 263         * maxq-dis.c: New file.
 264         * disassemble.c (ARCH_maxq): Define.
 265         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 266         instructions..
 267         * configure.in: Add case for bfd_maxq_arch.
 268         * configure: Regenerate.
 269         * Makefile.am: Add support for maxq-dis.c
 270         * Makefile.in: Regenerate.
 271         * aclocal.m4: Regenerate.
 272
 273 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 274
 275         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 276         mode.
 277         * crx-dis.c: Likewise.
 278
 279 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 280
 281         Generally, handle CRISv32.
 282         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 283         (struct cris_disasm_data): New type.
 284         (format_reg, format_hex, cris_constraint, print_flags)
 285         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 286         callers changed.
 287         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 288         (print_insn_crisv32_without_register_prefix)
 289         (print_insn_crisv10_v32_with_register_prefix)
 290         (print_insn_crisv10_v32_without_register_prefix)
 291         (cris_parse_disassembler_options): New functions.
 292         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 293         parameter.  All callers changed.
 294         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 295         failure.
 296         (cris_constraint) <case 'Y', 'U'>: New cases.
 297         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 298         for constraint 'n'.
 299         (print_with_operands) <case 'Y'>: New case.
 300         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 301         <case 'N', 'Y', 'Q'>: New cases.
 302         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 303         (print_insn_cris_with_register_prefix)
 304         (print_insn_cris_without_register_prefix): Call
 305         cris_parse_disassembler_options.
 306         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 307         for CRISv32 and the size of immediate operands.  New v32-only
 308         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 309         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 310         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 311         Change brp to be v3..v10.
 312         (cris_support_regs): New vector.
 313         (cris_opcodes): Update head comment.  New format characters '[',
 314         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 315         Add new opcodes for v32 and adjust existing opcodes to accommodate
 316         differences to earlier variants.
 317         (cris_cond15s): New vector.
 318
 319 2004-11-04 Jan Beulich <jbeulich@novell.com>
 320
 321         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 322         (indirEb): Remove.
 323         (Mp): Use f_mode rather than none at all.
 324         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 325         replaces what previously was x_mode; x_mode now means 128-bit SSE
 326         operands.
 327         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 328         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 329         pinsrw's second operand is Edqw.
 330         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 331         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 332         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 333         mode when an operand size override is present or always suffixing.
 334         More instructions will need to be added to this group.
 335         (putop): Handle new macro chars 'C' (short/long suffix selector),
 336         'I' (Intel mode override for following macro char), and 'J' (for
 337         adding the 'l' prefix to far branches in AT&T mode). When an
 338         alternative was specified in the template, honor macro character when
 339         specified for Intel mode.
 340         (OP_E): Handle new *_mode values. Correct pointer specifications for
 341         memory operands. Consolidate output of index register.
 342         (OP_G): Handle new *_mode values.
 343         (OP_I): Handle const_1_mode.
 344         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 345         respective opcode prefix bits have been consumed.
 346         (OP_EM, OP_EX): Provide some default handling for generating pointer
 347         specifications.
 348
 349 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 350
 351         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 352         COP_INST macro.
 353
 354 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 355
 356         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 357         (getregliststring): Support HI/LO and user registers.
 358         * crx-opc.c (crx_instruction): Update data structure according to the
 359         rearrangement done in CRX opcode header file.
 360         (crx_regtab):  Likewise.
 361         (crx_optab):  Likewise.
 362         (crx_instruction): Reorder load/stor instructions, remove unsupported
 363         formats.
 364         support new Co-Processor instruction 'cpi'.
 365
 366 2004-10-27  Nick Clifton  <nickc@redhat.com>
 367
 368         * opcodes/iq2000-asm.c: Regenerate.
 369         * opcodes/iq2000-desc.c: Regenerate.
 370         * opcodes/iq2000-desc.h: Regenerate.
 371         * opcodes/iq2000-dis.c: Regenerate.
 372         * opcodes/iq2000-ibld.c: Regenerate.
 373         * opcodes/iq2000-opc.c: Regenerate.
 374         * opcodes/iq2000-opc.h: Regenerate.
 375
 376 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 377
 378         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 379         us4, us5 (respectively).
 380         Remove unsupported 'popa' instruction.
 381         Reverse operands order in store co-processor instructions.
 382
 383 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 384
 385         * Makefile.am: Run "make dep-am"
 386         * Makefile.in: Regenerate.
 387
 388 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 389
 390         * xtensa-dis.c: Use ISO C90 formatting.
 391
 392 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 393
 394         * ppc-opc.c: Revert 2004-09-09 change.
 395
 396 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 397
 398         * xtensa-dis.c (state_names): Delete.
 399         (fetch_data): Use xtensa_isa_maxlength.
 400         (print_xtensa_operand): Replace operand parameter with opcode/operand
 401         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 402         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 403         instruction bundles.  Use xmalloc instead of malloc.
 404
 405 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 406
 407         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 408         initializers.
 409
 410 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 411
 412         * crx-opc.c (crx_instruction): Support Co-processor insns.
 413         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 414         (getregliststring): Change function to use the above enum.
 415         (print_arg): Handle CO-Processor insns.
 416         (crx_cinvs): Add 'b' option to invalidate the branch-target
 417         cache.
 418
 419 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 420
 421         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 422         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 423         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 424         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 425         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 426
 427 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 428
 429         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 430         rather than add it.
 431
 432 2004-09-30  Paul Brook  <paul@codesourcery.com>
 433
 434         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 435         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 436
 437 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 438
 439         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 440         (CONFIG_STATUS_DEPENDENCIES): New.
 441         (Makefile): Removed.
 442         (config.status): Likewise.
 443         * Makefile.in: Regenerated.
 444
 445 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 446
 447         * Makefile.am: Run "make dep-am".
 448         * Makefile.in: Regenerate.
 449         * aclocal.m4: Regenerate.
 450         * configure: Regenerate.
 451         * po/POTFILES.in: Regenerate.
 452         * po/opcodes.pot: Regenerate.
 453
 454 2004-09-11  Andreas Schwab  <schwab@suse.de>
 455
 456         * configure: Rebuild.
 457
 458 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 459
 460         * ppc-opc.c (L): Make this field not optional.
 461
 462 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 463
 464         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 465         Fix parameter to 'm[t|f]csr' insns.
 466
 467 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 468
 469         * configure.in: Autoupdate to autoconf 2.59.
 470         * aclocal.m4: Rebuild with aclocal 1.4p6.
 471         * configure: Rebuild with autoconf 2.59.
 472         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 473         bfd changes for autoconf 2.59 on the way).
 474         * config.in: Rebuild with autoheader 2.59.
 475
 476 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 477
 478         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 479
 480 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 481
 482         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 483         (GRPPADLCK2): New define.
 484         (twobyte_has_modrm): True for 0xA6.
 485         (grps): GRPPADLCK2 for opcode 0xA6.
 486
 487 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 488
 489         Introduce SH2a support.
 490         * sh-opc.h (arch_sh2a_base): Renumber.
 491         (arch_sh2a_nofpu_base): Remove.
 492         (arch_sh_base_mask): Adjust.
 493         (arch_opann_mask): New.
 494         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 495         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 496         (sh_table): Adjust whitespace.
 497         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 498         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 499         instruction list throughout.
 500         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 501         of arch_sh2a in instruction list throughout.
 502         (arch_sh2e_up): Accomodate above changes.
 503         (arch_sh2_up): Ditto.
 504         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 505         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 506         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 507         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 508         * sh-opc.h (arch_sh2a_nofpu): New.
 509         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 510         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 511         instruction.
 512         2004-01-20  DJ Delorie  <dj@redhat.com>
 513         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 514         2003-12-29  DJ Delorie  <dj@redhat.com>
 515         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 516         sh_opcode_info, sh_table): Add sh2a support.
 517         (arch_op32): New, to tag 32-bit opcodes.
 518         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 519         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 520         * sh-opc.h (arch_sh2a): Add.
 521         * sh-dis.c (arch_sh2a): Handle.
 522         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 523
 524 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 525
 526         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 527
 528 2004-07-22  Nick Clifton  <nickc@redhat.com>
 529
 530         PR/280
 531         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 532         insns - this is done by objdump itself.
 533         * h8500-dis.c (print_insn_h8500): Likewise.
 534
 535 2004-07-21  Jan Beulich <jbeulich@novell.com>
 536
 537         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 538         regardless of address size prefix in effect.
 539         (ptr_reg): Size or address registers does not depend on rex64, but
 540         on the presence of an address size override.
 541         (OP_MMX): Use rex.x only for xmm registers.
 542         (OP_EM): Use rex.z only for xmm registers.
 543
 544 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 545
 546         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 547         move/branch operations to the bottom so that VR5400 multimedia
 548         instructions take precedence in disassembly.
 549
 550 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 551
 552         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 553         ISA-specific "break" encoding.
 554
 555 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 556
 557         * arm-opc.h: Fix typo in comment.
 558
 559 2004-07-11  Andreas Schwab  <schwab@suse.de>
 560
 561         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 562
 563 2004-07-09  Andreas Schwab  <schwab@suse.de>
 564
 565         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 566
 567 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 568
 569         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 570         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 571         (crx-dis.lo): New target.
 572         (crx-opc.lo): Likewise.
 573         * Makefile.in: Regenerate.
 574         * configure.in: Handle bfd_crx_arch.
 575         * configure: Regenerate.
 576         * crx-dis.c: New file.
 577         * crx-opc.c: New file.
 578         * disassemble.c (ARCH_crx): Define.
 579         (disassembler): Handle ARCH_crx.
 580
 581 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 582
 583         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 584         * ia64-asmtab.c: Regnerate.
 585
 586 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 587
 588         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 589         (extract_fxm): Don't test dialect.
 590         (XFXFXM_MASK): Include the power4 bit.
 591         (XFXM): Add p4 param.
 592         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 593
 594 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 595
 596         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 597         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 598
 599 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 600
 601         * ppc-opc.c (BH, XLBH_MASK): Define.
 602         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 603
 604 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 605
 606         * i386-dis.c (x_mode): Comment.
 607         (two_source_ops): File scope.
 608         (float_mem): Correct fisttpll and fistpll.
 609         (float_mem_mode): New table.
 610         (dofloat): Use it.
 611         (OP_E): Correct intel mode PTR output.
 612         (ptr_reg): Use open_char and close_char.
 613         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 614         operands.  Set two_source_ops.
 615
 616 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 617
 618         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 619         instead of _raw_size.
 620
 621 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 622
 623         * ia64-gen.c (in_iclass): Handle more postinc st
 624         and ld variants.
 625         * ia64-asmtab.c: Rebuilt.
 626
 627 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 628
 629         * s390-opc.txt: Correct architecture mask for some opcodes.
 630         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 631         in the esa mode as well.
 632
 633 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 634
 635         * sh-dis.c (target_arch): Make unsigned.
 636         (print_insn_sh): Replace (most of) switch with a call to
 637         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 638         * sh-opc.h: Redefine architecture flags values.
 639         Add sh3-nommu architecture.
 640         Reorganise <arch>_up macros so they make more visual sense.
 641         (SH_MERGE_ARCH_SET): Define new macro.
 642         (SH_VALID_BASE_ARCH_SET): Likewise.
 643         (SH_VALID_MMU_ARCH_SET): Likewise.
 644         (SH_VALID_CO_ARCH_SET): Likewise.
 645         (SH_VALID_ARCH_SET): Likewise.
 646         (SH_MERGE_ARCH_SET_VALID): Likewise.
 647         (SH_ARCH_SET_HAS_FPU): Likewise.
 648         (SH_ARCH_SET_HAS_DSP): Likewise.
 649         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 650         (sh_get_arch_from_bfd_mach): Add prototype.
 651         (sh_get_arch_up_from_bfd_mach): Likewise.
 652         (sh_get_bfd_mach_from_arch_set): Likewise.
 653         (sh_merge_bfd_arc): Likewise.
 654
 655 2004-05-24  Peter Barada  <peter@the-baradas.com>
 656
 657         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 658         into new match_insn_m68k function.  Loop over canidate
 659         matches and select first that completely matches.
 660         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 661         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 662         to verify addressing for MAC/EMAC.
 663         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 664         reigster halves since 'fpu' and 'spl' look misleading.
 665         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 666         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 667         first, tighten up match masks.
 668         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 669         'size' from special case code in print_insn_m68k to
 670         determine decode size of insns.
 671
 672 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 673
 674         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 675         well as when -mpower4.
 676
 677 2004-05-13  Nick Clifton  <nickc@redhat.com>
 678
 679         * po/fr.po: Updated French translation.
 680
 681 2004-05-05  Peter Barada  <peter@the-baradas.com>
 682
 683         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 684         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 685         * m68k-op.c: Switch from ColdFire chips to core variants.
 686
 687 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 688
 689         PR 147.
 690         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 691
 692 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 693
 694         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 695         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 696
 697 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 698
 699         * sh-dis.c (print_insn_sh): Print the value in constant pool
 700         as a symbol if it looks like a symbol.
 701
 702 2004-04-22  Peter Barada <peter@the-baradas.com>
 703
 704         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 705         appropriate ColdFire architectures.
 706         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 707         mask addressing.
 708         Add EMAC instructions, fix MAC instructions. Remove
 709         macmw/macml/msacmw/msacml instructions since mask addressing now
 710         supported.
 711
 712 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 713
 714         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 715         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 716         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 717         macro.  Adjust all users.
 718
 719 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 720
 721         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 722         separately.
 723
 724 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 725
 726         * m32r-asm.c: Regenerate.
 727
 728 2004-03-29  Stan Shebs  <shebs@apple.com>
 729
 730         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 731         used.
 732
 733 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 734
 735         * aclocal.m4: Regenerate.
 736         * config.in: Regenerate.
 737         * configure: Regenerate.
 738         * po/POTFILES.in: Regenerate.
 739         * po/opcodes.pot: Regenerate.
 740
 741 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 742
 743         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 744         PPC_OPERANDS_GPR_0.
 745         * ppc-opc.c (RA0): Define.
 746         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 747         (RAOPT): Rename from RAO.  Update all uses.
 748         (powerpc_opcodes): Use RA0 as appropriate.
 749
 750 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 751
 752         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 753
 754 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 755
 756         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 757
 758 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 759
 760         * i386-dis.c (GRPPLOCK): Delete.
 761         (grps): Delete GRPPLOCK entry.
 762
 763 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 764
 765         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 766         (M, Mp): Use OP_M.
 767         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 768         (GRPPADLCK): Define.
 769         (dis386): Use NOP_Fixup on "nop".
 770         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 771         (twobyte_has_modrm): Set for 0xa7.
 772         (padlock_table): Delete.  Move to..
 773         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 774         and clflush.
 775         (print_insn): Revert PADLOCK_SPECIAL code.
 776         (OP_E): Delete sfence, lfence, mfence checks.
 777
 778 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 779
 780         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 781         (INVLPG_Fixup): New function.
 782         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 783
 784 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 785
 786         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 787         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 788         (padlock_table): New struct with PadLock instructions.
 789         (print_insn): Handle PADLOCK_SPECIAL.
 790
 791 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 792
 793         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 794         (OP_E): Twiddle clflush to sfence here.
 795
 796 2004-03-08  Nick Clifton  <nickc@redhat.com>
 797
 798         * po/de.po: Updated German translation.
 799
 800 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 801
 802         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 803         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 804         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 805         accordingly.
 806
 807 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 808
 809         * frv-asm.c: Regenerate.
 810         * frv-desc.c: Regenerate.
 811         * frv-desc.h: Regenerate.
 812         * frv-dis.c: Regenerate.
 813         * frv-ibld.c: Regenerate.
 814         * frv-opc.c: Regenerate.
 815         * frv-opc.h: Regenerate.
 816
 817 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 818
 819         * frv-desc.c, frv-opc.c: Regenerate.
 820
 821 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 822
 823         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 824
 825 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 826
 827         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 828         Also correct mistake in the comment.
 829
 830 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 831
 832         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 833         ensure that double registers have even numbers.
 834         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 835         that reserved instruction 0xfffd does not decode the same
 836         as 0xfdfd (ftrv).
 837         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 838         REG_N refers to a double register.
 839         Add REG_N_B01 nibble type and use it instead of REG_NM
 840         in ftrv.
 841         Adjust the bit patterns in a few comments.
 842
 843 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 844
 845         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 846
 847 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 848
 849         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 850
 851 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 852
 853         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 854
 855 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 856
 857         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 858         mtivor32, mtivor33, mtivor34.
 859
 860 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 861
 862         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 863
 864 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 865
 866         * arm-opc.h Maverick accumulator register opcode fixes.
 867
 868 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 869
 870         * m32r-dis.c: Regenerate.
 871
 872 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 873
 874         * sh-opc.h (sh_table): "fsrra", not "fssra".
 875
 876 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 877
 878         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 879         contraints.
 880
 881 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 882
 883         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 884
 885 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 886
 887         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 888         1.  Don't print scale factor on AT&T mode when index missing.
 889
 890 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 891
 892         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 893         when loaded into XR registers.
 894
 895 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 896
 897         * frv-desc.h: Regenerate.
 898         * frv-desc.c: Regenerate.
 899         * frv-opc.c: Regenerate.
 900
 901 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 902
 903         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 904
 905 2004-01-09  Paul Brook  <paul@codesourcery.com>
 906
 907         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 908         specific opcodes.
 909
 910 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 911
 912         * Makefile.am (libopcodes_la_DEPENDENCIES)
 913         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 914         comment about the problem.
 915         * Makefile.in: Regenerate.
 916
 917 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 918
 919         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 920         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 921         cut&paste errors in shifting/truncating numerical operands.
 922         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 923         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 924         (parse_uslo16): Likewise.
 925         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 926         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 927         (parse_s12): Likewise.
 928         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 929         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 930         (parse_uslo16): Likewise.
 931         (parse_uhi16): Parse gothi and gotfuncdeschi.
 932         (parse_d12): Parse got12 and gotfuncdesc12.
 933         (parse_s12): Likewise.
 934
 935 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 936
 937         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 938         instruction which looks similar to an 'rla' instruction.
 939
 940 For older changes see ChangeLog-0203
 941 \f
 942 Local Variables:
 943 mode: change-log
 944 left-margin: 8
 945 fill-column: 74
 946 version-control: never
 947 End: