* cgen-ibld.in (extract_normal): Avoid memory range errors.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2006-01-03 DJ Delorie <dj@redhat.com>
2
3 * cgen-ibld.in (extract_normal): Avoid memory range errors.
4 * m32c-ibld.c: Regenerated.
5
6 2005-12-27 Alan Modra <amodra@bigpond.net.au>
7
8 * Makefile.am: Run "make dep-am".
9 * Makefile.in: Regenerate.
10 * po/POTFILES.in: Regenerate.
11
12 2005-12-22 Laurent Menten <laurent.menten@teledisnet.be>
13
14 * pj-opc.c (jsr, ret, getstatic, putstatic, getfield, putfield,
15 invokevirtual, invokespecial, invokestatic, invokeinterface,
16 goto_w, jsr_w, ldc_quick, ldc_w_quick, ldc2_w_quick,
17 getfield_quick, putfield_quick, getfield2_quick, putfield2_quick,
18 getstatic_quick, putstatic_quick, getstatic2_quick,
19 putstatic2_quick, invokevirtual_quick, invokenonvirtual_quick,
20 invokesuper_quick, invokestatic_quick, invokeinterface_quick,
21 aastore_quick, new_quick, anewarray_quick, multianewarray_quick,
22 checkcast_quick, instanceof_quick, invokevirtiual_quick_w,
23 getfield_quick_w, putfield_quick_w, nonnull_quick,
24 agetfield_quick, aputfield_quick, agetstatic_quick,
25 aputstatic_quick, aldc_quick, aldc_w_quick, exit_sync_method): Fix
26 opcodes.
27
28 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
29
30 Second part of ms1 to mt renaming.
31 * Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
32 (stamp-mt): Adjust rule.
33 (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
34 adjust.
35 * Makefile.in: Rebuilt.
36 * configure: Rebuilt.
37 * configure.in (bfd_mt_arch): Rename & adjust.
38 * disassemble.c (ARCH_mt): Renamed.
39 (disassembler): Adjust.
40 * mt-asm.c: Renamed, rebuilt.
41 * mt-desc.c: Renamed, rebuilt.
42 * mt-desc.h: Renamed, rebuilt.
43 * mt-dis.c: Renamed, rebuilt.
44 * mt-ibld.c: Renamed, rebuilt.
45 * mt-opc.c: Renamed, rebuilt.
46 * mt-opc.h: Renamed, rebuilt.
47
48 2005-12-13 DJ Delorie <dj@redhat.com>
49
50 * m32c-desc.c: Regenerate.
51 * m32c-opc.c: Regenerate.
52 * m32c-opc.h: Regenerate.
53
54 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
55
56 * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
57 * Makefile.in: Rebuilt.
58 * configure.in: Replace ms1 files with mt files.
59 * configure: Rebuilt.
60
61 2005-12-08 Jan Beulich <jbeulich@novell.com>
62
63 * i386-dis.c (MAXLEN): Reduce to architectural limit.
64 (fetch_data): Check for sufficient buffer size.
65
66 2005-12-08 Jan Beulich <jbeulich@novell.com>
67
68 * i386-dis.c (OP_ST): Remove prefix in Intel mode.
69
70 2005-12-08 Daniel Jacobowitz <dan@codesourcery.com>
71
72 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
73
74 2005-12-07 Hans-Peter Nilsson <hp@axis.com>
75
76 * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
77 MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
78
79 2005-12-06 H.J. Lu <hongjiu.lu@intel.com>
80
81 PR gas/1874
82 * i386-dis.c (address_mode): New enum type.
83 (address_mode): New variable.
84 (mode_64bit): Removed.
85 (ckprefix): Updated to check address_mode instead of mode_64bit.
86 (prefix_name): Likewise.
87 (print_insn): Likewise.
88 (putop): Likewise.
89 (print_operand_value): Likewise.
90 (intel_operand_size): Likewise.
91 (OP_E): Likewise.
92 (OP_G): Likewise.
93 (set_op): Likewise.
94 (OP_REG): Likewise.
95 (OP_I): Likewise.
96 (OP_I64): Likewise.
97 (OP_OFF): Likewise.
98 (OP_OFF64): Likewise.
99 (ptr_reg): Likewise.
100 (OP_C): Likewise.
101 (SVME_Fixup): Likewise.
102 (print_insn): Set address_mode.
103 (PNI_Fixup): Add 64bit and address size override support for
104 monitor and mwait.
105
106 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
107
108 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
109 (print_with_operands): Check for prefix when [PC+] is seen.
110
111 2005-12-02 Dave Brolley <brolley@redhat.com>
112
113 * configure.in (cgen_files): Add cgen-bitset.lo.
114 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
115 * Makefile.am (CFILES): Add cgen-bitset.c.
116 (ALL_MACHINES): Add cgen-bitset.lo.
117 (cgen-bitset.lo): New target.
118 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
119 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
120 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
121 (cgen_bitset_union): Moved from here ...
122 * cgen-bitset.c: ... to here. New file.
123 * Makefile.in: Regenerated.
124 * configure: Regenerated.
125
126 2005-11-22 James E Wilson <wilson@specifix.com>
127
128 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
129 opcode_fprintf_vma): New.
130 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
131
132 2005-11-16 Alan Modra <amodra@bigpond.net.au>
133
134 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
135 frsqrtes.
136
137 2005-11-14 David Ung <davidu@mips.com>
138
139 * mips16-opc.c: Add MIPS16e save/restore opcodes.
140 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
141 codes for save/restore.
142
143 2005-11-10 Andreas Schwab <schwab@suse.de>
144
145 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
146 coprocessor ID 1.
147
148 2005-11-08 H.J. Lu <hongjiu.lu@intel.com>
149
150 * m32c-desc.c: Regenerated.
151
152 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
153
154 Add ms2.
155 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
156 ms1-opc.c, ms1-opc.h: Regenerated.
157
158 2005-11-07 Steve Ellcey <sje@cup.hp.com>
159
160 * configure: Regenerate after modifying bfd/warning.m4.
161
162 2005-11-07 Alan Modra <amodra@bigpond.net.au>
163
164 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
165 ignored rex prefixes here.
166 (print_insn): Instead, handle them similarly to fwait followed
167 by non-fp insns.
168
169 2005-11-02 H.J. Lu <hongjiu.lu@intel.com>
170
171 * iq2000-desc.c: Regenerated.
172 * iq2000-desc.h: Likewise.
173 * iq2000-dis.c: Likewise.
174 * iq2000-opc.c: Likewise.
175
176 2005-11-02 Paul Brook <paul@codesourcery.com>
177
178 * arm-dis.c (print_insn_thumb32): Word align blx target address.
179
180 2005-10-31 Alan Modra <amodra@bigpond.net.au>
181
182 * arm-dis.c (print_insn): Warning fix.
183
184 2005-10-30 H.J. Lu <hongjiu.lu@intel.com>
185
186 * Makefile.am: Run "make dep-am".
187 * Makefile.in: Regenerated.
188
189 * dep-in.sed: Replace " ./" with " ".
190
191 2005-10-28 Dave Brolley <brolley@redhat.com>
192
193 * All CGEN-generated sources: Regenerate.
194
195 Contribute the following changes:
196 2005-09-19 Dave Brolley <brolley@redhat.com>
197
198 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
199 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
200 bfd_arch_m32c case.
201
202 2005-02-16 Dave Brolley <brolley@redhat.com>
203
204 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
205 cgen_isa_mask_* to cgen_bitset_*.
206 * cgen-opc.c: Likewise.
207
208 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
209
210 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
211 * *-dis.c: Regenerate.
212
213 2003-06-05 DJ Delorie <dj@redhat.com>
214
215 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
216 it, as it may point to a reused buffer. Set prev_isas when we
217 change cpus.
218
219 2002-12-13 Dave Brolley <brolley@redhat.com>
220
221 * cgen-opc.c (cgen_isa_mask_create): New support function for
222 CGEN_ISA_MASK.
223 (cgen_isa_mask_init): Ditto.
224 (cgen_isa_mask_clear): Ditto.
225 (cgen_isa_mask_add): Ditto.
226 (cgen_isa_mask_set): Ditto.
227 (cgen_isa_supported): Ditto.
228 (cgen_isa_mask_compare): Ditto.
229 (cgen_isa_mask_intersection): Ditto.
230 (cgen_isa_mask_copy): Ditto.
231 (cgen_isa_mask_combine): Ditto.
232 * cgen-dis.in (libiberty.h): #include it.
233 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
234 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
235 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
236 * Makefile.in: Regenerated.
237
238 2005-10-27 DJ Delorie <dj@redhat.com>
239
240 * m32c-asm.c: Regenerate.
241 * m32c-desc.c: Regenerate.
242 * m32c-desc.h: Regenerate.
243 * m32c-dis.c: Regenerate.
244 * m32c-ibld.c: Regenerate.
245 * m32c-opc.c: Regenerate.
246 * m32c-opc.h: Regenerate.
247
248 2005-10-26 DJ Delorie <dj@redhat.com>
249
250 * m32c-asm.c: Regenerate.
251 * m32c-desc.c: Regenerate.
252 * m32c-desc.h: Regenerate.
253 * m32c-dis.c: Regenerate.
254 * m32c-ibld.c: Regenerate.
255 * m32c-opc.c: Regenerate.
256 * m32c-opc.h: Regenerate.
257
258 2005-10-26 Paul Brook <paul@codesourcery.com>
259
260 * arm-dis.c (arm_opcodes): Correct "sel" entry.
261
262 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
263
264 * m32r-asm.c: Regenerate.
265
266 2005-10-25 DJ Delorie <dj@redhat.com>
267
268 * m32c-asm.c: Regenerate.
269 * m32c-desc.c: Regenerate.
270 * m32c-desc.h: Regenerate.
271 * m32c-dis.c: Regenerate.
272 * m32c-ibld.c: Regenerate.
273 * m32c-opc.c: Regenerate.
274 * m32c-opc.h: Regenerate.
275
276 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
277
278 * configure.in: Add target architecture bfd_arch_z80.
279 * configure: Regenerated.
280 * disassemble.c (disassembler)<ARCH_z80>: Add case
281 bfd_arch_z80.
282 * z80-dis.c: New file.
283
284 2005-10-25 Alan Modra <amodra@bigpond.net.au>
285
286 * po/POTFILES.in: Regenerate.
287 * po/opcodes.pot: Regenerate.
288
289 2005-10-24 Jan Beulich <jbeulich@novell.com>
290
291 * ia64-asmtab.c: Regenerate.
292
293 2005-10-21 DJ Delorie <dj@redhat.com>
294
295 * m32c-asm.c: Regenerate.
296 * m32c-desc.c: Regenerate.
297 * m32c-desc.h: Regenerate.
298 * m32c-dis.c: Regenerate.
299 * m32c-ibld.c: Regenerate.
300 * m32c-opc.c: Regenerate.
301 * m32c-opc.h: Regenerate.
302
303 2005-10-21 Nick Clifton <nickc@redhat.com>
304
305 * bfin-dis.c: Tidy up code, removing redundant constructs.
306
307 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
308
309 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
310 instructions.
311
312 2005-10-18 Nick Clifton <nickc@redhat.com>
313
314 * m32r-asm.c: Regenerate after updating m32r.opc.
315
316 2005-10-18 Jie Zhang <jie.zhang@analog.com>
317
318 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
319 reading instruction from memory.
320
321 2005-10-18 Nick Clifton <nickc@redhat.com>
322
323 * m32r-asm.c: Regenerate after updating m32r.opc.
324
325 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
326
327 * m32r-asm.c: Regenerate after updating m32r.opc.
328
329 2005-10-08 James Lemke <jim@wasabisystems.com>
330
331 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
332 operations.
333
334 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
335
336 * ppc-dis.c (struct dis_private): Remove.
337 (powerpc_dialect): Avoid aliasing warnings.
338 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
339
340 2005-09-30 Nick Clifton <nickc@redhat.com>
341
342 * po/ga.po: New Irish translation.
343 * configure.in (ALL_LINGUAS): Add "ga".
344 * configure: Regenerate.
345
346 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
347
348 * Makefile.am: Run "make dep-am".
349 * Makefile.in: Regenerated.
350 * aclocal.m4: Likewise.
351 * configure: Likewise.
352
353 2005-09-30 Catherine Moore <clm@cm00re.com>
354
355 * Makefile.am: Bfin support.
356 * Makefile.in: Regenerated.
357 * aclocal.m4: Regenerated.
358 * bfin-dis.c: New file.
359 * configure.in: Bfin support.
360 * configure: Regenerated.
361 * disassemble.c (ARCH_bfin): Define.
362 (disassembler): Add case for bfd_arch_bfin.
363
364 2005-09-28 Jan Beulich <jbeulich@novell.com>
365
366 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
367 (indirEv): Use it.
368 (stackEv): New.
369 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
370 (dis386): Document and use new 'V' meta character. Use it for
371 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
372 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
373 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
374 data prefix as used whenever DFLAG was examined. Handle 'V'.
375 (intel_operand_size): Use stack_v_mode.
376 (OP_E): Use stack_v_mode, but handle only the special case of
377 64-bit mode without operand size override here; fall through to
378 v_mode case otherwise.
379 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
380 and no operand size override is present.
381 (OP_J): Use get32s for obtaining the displacement also when rex64
382 is present.
383
384 2005-09-08 Paul Brook <paul@codesourcery.com>
385
386 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
387
388 2005-09-06 Chao-ying Fu <fu@mips.com>
389
390 * mips-opc.c (MT32): New define.
391 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
392 bottom to avoid opcode collision with "mftr" and "mttr".
393 Add MT instructions.
394 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
395 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
396 formats.
397
398 2005-09-02 Paul Brook <paul@codesourcery.com>
399
400 * arm-dis.c (coprocessor_opcodes): Add null terminator.
401
402 2005-09-02 Paul Brook <paul@codesourcery.com>
403
404 * arm-dis.c (coprocessor_opcodes): New.
405 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
406 (print_insn_coprocessor): New function.
407 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
408 format characters.
409 (print_insn_thumb32): Use print_insn_coprocessor.
410
411 2005-08-30 Paul Brook <paul@codesourcery.com>
412
413 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
414
415 2005-08-26 Jan Beulich <jbeulich@novell.com>
416
417 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
418 re-use.
419 (OP_E): Call intel_operand_size, move call site out of mode
420 dependent code.
421 (OP_OFF): Call intel_operand_size if suffix_always. Remove
422 ATTRIBUTE_UNUSED from parameters.
423 (OP_OFF64): Likewise.
424 (OP_ESreg): Call intel_operand_size.
425 (OP_DSreg): Likewise.
426 (OP_DIR): Use colon rather than semicolon as separator of far
427 jump/call operands.
428
429 2005-08-25 Chao-ying Fu <fu@mips.com>
430
431 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
432 (mips_builtin_opcodes): Add DSP instructions.
433 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
434 mips64, mips64r2.
435 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
436 operand formats.
437
438 2005-08-23 David Ung <davidu@mips.com>
439
440 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
441 instructions to the table.
442
443 2005-08-18 Alan Modra <amodra@bigpond.net.au>
444
445 * a29k-dis.c: Delete.
446 * Makefile.am: Remove a29k support.
447 * configure.in: Likewise.
448 * disassemble.c: Likewise.
449 * Makefile.in: Regenerate.
450 * configure: Regenerate.
451 * po/POTFILES.in: Regenerate.
452
453 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
454
455 * ppc-dis.c (powerpc_dialect): Handle e300.
456 (print_ppc_disassembler_options): Likewise.
457 * ppc-opc.c (PPCE300): Define.
458 (powerpc_opcodes): Mark icbt as available for the e300.
459
460 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
461
462 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
463 Use "rp" instead of "%r2" in "b,l" insns.
464
465 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
466
467 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
468 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
469 (main): Likewise.
470 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
471 and 4 bit optional masks.
472 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
473 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
474 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
475 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
476 (s390_opformats): Likewise.
477 * s390-opc.txt: Add new instructions for cpu type z9-109.
478
479 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
480
481 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
482
483 2005-07-29 Paul Brook <paul@codesourcery.com>
484
485 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
486
487 2005-07-29 Paul Brook <paul@codesourcery.com>
488
489 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
490 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
491
492 2005-07-25 DJ Delorie <dj@redhat.com>
493
494 * m32c-asm.c Regenerate.
495 * m32c-dis.c Regenerate.
496
497 2005-07-20 DJ Delorie <dj@redhat.com>
498
499 * disassemble.c (disassemble_init_for_target): M32C ISAs are
500 enums, so convert them to bit masks, which attributes are.
501
502 2005-07-18 Nick Clifton <nickc@redhat.com>
503
504 * configure.in: Restore alpha ordering to list of arches.
505 * configure: Regenerate.
506 * disassemble.c: Restore alpha ordering to list of arches.
507
508 2005-07-18 Nick Clifton <nickc@redhat.com>
509
510 * m32c-asm.c: Regenerate.
511 * m32c-desc.c: Regenerate.
512 * m32c-desc.h: Regenerate.
513 * m32c-dis.c: Regenerate.
514 * m32c-ibld.h: Regenerate.
515 * m32c-opc.c: Regenerate.
516 * m32c-opc.h: Regenerate.
517
518 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
519
520 * i386-dis.c (PNI_Fixup): Update comment.
521 (VMX_Fixup): Properly handle the suffix check.
522
523 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
524
525 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
526 mfctl disassembly.
527
528 2005-07-16 Alan Modra <amodra@bigpond.net.au>
529
530 * Makefile.am: Run "make dep-am".
531 (stamp-m32c): Fix cpu dependencies.
532 * Makefile.in: Regenerate.
533 * ip2k-dis.c: Regenerate.
534
535 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
536
537 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
538 (VMX_Fixup): New. Fix up Intel VMX Instructions.
539 (Em): New.
540 (Gm): New.
541 (VM): New.
542 (dis386_twobyte): Updated entries 0x78 and 0x79.
543 (twobyte_has_modrm): Likewise.
544 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
545 (OP_G): Handle m_mode.
546
547 2005-07-14 Jim Blandy <jimb@redhat.com>
548
549 Add support for the Renesas M32C and M16C.
550 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
551 * m32c-desc.h, m32c-opc.h: New.
552 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
553 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
554 m32c-opc.c.
555 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
556 m32c-ibld.lo, m32c-opc.lo.
557 (CLEANFILES): List stamp-m32c.
558 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
559 (CGEN_CPUS): Add m32c.
560 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
561 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
562 (m32c_opc_h): New variable.
563 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
564 (m32c-opc.lo): New rules.
565 * Makefile.in: Regenerated.
566 * configure.in: Add case for bfd_m32c_arch.
567 * configure: Regenerated.
568 * disassemble.c (ARCH_m32c): New.
569 [ARCH_m32c]: #include "m32c-desc.h".
570 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
571 (disassemble_init_for_target) [ARCH_m32c]: Same.
572
573 * cgen-ops.h, cgen-types.h: New files.
574 * Makefile.am (HFILES): List them.
575 * Makefile.in: Regenerated.
576
577 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
578
579 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
580 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
581 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
582 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
583 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
584 v850-dis.c: Fix format bugs.
585 * ia64-gen.c (fail, warn): Add format attribute.
586 * or32-opc.c (debug): Likewise.
587
588 2005-07-07 Khem Raj <kraj@mvista.com>
589
590 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
591 disassembly pattern.
592
593 2005-07-06 Alan Modra <amodra@bigpond.net.au>
594
595 * Makefile.am (stamp-m32r): Fix path to cpu files.
596 (stamp-m32r, stamp-iq2000): Likewise.
597 * Makefile.in: Regenerate.
598 * m32r-asm.c: Regenerate.
599 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
600 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
601
602 2005-07-05 Nick Clifton <nickc@redhat.com>
603
604 * iq2000-asm.c: Regenerate.
605 * ms1-asm.c: Regenerate.
606
607 2005-07-05 Jan Beulich <jbeulich@novell.com>
608
609 * i386-dis.c (SVME_Fixup): New.
610 (grps): Use it for the lidt entry.
611 (PNI_Fixup): Call OP_M rather than OP_E.
612 (INVLPG_Fixup): Likewise.
613
614 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
615
616 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
617
618 2005-07-01 Nick Clifton <nickc@redhat.com>
619
620 * a29k-dis.c: Update to ISO C90 style function declarations and
621 fix formatting.
622 * alpha-opc.c: Likewise.
623 * arc-dis.c: Likewise.
624 * arc-opc.c: Likewise.
625 * avr-dis.c: Likewise.
626 * cgen-asm.in: Likewise.
627 * cgen-dis.in: Likewise.
628 * cgen-ibld.in: Likewise.
629 * cgen-opc.c: Likewise.
630 * cris-dis.c: Likewise.
631 * d10v-dis.c: Likewise.
632 * d30v-dis.c: Likewise.
633 * d30v-opc.c: Likewise.
634 * dis-buf.c: Likewise.
635 * dlx-dis.c: Likewise.
636 * h8300-dis.c: Likewise.
637 * h8500-dis.c: Likewise.
638 * hppa-dis.c: Likewise.
639 * i370-dis.c: Likewise.
640 * i370-opc.c: Likewise.
641 * m10200-dis.c: Likewise.
642 * m10300-dis.c: Likewise.
643 * m68k-dis.c: Likewise.
644 * m88k-dis.c: Likewise.
645 * mips-dis.c: Likewise.
646 * mmix-dis.c: Likewise.
647 * msp430-dis.c: Likewise.
648 * ns32k-dis.c: Likewise.
649 * or32-dis.c: Likewise.
650 * or32-opc.c: Likewise.
651 * pdp11-dis.c: Likewise.
652 * pj-dis.c: Likewise.
653 * s390-dis.c: Likewise.
654 * sh-dis.c: Likewise.
655 * sh64-dis.c: Likewise.
656 * sparc-dis.c: Likewise.
657 * sparc-opc.c: Likewise.
658 * sysdep.h: Likewise.
659 * tic30-dis.c: Likewise.
660 * tic4x-dis.c: Likewise.
661 * tic80-dis.c: Likewise.
662 * v850-dis.c: Likewise.
663 * v850-opc.c: Likewise.
664 * vax-dis.c: Likewise.
665 * w65-dis.c: Likewise.
666 * z8kgen.c: Likewise.
667
668 * fr30-*: Regenerate.
669 * frv-*: Regenerate.
670 * ip2k-*: Regenerate.
671 * iq2000-*: Regenerate.
672 * m32r-*: Regenerate.
673 * ms1-*: Regenerate.
674 * openrisc-*: Regenerate.
675 * xstormy16-*: Regenerate.
676
677 2005-06-23 Ben Elliston <bje@gnu.org>
678
679 * m68k-dis.c: Use ISC C90.
680 * m68k-opc.c: Formatting fixes.
681
682 2005-06-16 David Ung <davidu@mips.com>
683
684 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
685 instructions to the table; seb/seh/sew/zeb/zeh/zew.
686
687 2005-06-15 Dave Brolley <brolley@redhat.com>
688
689 Contribute Morpho ms1 on behalf of Red Hat
690 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
691 ms1-opc.h: New files, Morpho ms1 target.
692
693 2004-05-14 Stan Cox <scox@redhat.com>
694
695 * disassemble.c (ARCH_ms1): Define.
696 (disassembler): Handle bfd_arch_ms1
697
698 2004-05-13 Michael Snyder <msnyder@redhat.com>
699
700 * Makefile.am, Makefile.in: Add ms1 target.
701 * configure.in: Ditto.
702
703 2005-06-08 Zack Weinberg <zack@codesourcery.com>
704
705 * arm-opc.h: Delete; fold contents into ...
706 * arm-dis.c: ... here. Move includes of internal COFF headers
707 next to includes of internal ELF headers.
708 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
709 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
710 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
711 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
712 (iwmmxt_wwnames, iwmmxt_wwssnames):
713 Make const.
714 (regnames): Remove iWMMXt coprocessor register sets.
715 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
716 (get_arm_regnames): Adjust fourth argument to match above changes.
717 (set_iwmmxt_regnames): Delete.
718 (print_insn_arm): Constify 'c'. Use ISO syntax for function
719 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
720 and iwmmxt_cregnames, not set_iwmmxt_regnames.
721 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
722 ISO syntax for function pointer calls.
723
724 2005-06-07 Zack Weinberg <zack@codesourcery.com>
725
726 * arm-dis.c: Split up the comments describing the format codes, so
727 that the ARM and 16-bit Thumb opcode tables each have comments
728 preceding them that describe all the codes, and only the codes,
729 valid in those tables. (32-bit Thumb table is already like this.)
730 Reorder the lists in all three comments to match the order in
731 which the codes are implemented.
732 Remove all forward declarations of static functions. Convert all
733 function definitions to ISO C format.
734 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
735 Return nothing.
736 (print_insn_thumb16): Remove unused case 'I'.
737 (print_insn): Update for changed calling convention of subroutines.
738
739 2005-05-25 Jan Beulich <jbeulich@novell.com>
740
741 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
742 hex (but retain it being displayed as signed). Remove redundant
743 checks. Add handling of displacements for 16-bit addressing in Intel
744 mode.
745
746 2005-05-25 Jan Beulich <jbeulich@novell.com>
747
748 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
749 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
750 masking of 'rm' in 16-bit memory address handling.
751
752 2005-05-19 Anton Blanchard <anton@samba.org>
753
754 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
755 (print_ppc_disassembler_options): Document it.
756 * ppc-opc.c (SVC_LEV): Define.
757 (LEV): Allow optional operand.
758 (POWER5): Define.
759 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
760 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
761
762 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
763
764 * Makefile.in: Regenerate.
765
766 2005-05-17 Zack Weinberg <zack@codesourcery.com>
767
768 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
769 instructions. Adjust disassembly of some opcodes to match
770 unified syntax.
771 (thumb32_opcodes): New table.
772 (print_insn_thumb): Rename print_insn_thumb16; don't handle
773 two-halfword branches here.
774 (print_insn_thumb32): New function.
775 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
776 and print_insn_thumb32. Be consistent about order of
777 halfwords when printing 32-bit instructions.
778
779 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
780
781 PR 843
782 * i386-dis.c (branch_v_mode): New.
783 (indirEv): Use branch_v_mode instead of v_mode.
784 (OP_E): Handle branch_v_mode.
785
786 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
787
788 * d10v-dis.c (dis_2_short): Support 64bit host.
789
790 2005-05-07 Nick Clifton <nickc@redhat.com>
791
792 * po/nl.po: Updated translation.
793
794 2005-05-07 Nick Clifton <nickc@redhat.com>
795
796 * Update the address and phone number of the FSF organization in
797 the GPL notices in the following files:
798 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
799 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
800 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
801 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
802 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
803 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
804 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
805 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
806 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
807 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
808 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
809 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
810 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
811 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
812 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
813 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
814 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
815 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
816 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
817 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
818 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
819 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
820 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
821 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
822 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
823 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
824 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
825 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
826 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
827 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
828 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
829 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
830 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
831
832 2005-05-05 James E Wilson <wilson@specifixinc.com>
833
834 * ia64-opc.c: Include sysdep.h before libiberty.h.
835
836 2005-05-05 Nick Clifton <nickc@redhat.com>
837
838 * configure.in (ALL_LINGUAS): Add vi.
839 * configure: Regenerate.
840 * po/vi.po: New.
841
842 2005-04-26 Jerome Guitton <guitton@gnat.com>
843
844 * configure.in: Fix the check for basename declaration.
845 * configure: Regenerate.
846
847 2005-04-19 Alan Modra <amodra@bigpond.net.au>
848
849 * ppc-opc.c (RTO): Define.
850 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
851 entries to suit PPC440.
852
853 2005-04-18 Mark Kettenis <kettenis@gnu.org>
854
855 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
856 Add xcrypt-ctr.
857
858 2005-04-14 Nick Clifton <nickc@redhat.com>
859
860 * po/fi.po: New translation: Finnish.
861 * configure.in (ALL_LINGUAS): Add fi.
862 * configure: Regenerate.
863
864 2005-04-14 Alan Modra <amodra@bigpond.net.au>
865
866 * Makefile.am (NO_WERROR): Define.
867 * configure.in: Invoke AM_BINUTILS_WARNINGS.
868 * Makefile.in: Regenerate.
869 * aclocal.m4: Regenerate.
870 * configure: Regenerate.
871
872 2005-04-04 Nick Clifton <nickc@redhat.com>
873
874 * fr30-asm.c: Regenerate.
875 * frv-asm.c: Regenerate.
876 * iq2000-asm.c: Regenerate.
877 * m32r-asm.c: Regenerate.
878 * openrisc-asm.c: Regenerate.
879
880 2005-04-01 Jan Beulich <jbeulich@novell.com>
881
882 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
883 visible operands in Intel mode. The first operand of monitor is
884 %rax in 64-bit mode.
885
886 2005-04-01 Jan Beulich <jbeulich@novell.com>
887
888 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
889 easier future additions.
890
891 2005-03-31 Jerome Guitton <guitton@gnat.com>
892
893 * configure.in: Check for basename.
894 * configure: Regenerate.
895 * config.in: Ditto.
896
897 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
898
899 * i386-dis.c (SEG_Fixup): New.
900 (Sv): New.
901 (dis386): Use "Sv" for 0x8c and 0x8e.
902
903 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
904 Nick Clifton <nickc@redhat.com>
905
906 * vax-dis.c: (entry_addr): New varible: An array of user supplied
907 function entry mask addresses.
908 (entry_addr_occupied_slots): New variable: The number of occupied
909 elements in entry_addr.
910 (entry_addr_total_slots): New variable: The total number of
911 elements in entry_addr.
912 (parse_disassembler_options): New function. Fills in the entry_addr
913 array.
914 (free_entry_array): New function. Release the memory used by the
915 entry addr array. Suppressed because there is no way to call it.
916 (is_function_entry): Check if a given address is a function's
917 start address by looking at supplied entry mask addresses and
918 symbol information, if available.
919 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
920
921 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
922
923 * cris-dis.c (print_with_operands): Use ~31L for long instead
924 of ~31.
925
926 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
927
928 * mmix-opc.c (O): Revert the last change.
929 (Z): Likewise.
930
931 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
932
933 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
934 (Z): Likewise.
935
936 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
937
938 * mmix-opc.c (O, Z): Force expression as unsigned long.
939
940 2005-03-18 Nick Clifton <nickc@redhat.com>
941
942 * ip2k-asm.c: Regenerate.
943 * op/opcodes.pot: Regenerate.
944
945 2005-03-16 Nick Clifton <nickc@redhat.com>
946 Ben Elliston <bje@au.ibm.com>
947
948 * configure.in (werror): New switch: Add -Werror to the
949 compiler command line. Enabled by default. Disable via
950 --disable-werror.
951 * configure: Regenerate.
952
953 2005-03-16 Alan Modra <amodra@bigpond.net.au>
954
955 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
956 BOOKE.
957
958 2005-03-15 Alan Modra <amodra@bigpond.net.au>
959
960 * po/es.po: Commit new Spanish translation.
961
962 * po/fr.po: Commit new French translation.
963
964 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
965
966 * vax-dis.c: Fix spelling error
967 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
968 of just "Entry mask: < r1 ... >"
969
970 2005-03-12 Zack Weinberg <zack@codesourcery.com>
971
972 * arm-dis.c (arm_opcodes): Document %E and %V.
973 Add entries for v6T2 ARM instructions:
974 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
975 (print_insn_arm): Add support for %E and %V.
976 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
977
978 2005-03-10 Jeff Baker <jbaker@qnx.com>
979 Alan Modra <amodra@bigpond.net.au>
980
981 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
982 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
983 (SPRG_MASK): Delete.
984 (XSPRG_MASK): Mask off extra bits now part of sprg field.
985 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
986 mfsprg4..7 after msprg and consolidate.
987
988 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
989
990 * vax-dis.c (entry_mask_bit): New array.
991 (print_insn_vax): Decode function entry mask.
992
993 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
994
995 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
996
997 2005-03-05 Alan Modra <amodra@bigpond.net.au>
998
999 * po/opcodes.pot: Regenerate.
1000
1001 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
1002
1003 * arc-dis.c (a4_decoding_class): New enum.
1004 (dsmOneArcInst): Use the enum values for the decoding class.
1005 Remove redundant case in the switch for decodingClass value 11.
1006
1007 2005-03-02 Jan Beulich <jbeulich@novell.com>
1008
1009 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
1010 accesses.
1011 (OP_C): Consider lock prefix in non-64-bit modes.
1012
1013 2005-02-24 Alan Modra <amodra@bigpond.net.au>
1014
1015 * cris-dis.c (format_hex): Remove ineffective warning fix.
1016 * crx-dis.c (make_instruction): Warning fix.
1017 * frv-asm.c: Regenerate.
1018
1019 2005-02-23 Nick Clifton <nickc@redhat.com>
1020
1021 * cgen-dis.in: Use bfd_byte for buffers that are passed to
1022 read_memory.
1023
1024 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
1025
1026 * crx-dis.c (make_instruction): Move argument structure into inner
1027 scope and ensure that all of its fields are initialised before
1028 they are used.
1029
1030 * fr30-asm.c: Regenerate.
1031 * fr30-dis.c: Regenerate.
1032 * frv-asm.c: Regenerate.
1033 * frv-dis.c: Regenerate.
1034 * ip2k-asm.c: Regenerate.
1035 * ip2k-dis.c: Regenerate.
1036 * iq2000-asm.c: Regenerate.
1037 * iq2000-dis.c: Regenerate.
1038 * m32r-asm.c: Regenerate.
1039 * m32r-dis.c: Regenerate.
1040 * openrisc-asm.c: Regenerate.
1041 * openrisc-dis.c: Regenerate.
1042 * xstormy16-asm.c: Regenerate.
1043 * xstormy16-dis.c: Regenerate.
1044
1045 2005-02-22 Alan Modra <amodra@bigpond.net.au>
1046
1047 * arc-ext.c: Warning fixes.
1048 * arc-ext.h: Likewise.
1049 * cgen-opc.c: Likewise.
1050 * ia64-gen.c: Likewise.
1051 * maxq-dis.c: Likewise.
1052 * ns32k-dis.c: Likewise.
1053 * w65-dis.c: Likewise.
1054 * ia64-asmtab.c: Regenerate.
1055
1056 2005-02-22 Alan Modra <amodra@bigpond.net.au>
1057
1058 * fr30-desc.c: Regenerate.
1059 * fr30-desc.h: Regenerate.
1060 * fr30-opc.c: Regenerate.
1061 * fr30-opc.h: Regenerate.
1062 * frv-desc.c: Regenerate.
1063 * frv-desc.h: Regenerate.
1064 * frv-opc.c: Regenerate.
1065 * frv-opc.h: Regenerate.
1066 * ip2k-desc.c: Regenerate.
1067 * ip2k-desc.h: Regenerate.
1068 * ip2k-opc.c: Regenerate.
1069 * ip2k-opc.h: Regenerate.
1070 * iq2000-desc.c: Regenerate.
1071 * iq2000-desc.h: Regenerate.
1072 * iq2000-opc.c: Regenerate.
1073 * iq2000-opc.h: Regenerate.
1074 * m32r-desc.c: Regenerate.
1075 * m32r-desc.h: Regenerate.
1076 * m32r-opc.c: Regenerate.
1077 * m32r-opc.h: Regenerate.
1078 * m32r-opinst.c: Regenerate.
1079 * openrisc-desc.c: Regenerate.
1080 * openrisc-desc.h: Regenerate.
1081 * openrisc-opc.c: Regenerate.
1082 * openrisc-opc.h: Regenerate.
1083 * xstormy16-desc.c: Regenerate.
1084 * xstormy16-desc.h: Regenerate.
1085 * xstormy16-opc.c: Regenerate.
1086 * xstormy16-opc.h: Regenerate.
1087
1088 2005-02-21 Alan Modra <amodra@bigpond.net.au>
1089
1090 * Makefile.am: Run "make dep-am"
1091 * Makefile.in: Regenerate.
1092
1093 2005-02-15 Nick Clifton <nickc@redhat.com>
1094
1095 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1096 compile time warnings.
1097 (print_keyword): Likewise.
1098 (default_print_insn): Likewise.
1099
1100 * fr30-desc.c: Regenerated.
1101 * fr30-desc.h: Regenerated.
1102 * fr30-dis.c: Regenerated.
1103 * fr30-opc.c: Regenerated.
1104 * fr30-opc.h: Regenerated.
1105 * frv-desc.c: Regenerated.
1106 * frv-dis.c: Regenerated.
1107 * frv-opc.c: Regenerated.
1108 * ip2k-asm.c: Regenerated.
1109 * ip2k-desc.c: Regenerated.
1110 * ip2k-desc.h: Regenerated.
1111 * ip2k-dis.c: Regenerated.
1112 * ip2k-opc.c: Regenerated.
1113 * ip2k-opc.h: Regenerated.
1114 * iq2000-desc.c: Regenerated.
1115 * iq2000-dis.c: Regenerated.
1116 * iq2000-opc.c: Regenerated.
1117 * m32r-asm.c: Regenerated.
1118 * m32r-desc.c: Regenerated.
1119 * m32r-desc.h: Regenerated.
1120 * m32r-dis.c: Regenerated.
1121 * m32r-opc.c: Regenerated.
1122 * m32r-opc.h: Regenerated.
1123 * m32r-opinst.c: Regenerated.
1124 * openrisc-desc.c: Regenerated.
1125 * openrisc-desc.h: Regenerated.
1126 * openrisc-dis.c: Regenerated.
1127 * openrisc-opc.c: Regenerated.
1128 * openrisc-opc.h: Regenerated.
1129 * xstormy16-desc.c: Regenerated.
1130 * xstormy16-desc.h: Regenerated.
1131 * xstormy16-dis.c: Regenerated.
1132 * xstormy16-opc.c: Regenerated.
1133 * xstormy16-opc.h: Regenerated.
1134
1135 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1136
1137 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1138 address.
1139
1140 2005-02-11 Nick Clifton <nickc@redhat.com>
1141
1142 * iq2000-asm.c: Regenerate.
1143
1144 * frv-dis.c: Regenerate.
1145
1146 2005-02-07 Jim Blandy <jimb@redhat.com>
1147
1148 * Makefile.am (CGEN): Load guile.scm before calling the main
1149 application script.
1150 * Makefile.in: Regenerated.
1151 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1152 Simply pass the cgen-opc.scm path to ${cgen} as its first
1153 argument; ${cgen} itself now contains the '-s', or whatever is
1154 appropriate for the Scheme being used.
1155
1156 2005-01-31 Andrew Cagney <cagney@gnu.org>
1157
1158 * configure: Regenerate to track ../gettext.m4.
1159
1160 2005-01-31 Jan Beulich <jbeulich@novell.com>
1161
1162 * ia64-gen.c (NELEMS): Define.
1163 (shrink): Generate alias with missing second predicate register when
1164 opcode has two outputs and these are both predicates.
1165 * ia64-opc-i.c (FULL17): Define.
1166 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1167 here to generate output template.
1168 (TBITCM, TNATCM): Undefine after use.
1169 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1170 first input. Add ld16 aliases without ar.csd as second output. Add
1171 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1172 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1173 ar.ccv as third/fourth inputs. Consolidate through...
1174 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1175 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1176 * ia64-asmtab.c: Regenerate.
1177
1178 2005-01-27 Andrew Cagney <cagney@gnu.org>
1179
1180 * configure: Regenerate to track ../gettext.m4 change.
1181
1182 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
1183
1184 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1185 * frv-asm.c: Rebuilt.
1186 * frv-desc.c: Rebuilt.
1187 * frv-desc.h: Rebuilt.
1188 * frv-dis.c: Rebuilt.
1189 * frv-ibld.c: Rebuilt.
1190 * frv-opc.c: Rebuilt.
1191 * frv-opc.h: Rebuilt.
1192
1193 2005-01-24 Andrew Cagney <cagney@gnu.org>
1194
1195 * configure: Regenerate, ../gettext.m4 was updated.
1196
1197 2005-01-21 Fred Fish <fnf@specifixinc.com>
1198
1199 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1200 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1201 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1202 * mips-dis.c: Ditto.
1203
1204 2005-01-20 Alan Modra <amodra@bigpond.net.au>
1205
1206 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1207
1208 2005-01-19 Fred Fish <fnf@specifixinc.com>
1209
1210 * mips-dis.c (no_aliases): New disassembly option flag.
1211 (set_default_mips_dis_options): Init no_aliases to zero.
1212 (parse_mips_dis_option): Handle no-aliases option.
1213 (print_insn_mips): Ignore table entries that are aliases
1214 if no_aliases is set.
1215 (print_insn_mips16): Ditto.
1216 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1217 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1218 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1219 * mips16-opc.c (mips16_opcodes): Ditto.
1220
1221 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1222
1223 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1224 (inheritance diagram): Add missing edge.
1225 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1226 easier for the testsuite.
1227 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1228 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1229 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1230 arch_sh2a_or_sh4_up child.
1231 (sh_table): Do renaming as above.
1232 Correct comment for ldc.l for gas testsuite to read.
1233 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1234 Correct comments for movy.w and movy.l for gas testsuite to read.
1235 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1236
1237 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1238
1239 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1240
1241 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1242
1243 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1244
1245 2005-01-10 Andreas Schwab <schwab@suse.de>
1246
1247 * disassemble.c (disassemble_init_for_target) <case
1248 bfd_arch_ia64>: Set skip_zeroes to 16.
1249 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1250
1251 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1252
1253 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1254
1255 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1256
1257 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1258 memory references. Convert avr_operand() to C90 formatting.
1259
1260 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1261
1262 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1263
1264 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1265
1266 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1267 (no_op_insn): Initialize array with instructions that have no
1268 operands.
1269 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1270
1271 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1272
1273 * arm-dis.c: Correct top-level comment.
1274
1275 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1276
1277 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1278 architecuture defining the insn.
1279 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1280 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1281 field.
1282 Also include opcode/arm.h.
1283 * Makefile.am (arm-dis.lo): Update dependency list.
1284 * Makefile.in: Regenerate.
1285
1286 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1287
1288 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1289 reflect the change to the short immediate syntax.
1290
1291 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1292
1293 * or32-opc.c (debug): Warning fix.
1294 * po/POTFILES.in: Regenerate.
1295
1296 * maxq-dis.c: Formatting.
1297 (print_insn): Warning fix.
1298
1299 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1300
1301 * arm-dis.c (WORD_ADDRESS): Define.
1302 (print_insn): Use it. Correct big-endian end-of-section handling.
1303
1304 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1305 Vineet Sharma <vineets@noida.hcltech.com>
1306
1307 * maxq-dis.c: New file.
1308 * disassemble.c (ARCH_maxq): Define.
1309 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1310 instructions..
1311 * configure.in: Add case for bfd_maxq_arch.
1312 * configure: Regenerate.
1313 * Makefile.am: Add support for maxq-dis.c
1314 * Makefile.in: Regenerate.
1315 * aclocal.m4: Regenerate.
1316
1317 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1318
1319 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1320 mode.
1321 * crx-dis.c: Likewise.
1322
1323 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1324
1325 Generally, handle CRISv32.
1326 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1327 (struct cris_disasm_data): New type.
1328 (format_reg, format_hex, cris_constraint, print_flags)
1329 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1330 callers changed.
1331 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1332 (print_insn_crisv32_without_register_prefix)
1333 (print_insn_crisv10_v32_with_register_prefix)
1334 (print_insn_crisv10_v32_without_register_prefix)
1335 (cris_parse_disassembler_options): New functions.
1336 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1337 parameter. All callers changed.
1338 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1339 failure.
1340 (cris_constraint) <case 'Y', 'U'>: New cases.
1341 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1342 for constraint 'n'.
1343 (print_with_operands) <case 'Y'>: New case.
1344 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1345 <case 'N', 'Y', 'Q'>: New cases.
1346 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1347 (print_insn_cris_with_register_prefix)
1348 (print_insn_cris_without_register_prefix): Call
1349 cris_parse_disassembler_options.
1350 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1351 for CRISv32 and the size of immediate operands. New v32-only
1352 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1353 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1354 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1355 Change brp to be v3..v10.
1356 (cris_support_regs): New vector.
1357 (cris_opcodes): Update head comment. New format characters '[',
1358 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1359 Add new opcodes for v32 and adjust existing opcodes to accommodate
1360 differences to earlier variants.
1361 (cris_cond15s): New vector.
1362
1363 2004-11-04 Jan Beulich <jbeulich@novell.com>
1364
1365 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1366 (indirEb): Remove.
1367 (Mp): Use f_mode rather than none at all.
1368 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1369 replaces what previously was x_mode; x_mode now means 128-bit SSE
1370 operands.
1371 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1372 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1373 pinsrw's second operand is Edqw.
1374 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1375 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1376 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1377 mode when an operand size override is present or always suffixing.
1378 More instructions will need to be added to this group.
1379 (putop): Handle new macro chars 'C' (short/long suffix selector),
1380 'I' (Intel mode override for following macro char), and 'J' (for
1381 adding the 'l' prefix to far branches in AT&T mode). When an
1382 alternative was specified in the template, honor macro character when
1383 specified for Intel mode.
1384 (OP_E): Handle new *_mode values. Correct pointer specifications for
1385 memory operands. Consolidate output of index register.
1386 (OP_G): Handle new *_mode values.
1387 (OP_I): Handle const_1_mode.
1388 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1389 respective opcode prefix bits have been consumed.
1390 (OP_EM, OP_EX): Provide some default handling for generating pointer
1391 specifications.
1392
1393 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1394
1395 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1396 COP_INST macro.
1397
1398 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1399
1400 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1401 (getregliststring): Support HI/LO and user registers.
1402 * crx-opc.c (crx_instruction): Update data structure according to the
1403 rearrangement done in CRX opcode header file.
1404 (crx_regtab): Likewise.
1405 (crx_optab): Likewise.
1406 (crx_instruction): Reorder load/stor instructions, remove unsupported
1407 formats.
1408 support new Co-Processor instruction 'cpi'.
1409
1410 2004-10-27 Nick Clifton <nickc@redhat.com>
1411
1412 * opcodes/iq2000-asm.c: Regenerate.
1413 * opcodes/iq2000-desc.c: Regenerate.
1414 * opcodes/iq2000-desc.h: Regenerate.
1415 * opcodes/iq2000-dis.c: Regenerate.
1416 * opcodes/iq2000-ibld.c: Regenerate.
1417 * opcodes/iq2000-opc.c: Regenerate.
1418 * opcodes/iq2000-opc.h: Regenerate.
1419
1420 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1421
1422 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1423 us4, us5 (respectively).
1424 Remove unsupported 'popa' instruction.
1425 Reverse operands order in store co-processor instructions.
1426
1427 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1428
1429 * Makefile.am: Run "make dep-am"
1430 * Makefile.in: Regenerate.
1431
1432 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1433
1434 * xtensa-dis.c: Use ISO C90 formatting.
1435
1436 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1437
1438 * ppc-opc.c: Revert 2004-09-09 change.
1439
1440 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1441
1442 * xtensa-dis.c (state_names): Delete.
1443 (fetch_data): Use xtensa_isa_maxlength.
1444 (print_xtensa_operand): Replace operand parameter with opcode/operand
1445 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1446 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1447 instruction bundles. Use xmalloc instead of malloc.
1448
1449 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1450
1451 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1452 initializers.
1453
1454 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1455
1456 * crx-opc.c (crx_instruction): Support Co-processor insns.
1457 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1458 (getregliststring): Change function to use the above enum.
1459 (print_arg): Handle CO-Processor insns.
1460 (crx_cinvs): Add 'b' option to invalidate the branch-target
1461 cache.
1462
1463 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1464
1465 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1466 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1467 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1468 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1469 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1470
1471 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1472
1473 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1474 rather than add it.
1475
1476 2004-09-30 Paul Brook <paul@codesourcery.com>
1477
1478 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1479 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1480
1481 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1482
1483 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1484 (CONFIG_STATUS_DEPENDENCIES): New.
1485 (Makefile): Removed.
1486 (config.status): Likewise.
1487 * Makefile.in: Regenerated.
1488
1489 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1490
1491 * Makefile.am: Run "make dep-am".
1492 * Makefile.in: Regenerate.
1493 * aclocal.m4: Regenerate.
1494 * configure: Regenerate.
1495 * po/POTFILES.in: Regenerate.
1496 * po/opcodes.pot: Regenerate.
1497
1498 2004-09-11 Andreas Schwab <schwab@suse.de>
1499
1500 * configure: Rebuild.
1501
1502 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1503
1504 * ppc-opc.c (L): Make this field not optional.
1505
1506 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1507
1508 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1509 Fix parameter to 'm[t|f]csr' insns.
1510
1511 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1512
1513 * configure.in: Autoupdate to autoconf 2.59.
1514 * aclocal.m4: Rebuild with aclocal 1.4p6.
1515 * configure: Rebuild with autoconf 2.59.
1516 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1517 bfd changes for autoconf 2.59 on the way).
1518 * config.in: Rebuild with autoheader 2.59.
1519
1520 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1521
1522 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1523
1524 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1525
1526 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1527 (GRPPADLCK2): New define.
1528 (twobyte_has_modrm): True for 0xA6.
1529 (grps): GRPPADLCK2 for opcode 0xA6.
1530
1531 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1532
1533 Introduce SH2a support.
1534 * sh-opc.h (arch_sh2a_base): Renumber.
1535 (arch_sh2a_nofpu_base): Remove.
1536 (arch_sh_base_mask): Adjust.
1537 (arch_opann_mask): New.
1538 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1539 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1540 (sh_table): Adjust whitespace.
1541 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1542 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1543 instruction list throughout.
1544 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1545 of arch_sh2a in instruction list throughout.
1546 (arch_sh2e_up): Accomodate above changes.
1547 (arch_sh2_up): Ditto.
1548 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1549 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1550 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1551 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1552 * sh-opc.h (arch_sh2a_nofpu): New.
1553 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1554 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1555 instruction.
1556 2004-01-20 DJ Delorie <dj@redhat.com>
1557 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1558 2003-12-29 DJ Delorie <dj@redhat.com>
1559 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1560 sh_opcode_info, sh_table): Add sh2a support.
1561 (arch_op32): New, to tag 32-bit opcodes.
1562 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1563 2003-12-02 Michael Snyder <msnyder@redhat.com>
1564 * sh-opc.h (arch_sh2a): Add.
1565 * sh-dis.c (arch_sh2a): Handle.
1566 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1567
1568 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1569
1570 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1571
1572 2004-07-22 Nick Clifton <nickc@redhat.com>
1573
1574 PR/280
1575 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1576 insns - this is done by objdump itself.
1577 * h8500-dis.c (print_insn_h8500): Likewise.
1578
1579 2004-07-21 Jan Beulich <jbeulich@novell.com>
1580
1581 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1582 regardless of address size prefix in effect.
1583 (ptr_reg): Size or address registers does not depend on rex64, but
1584 on the presence of an address size override.
1585 (OP_MMX): Use rex.x only for xmm registers.
1586 (OP_EM): Use rex.z only for xmm registers.
1587
1588 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1589
1590 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1591 move/branch operations to the bottom so that VR5400 multimedia
1592 instructions take precedence in disassembly.
1593
1594 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1595
1596 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1597 ISA-specific "break" encoding.
1598
1599 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1600
1601 * arm-opc.h: Fix typo in comment.
1602
1603 2004-07-11 Andreas Schwab <schwab@suse.de>
1604
1605 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1606
1607 2004-07-09 Andreas Schwab <schwab@suse.de>
1608
1609 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1610
1611 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1612
1613 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1614 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1615 (crx-dis.lo): New target.
1616 (crx-opc.lo): Likewise.
1617 * Makefile.in: Regenerate.
1618 * configure.in: Handle bfd_crx_arch.
1619 * configure: Regenerate.
1620 * crx-dis.c: New file.
1621 * crx-opc.c: New file.
1622 * disassemble.c (ARCH_crx): Define.
1623 (disassembler): Handle ARCH_crx.
1624
1625 2004-06-29 James E Wilson <wilson@specifixinc.com>
1626
1627 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1628 * ia64-asmtab.c: Regnerate.
1629
1630 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1631
1632 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1633 (extract_fxm): Don't test dialect.
1634 (XFXFXM_MASK): Include the power4 bit.
1635 (XFXM): Add p4 param.
1636 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1637
1638 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1639
1640 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1641 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1642
1643 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1644
1645 * ppc-opc.c (BH, XLBH_MASK): Define.
1646 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1647
1648 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1649
1650 * i386-dis.c (x_mode): Comment.
1651 (two_source_ops): File scope.
1652 (float_mem): Correct fisttpll and fistpll.
1653 (float_mem_mode): New table.
1654 (dofloat): Use it.
1655 (OP_E): Correct intel mode PTR output.
1656 (ptr_reg): Use open_char and close_char.
1657 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1658 operands. Set two_source_ops.
1659
1660 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1661
1662 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1663 instead of _raw_size.
1664
1665 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1666
1667 * ia64-gen.c (in_iclass): Handle more postinc st
1668 and ld variants.
1669 * ia64-asmtab.c: Rebuilt.
1670
1671 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1672
1673 * s390-opc.txt: Correct architecture mask for some opcodes.
1674 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1675 in the esa mode as well.
1676
1677 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1678
1679 * sh-dis.c (target_arch): Make unsigned.
1680 (print_insn_sh): Replace (most of) switch with a call to
1681 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1682 * sh-opc.h: Redefine architecture flags values.
1683 Add sh3-nommu architecture.
1684 Reorganise <arch>_up macros so they make more visual sense.
1685 (SH_MERGE_ARCH_SET): Define new macro.
1686 (SH_VALID_BASE_ARCH_SET): Likewise.
1687 (SH_VALID_MMU_ARCH_SET): Likewise.
1688 (SH_VALID_CO_ARCH_SET): Likewise.
1689 (SH_VALID_ARCH_SET): Likewise.
1690 (SH_MERGE_ARCH_SET_VALID): Likewise.
1691 (SH_ARCH_SET_HAS_FPU): Likewise.
1692 (SH_ARCH_SET_HAS_DSP): Likewise.
1693 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1694 (sh_get_arch_from_bfd_mach): Add prototype.
1695 (sh_get_arch_up_from_bfd_mach): Likewise.
1696 (sh_get_bfd_mach_from_arch_set): Likewise.
1697 (sh_merge_bfd_arc): Likewise.
1698
1699 2004-05-24 Peter Barada <peter@the-baradas.com>
1700
1701 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1702 into new match_insn_m68k function. Loop over canidate
1703 matches and select first that completely matches.
1704 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1705 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1706 to verify addressing for MAC/EMAC.
1707 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1708 reigster halves since 'fpu' and 'spl' look misleading.
1709 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1710 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1711 first, tighten up match masks.
1712 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1713 'size' from special case code in print_insn_m68k to
1714 determine decode size of insns.
1715
1716 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1717
1718 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1719 well as when -mpower4.
1720
1721 2004-05-13 Nick Clifton <nickc@redhat.com>
1722
1723 * po/fr.po: Updated French translation.
1724
1725 2004-05-05 Peter Barada <peter@the-baradas.com>
1726
1727 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1728 variants in arch_mask. Only set m68881/68851 for 68k chips.
1729 * m68k-op.c: Switch from ColdFire chips to core variants.
1730
1731 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1732
1733 PR 147.
1734 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1735
1736 2004-04-29 Ben Elliston <bje@au.ibm.com>
1737
1738 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1739 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1740
1741 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1742
1743 * sh-dis.c (print_insn_sh): Print the value in constant pool
1744 as a symbol if it looks like a symbol.
1745
1746 2004-04-22 Peter Barada <peter@the-baradas.com>
1747
1748 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1749 appropriate ColdFire architectures.
1750 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1751 mask addressing.
1752 Add EMAC instructions, fix MAC instructions. Remove
1753 macmw/macml/msacmw/msacml instructions since mask addressing now
1754 supported.
1755
1756 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1757
1758 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1759 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1760 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1761 macro. Adjust all users.
1762
1763 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1764
1765 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1766 separately.
1767
1768 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1769
1770 * m32r-asm.c: Regenerate.
1771
1772 2004-03-29 Stan Shebs <shebs@apple.com>
1773
1774 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1775 used.
1776
1777 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1778
1779 * aclocal.m4: Regenerate.
1780 * config.in: Regenerate.
1781 * configure: Regenerate.
1782 * po/POTFILES.in: Regenerate.
1783 * po/opcodes.pot: Regenerate.
1784
1785 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1786
1787 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1788 PPC_OPERANDS_GPR_0.
1789 * ppc-opc.c (RA0): Define.
1790 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1791 (RAOPT): Rename from RAO. Update all uses.
1792 (powerpc_opcodes): Use RA0 as appropriate.
1793
1794 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1795
1796 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1797
1798 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1799
1800 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1801
1802 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1803
1804 * i386-dis.c (GRPPLOCK): Delete.
1805 (grps): Delete GRPPLOCK entry.
1806
1807 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1808
1809 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1810 (M, Mp): Use OP_M.
1811 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1812 (GRPPADLCK): Define.
1813 (dis386): Use NOP_Fixup on "nop".
1814 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1815 (twobyte_has_modrm): Set for 0xa7.
1816 (padlock_table): Delete. Move to..
1817 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1818 and clflush.
1819 (print_insn): Revert PADLOCK_SPECIAL code.
1820 (OP_E): Delete sfence, lfence, mfence checks.
1821
1822 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1823
1824 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1825 (INVLPG_Fixup): New function.
1826 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1827
1828 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1829
1830 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1831 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1832 (padlock_table): New struct with PadLock instructions.
1833 (print_insn): Handle PADLOCK_SPECIAL.
1834
1835 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1836
1837 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1838 (OP_E): Twiddle clflush to sfence here.
1839
1840 2004-03-08 Nick Clifton <nickc@redhat.com>
1841
1842 * po/de.po: Updated German translation.
1843
1844 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1845
1846 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1847 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1848 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1849 accordingly.
1850
1851 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1852
1853 * frv-asm.c: Regenerate.
1854 * frv-desc.c: Regenerate.
1855 * frv-desc.h: Regenerate.
1856 * frv-dis.c: Regenerate.
1857 * frv-ibld.c: Regenerate.
1858 * frv-opc.c: Regenerate.
1859 * frv-opc.h: Regenerate.
1860
1861 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1862
1863 * frv-desc.c, frv-opc.c: Regenerate.
1864
1865 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1866
1867 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1868
1869 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1870
1871 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1872 Also correct mistake in the comment.
1873
1874 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1875
1876 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1877 ensure that double registers have even numbers.
1878 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1879 that reserved instruction 0xfffd does not decode the same
1880 as 0xfdfd (ftrv).
1881 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1882 REG_N refers to a double register.
1883 Add REG_N_B01 nibble type and use it instead of REG_NM
1884 in ftrv.
1885 Adjust the bit patterns in a few comments.
1886
1887 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1888
1889 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1890
1891 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1892
1893 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1894
1895 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1896
1897 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1898
1899 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1900
1901 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1902 mtivor32, mtivor33, mtivor34.
1903
1904 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1905
1906 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1907
1908 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1909
1910 * arm-opc.h Maverick accumulator register opcode fixes.
1911
1912 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1913
1914 * m32r-dis.c: Regenerate.
1915
1916 2004-01-27 Michael Snyder <msnyder@redhat.com>
1917
1918 * sh-opc.h (sh_table): "fsrra", not "fssra".
1919
1920 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1921
1922 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1923 contraints.
1924
1925 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1926
1927 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1928
1929 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1930
1931 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1932 1. Don't print scale factor on AT&T mode when index missing.
1933
1934 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1935
1936 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1937 when loaded into XR registers.
1938
1939 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1940
1941 * frv-desc.h: Regenerate.
1942 * frv-desc.c: Regenerate.
1943 * frv-opc.c: Regenerate.
1944
1945 2004-01-13 Michael Snyder <msnyder@redhat.com>
1946
1947 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1948
1949 2004-01-09 Paul Brook <paul@codesourcery.com>
1950
1951 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1952 specific opcodes.
1953
1954 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1955
1956 * Makefile.am (libopcodes_la_DEPENDENCIES)
1957 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1958 comment about the problem.
1959 * Makefile.in: Regenerate.
1960
1961 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1962
1963 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1964 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1965 cut&paste errors in shifting/truncating numerical operands.
1966 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1967 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1968 (parse_uslo16): Likewise.
1969 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1970 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1971 (parse_s12): Likewise.
1972 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1973 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1974 (parse_uslo16): Likewise.
1975 (parse_uhi16): Parse gothi and gotfuncdeschi.
1976 (parse_d12): Parse got12 and gotfuncdesc12.
1977 (parse_s12): Likewise.
1978
1979 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1980
1981 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1982 instruction which looks similar to an 'rla' instruction.
1983
1984 For older changes see ChangeLog-0203
1985 \f
1986 Local Variables:
1987 mode: change-log
1988 left-margin: 8
1989 fill-column: 74
1990 version-control: never
1991 End:
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