Add support for sparc pause instruction.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2012-04-27 David S. Miller <davem@davemloft.net>
2
3 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
4 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
5
6 * sparc-opc.c (CBCOND): New define.
7 (CBCOND_XCC): Likewise.
8 (cbcond): New helper macro.
9 (sparc_opcodes): Add compare-and-branch instructions.
10
11 * sparc-dis.c (print_insn_sparc): Handle ')'.
12 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
13
14 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
15 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
16
17 2012-04-12 David S. Miller <davem@davemloft.net>
18
19 * sparc-dis.c (X_DISP10): Define.
20 (print_insn_sparc): Handle '='.
21
22 2012-04-01 Mike Frysinger <vapier@gentoo.org>
23
24 * bfin-dis.c (fmtconst): Replace decimal handling with a single
25 sprintf call and the '*' field width.
26
27 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
28
29 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
30
31 2012-03-16 Alan Modra <amodra@gmail.com>
32
33 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
34 (powerpc_opcd_indices): Bump array size.
35 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
36 corresponding to unused opcodes to following entry.
37 (lookup_powerpc): New function, extracted and optimised from..
38 (print_insn_powerpc): ..here.
39
40 2012-03-15 Alan Modra <amodra@gmail.com>
41 James Lemke <jwlemke@codesourcery.com>
42
43 * disassemble.c (disassemble_init_for_target): Handle ppc init.
44 * ppc-dis.c (private): New var.
45 (powerpc_init_dialect): Don't return calloc failure, instead use
46 private.
47 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
48 (powerpc_opcd_indices): New array.
49 (disassemble_init_powerpc): New function.
50 (print_insn_big_powerpc): Don't init dialect here.
51 (print_insn_little_powerpc): Likewise.
52 (print_insn_powerpc): Start search using powerpc_opcd_indices.
53
54 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
55
56 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
57 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
58 (PPCVEC2, PPCTMR, E6500): New short names.
59 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
60 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
61 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
62 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
63 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
64 optional operands on sync instruction for E6500 target.
65
66 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
67
68 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
69
70 2012-02-27 Alan Modra <amodra@gmail.com>
71
72 * mt-dis.c: Regenerate.
73
74 2012-02-27 Alan Modra <amodra@gmail.com>
75
76 * v850-opc.c (extract_v8): Rearrange to make it obvious this
77 is the inverse of corresponding insert function.
78 (extract_d22, extract_u9, extract_r4): Likewise.
79 (extract_d9): Correct sign extension.
80 (extract_d16_15): Don't assume "long" is 32 bits, and don't
81 rely on implementation defined behaviour for shift right of
82 signed types.
83 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
84 (extract_d23): Likewise, and correct mask.
85
86 2012-02-27 Alan Modra <amodra@gmail.com>
87
88 * crx-dis.c (print_arg): Mask constant to 32 bits.
89 * crx-opc.c (cst4_map): Use int array.
90
91 2012-02-27 Alan Modra <amodra@gmail.com>
92
93 * arc-dis.c (BITS): Don't use shifts to mask off bits.
94 (FIELDD): Sign extend with xor,sub.
95
96 2012-02-25 Walter Lee <walt@tilera.com>
97
98 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
99 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
100 TILEPRO_OPC_LW_TLS_SN.
101
102 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
103
104 * i386-opc.h (HLEPrefixNone): New.
105 (HLEPrefixLock): Likewise.
106 (HLEPrefixAny): Likewise.
107 (HLEPrefixRelease): Likewise.
108
109 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
110
111 * i386-dis.c (HLE_Fixup1): New.
112 (HLE_Fixup2): Likewise.
113 (HLE_Fixup3): Likewise.
114 (Ebh1): Likewise.
115 (Evh1): Likewise.
116 (Ebh2): Likewise.
117 (Evh2): Likewise.
118 (Ebh3): Likewise.
119 (Evh3): Likewise.
120 (MOD_C6_REG_7): Likewise.
121 (MOD_C7_REG_7): Likewise.
122 (RM_C6_REG_7): Likewise.
123 (RM_C7_REG_7): Likewise.
124 (XACQUIRE_PREFIX): Likewise.
125 (XRELEASE_PREFIX): Likewise.
126 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
127 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
128 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
129 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
130 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
131 MOD_C6_REG_7 and MOD_C7_REG_7.
132 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
133 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
134 xtest.
135 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
136 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
137
138 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
139 CPU_RTM_FLAGS.
140 (cpu_flags): Add CpuHLE and CpuRTM.
141 (opcode_modifiers): Add HLEPrefixOk.
142
143 * i386-opc.h (CpuHLE): New.
144 (CpuRTM): Likewise.
145 (HLEPrefixOk): Likewise.
146 (i386_cpu_flags): Add cpuhle and cpurtm.
147 (i386_opcode_modifier): Add hleprefixok.
148
149 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
150 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
151 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
152 operand. Add xacquire, xrelease, xabort, xbegin, xend and
153 xtest.
154 * i386-init.h: Regenerated.
155 * i386-tbl.h: Likewise.
156
157 2012-01-24 DJ Delorie <dj@redhat.com>
158
159 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
160 * rl78-decode.c: Regenerate.
161
162 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
163
164 PR binutils/10173
165 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
166
167 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
168
169 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
170 register and move them after pmove with PSR/PCSR register.
171
172 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
173
174 * i386-dis.c (mod_table): Add vmfunc.
175
176 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
177 (cpu_flags): CpuVMFUNC.
178
179 * i386-opc.h (CpuVMFUNC): New.
180 (i386_cpu_flags): Add cpuvmfunc.
181
182 * i386-opc.tbl: Add vmfunc.
183 * i386-init.h: Regenerated.
184 * i386-tbl.h: Likewise.
185
186 For older changes see ChangeLog-2011
187 \f
188 Local Variables:
189 mode: change-log
190 left-margin: 8
191 fill-column: 74
192 version-control: never
193 End:
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