opcodes/ChangeLog

   1 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * bfin-dis.c (struct private): Change int's to bfd_boolean's.
   4         (decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
   5         decode_dagMODik_0, decode_LDIMMhalf_0, decode_linkage_0):
   6         Change assignment of 1 to priv->comment to TRUE.
   7         (print_insn_bfin): Change legal to a bfd_boolean.  Change
   8         assignment of 0/1 with priv comment and parallel and legal
   9         to FALSE/TRUE.
  10
  11 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
  12
  13         * bfin-dis.c (OUT): Define.
  14         (decode_CC2stat_0): Declare new op_names array.
  15         Replace multiple if statements with a single one.
  16
  17 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
  18
  19         * bfin-dis.c (struct private): Add iw0.
  20         (_print_insn_bfin): Assign iw0 to priv.iw0.
  21         (print_insn_bfin): Drop ifetch and use priv.iw0.
  22
  23 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
  24
  25         * bfin-dis.c (comment, parallel): Move from global scope ...
  26         (struct private): ... to this new struct.
  27         (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
  28         decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
  29         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
  30         decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
  31         decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
  32         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
  33         decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
  34         print_insn_bfin): Declare private struct.  Use priv's comment and
  35         parallel members.
  36
  37 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
  38
  39         * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
  40         (_print_insn_bfin): Add check for unaligned pc.
  41
  42 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
  43
  44         * bfin-dis.c (ifetch): New function.
  45         (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
  46         -1 when it errors.
  47
  48 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
  49
  50         * micromips-opc.c (COD): Rename throughout to...
  51         (CM): New define, update to use INSN_COPROC_MOVE.
  52         (LCD): Rename throughout to...
  53         (LC): New define, update to use INSN_LOAD_COPROC.
  54         * mips-opc.c: Likewise.
  55
  56 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
  57
  58         * micromips-opc.c (COD, LCD) New macros.
  59         (cfc1, ctc1): Remove FP_S attribute.
  60         (dmfc1, mfc1, mfhc1): Add LCD attribute.
  61         (dmtc1, mtc1, mthc1): Add COD attribute.
  62         * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
  63
  64 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
  65             Alexander Ivchenko  <alexander.ivchenko@intel.com>
  66             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
  67             Sergey Lega  <sergey.s.lega@intel.com>
  68             Anna Tikhonova  <anna.tikhonova@intel.com>
  69             Ilya Tocar  <ilya.tocar@intel.com>
  70             Andrey Turetskiy  <andrey.turetskiy@intel.com>
  71             Ilya Verbin  <ilya.verbin@intel.com>
  72             Kirill Yukhin  <kirill.yukhin@intel.com>
  73             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
  74
  75         * i386-dis-evex.h: Updated.
  76         * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
  77         PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
  78         PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
  79         PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
  80         PREFIX_EVEX_0F3A67.
  81         (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
  82         VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
  83         (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
  84         EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
  85         EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
  86         EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
  87         EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
  88         EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
  89         EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
  90         (prefix_table): Add entries for new instructions.
  91         (vex_len_table): Ditto.
  92         (vex_w_table): Ditto.
  93         (OP_E_memory): Update xmmq_mode handling.
  94         * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
  95         (cpu_flags): Add CpuAVX512DQ.
  96         * i386-init.h: Regenerared.
  97         * i386-opc.h (CpuAVX512DQ): New.
  98         (i386_cpu_flags): Add cpuavx512dq.
  99         * i386-opc.tbl: Add AVX512DQ instructions.
 100         * i386-tbl.h: Regenerate.
 101
 102 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 103             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 104             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 105             Sergey Lega  <sergey.s.lega@intel.com>
 106             Anna Tikhonova  <anna.tikhonova@intel.com>
 107             Ilya Tocar  <ilya.tocar@intel.com>
 108             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 109             Ilya Verbin  <ilya.verbin@intel.com>
 110             Kirill Yukhin  <kirill.yukhin@intel.com>
 111             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 112
 113         * i386-dis-evex.h: Add new instructions (prefixes bellow).
 114         * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
 115         (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
 116         (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
 117         PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
 118         PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
 119         PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
 120         PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
 121         PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
 122         PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
 123         PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
 124         PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
 125         PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
 126         PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
 127         PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
 128         PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
 129         PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
 130         PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
 131         PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
 132         PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
 133         PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
 134         PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
 135         PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
 136         (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
 137         VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
 138         VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
 139         VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
 140         VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
 141         VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
 142         VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
 143         VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
 144         VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
 145         VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
 146         VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
 147         (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
 148         EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
 149         EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
 150         EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
 151         EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
 152         EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
 153         EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
 154         (prefix_table): Add entries for new instructions.
 155         (vex_table) : Ditto.
 156         (vex_len_table): Ditto.
 157         (vex_w_table): Ditto.
 158         (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
 159         mask_bd_mode handling.
 160         (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
 161         handling.
 162         (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
 163         handling.
 164         (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
 165         (OP_EX): Add dqw_swap_mode handling.
 166         (OP_VEX): Add mask_bd_mode handling.
 167         (OP_Mask): Add mask_bd_mode handling.
 168         * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
 169         (cpu_flags): Add CpuAVX512BW.
 170         * i386-init.h: Regenerated.
 171         * i386-opc.h (CpuAVX512BW): New.
 172         (i386_cpu_flags): Add cpuavx512bw.
 173         * i386-opc.tbl: Add AVX512BW instructions.
 174         * i386-tbl.h: Regenerate.
 175
 176 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 177             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 178             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 179             Sergey Lega  <sergey.s.lega@intel.com>
 180             Anna Tikhonova  <anna.tikhonova@intel.com>
 181             Ilya Tocar  <ilya.tocar@intel.com>
 182             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 183             Ilya Verbin  <ilya.verbin@intel.com>
 184             Kirill Yukhin  <kirill.yukhin@intel.com>
 185             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 186
 187         * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
 188         * i386-tbl.h: Regenerate.
 189
 190 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 191             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 192             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 193             Sergey Lega  <sergey.s.lega@intel.com>
 194             Anna Tikhonova  <anna.tikhonova@intel.com>
 195             Ilya Tocar  <ilya.tocar@intel.com>
 196             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 197             Ilya Verbin  <ilya.verbin@intel.com>
 198             Kirill Yukhin  <kirill.yukhin@intel.com>
 199             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 200
 201         * i386-dis.c (intel_operand_size): Support 128/256 length in
 202         vex_vsib_q_w_dq_mode.
 203         (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
 204         * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
 205         (cpu_flags): Add CpuAVX512VL.
 206         * i386-init.h: Regenerated.
 207         * i386-opc.h (CpuAVX512VL): New.
 208         (i386_cpu_flags): Add cpuavx512vl.
 209         (BROADCAST_1TO4, BROADCAST_1TO2): Define.
 210         * i386-opc.tbl: Add AVX512VL instructions.
 211         * i386-tbl.h: Regenerate.
 212
 213 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 214
 215         * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
 216         * or1k-opinst.c: Regenerate.
 217
 218 2014-07-08  Ilya Tocar  <ilya.tocar@intel.com>
 219
 220         * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
 221         (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
 222
 223 2014-07-04  Alan Modra  <amodra@gmail.com>
 224
 225         * configure.ac: Rename from configure.in.
 226         * Makefile.in: Regenerate.
 227         * config.in: Regenerate.
 228
 229 2014-07-04  Alan Modra  <amodra@gmail.com>
 230
 231         * configure.in: Include bfd/version.m4.
 232         (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
 233         (BFD_VERSION): Delete.
 234         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
 235         * configure: Regenerate.
 236         * Makefile.in: Regenerate.
 237
 238 2014-07-01  Barney Stratford   <barney_stratford@fastmail.fm>
 239             Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
 240             Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
 241             Soundararajan  <Sounderarajan.D@atmel.com>
 242
 243         * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
 244         (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
 245         machine is not avrtiny.
 246
 247 2014-06-26  Philippe De Muyter <phdm@macqel.be>
 248
 249         * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
 250         constants.
 251
 252 2014-06-12  Alan Modra  <amodra@gmail.com>
 253
 254         * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
 255         * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
 256
 257 2014-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 258
 259         * i386-dis.c (fwait_prefix): New.
 260         (ckprefix): Set fwait_prefix.
 261         (print_insn): Properly print prefixes before fwait.
 262
 263 2014-06-07  Alan Modra  <amodra@gmail.com>
 264
 265         * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
 266
 267 2014-06-05  Joel Brobecker  <brobecker@adacore.com>
 268
 269         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
 270         bfd's development.sh.
 271         * Makefile.in, configure: Regenerate.
 272
 273 2014-06-03  Nick Clifton  <nickc@redhat.com>
 274
 275         * msp430-dis.c (msp430_doubleoperand): Use extension_word to
 276         decide when extended addressing is being used.
 277
 278 2014-06-02  Eric Botcazou  <ebotcazou@adacore.com>
 279
 280         * sparc-opc.c (cas): Disable for LEON.
 281         (casl): Likewise.
 282
 283 2014-05-20  Alan Modra  <amodra@gmail.com>
 284
 285         * m68k-dis.c: Don't include setjmp.h.
 286
 287 2014-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 288
 289         * i386-dis.c (ADDR16_PREFIX): Removed.
 290         (ADDR32_PREFIX): Likewise.
 291         (DATA16_PREFIX): Likewise.
 292         (DATA32_PREFIX): Likewise.
 293         (prefix_name): Updated.
 294         (print_insn): Simplify data and address size prefixes processing.
 295
 296 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 297
 298         * or1k-desc.c: Regenerated.
 299         * or1k-desc.h: Likewise.
 300         * or1k-opc.c: Likewise.
 301         * or1k-opc.h: Likewise.
 302         * or1k-opinst.c: Likewise.
 303
 304 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 305
 306         * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
 307         (I34): New define.
 308         (I36): New define.
 309         (I66): New define.
 310         (I68): New define.
 311         * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
 312         mips64r5.
 313         (parse_mips_dis_option): Update MSA and virtualization support to
 314         allow mips64r3 and mips64r5.
 315
 316 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 317
 318         * mips-opc.c (G3): Remove I4.
 319
 320 2014-05-05  H.J. Lu  <hongjiu.lu@intel.com>
 321
 322         PR binutils/16893
 323         * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
 324         (end_codep): Likewise.
 325         (mandatory_prefix): Likewise.
 326         (active_seg_prefix): Likewise.
 327         (ckprefix): Set active_seg_prefix to the active segment register
 328         prefix.
 329         (seg_prefix): Removed.
 330         (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
 331         for prefix index.  Ignore the index if it is invalid and the
 332         mandatory prefix isn't required.
 333         (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
 334         mandatory.  Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
 335         in used_prefixes here.  Don't print unused prefixes.  Check
 336         active_seg_prefix for the active segment register prefix.
 337         Restore the DFLAG bit in sizeflag if the data size prefix is
 338         unused.  Check the unused mandatory PREFIX_XXX prefixes
 339         (append_seg): Only print the segment register which gets used.
 340         (OP_E_memory): Check active_seg_prefix for the segment register
 341         prefix.
 342         (OP_OFF): Likewise.
 343         (OP_OFF64): Likewise.
 344         (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
 345
 346 2014-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 347
 348         PR binutils/16886
 349         * config.in: Regenerated.
 350         * configure: Likewise.
 351         * configure.in: Check if sigsetjmp is available.
 352         * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 353         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 354         (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
 355         * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 356         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 357         (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
 358         * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 359         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 360         (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
 361         * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
 362         (OPCODES_SIGSETJMP): Likewise.
 363         (OPCODES_SIGLONGJMP): Likewise.
 364         * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 365         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 366         (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
 367         * xtensa-dis.c (dis_private): Replace jmp_buf with
 368         OPCODES_SIGJMP_BUF.
 369         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 370         (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
 371         * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 372         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 373         (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
 374
 375 2014-05-01  H.J. Lu  <hongjiu.lu@intel.com>
 376
 377         PR binutils/16891
 378         * i386-dis.c (print_insn): Handle prefixes before fwait.
 379
 380 2014-04-26  Alan Modra  <amodra@gmail.com>
 381
 382         * po/POTFILES.in: Regenerate.
 383
 384 2014-04-23  Andrew Bennett  <andrew.bennett@imgtec.com>
 385
 386         * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
 387         to allow the MIPS XPA ASE.
 388         (parse_mips_dis_option): Process the -Mxpa option.
 389         * mips-opc.c (XPA): New define.
 390         (mips_builtin_opcodes): Add MIPS XPA instructions and move the
 391         locations of the ctc0 and cfc0 instructions.
 392
 393 2014-04-22  Christian Svensson  <blue@cmd.nu>
 394
 395         * Makefile.am: Remove openrisc and or32 support.  Add support for or1k.
 396         * configure.in: Likewise.
 397         * disassemble.c: Likewise.
 398         * or1k-asm.c: New file.
 399         * or1k-desc.c: New file.
 400         * or1k-desc.h: New file.
 401         * or1k-dis.c: New file.
 402         * or1k-ibld.c: New file.
 403         * or1k-opc.c: New file.
 404         * or1k-opc.h: New file.
 405         * or1k-opinst.c: New file.
 406         * Makefile.in: Regenerate.
 407         * configure: Regenerate.
 408         * openrisc-asm.c: Delete.
 409         * openrisc-desc.c: Delete.
 410         * openrisc-desc.h: Delete.
 411         * openrisc-dis.c: Delete.
 412         * openrisc-ibld.c: Delete.
 413         * openrisc-opc.c: Delete.
 414         * openrisc-opc.h: Delete.
 415         * or32-dis.c: Delete.
 416         * or32-opc.c: Delete.
 417
 418 2014-04-04  Ilya Tocar  <ilya.tocar@intel.com>
 419
 420         * i386-dis.c (rm_table): Add encls, enclu.
 421         * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
 422         (cpu_flags): Add CpuSE1.
 423         * i386-opc.h (enum): Add CpuSE1.
 424         (i386_cpu_flags): Add cpuse1.
 425         * i386-opc.tbl: Add encls, enclu.
 426         * i386-init.h: Regenerated.
 427         * i386-tbl.h: Likewise.
 428
 429 2014-04-02  Anthony Green  <green@moxielogic.com>
 430
 431         * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
 432         instructions, sex.b and sex.s.
 433
 434 2014-03-26  Jiong Wang  <jiong.wang@arm.com>
 435
 436         * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
 437         instructions.
 438
 439 2014-03-20  Ilya Tocar  <ilya.tocar@intel.com>
 440
 441         * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
 442         vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
 443         vscatterqps.
 444         * i386-tbl.h: Regenerate.
 445
 446 2014-03-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 447
 448         * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
 449         %hstick_enable added.
 450
 451 2014-03-19  Nick Clifton  <nickc@redhat.com>
 452
 453         * rx-decode.opc (bwl): Allow for bogus instructions with a size
 454         field of 3.
 455         (sbwl, ubwl, SCALE): Likewise.
 456         * rx-decode.c: Regenerate.
 457
 458 2014-03-12  Alan Modra  <amodra@gmail.com>
 459
 460         * Makefile.in: Regenerate.
 461
 462 2014-03-05  Alan Modra  <amodra@gmail.com>
 463
 464         Update copyright years.
 465
 466 2014-03-04  Heiher  <r@hev.cc>
 467
 468         * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
 469
 470 2014-03-04  Richard Sandiford  <rdsandiford@googlemail.com>
 471
 472         * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
 473         so that they come after the Loongson extensions.
 474
 475 2014-03-03  Alan Modra  <amodra@gmail.com>
 476
 477         * i386-gen.c (process_copyright): Emit copyright notice on one line.
 478
 479 2014-02-28  Alan Modra  <amodra@gmail.com>
 480
 481         * msp430-decode.c: Regenerate.
 482
 483 2014-02-27  Jiong Wang  <jiong.wang@arm.com>
 484
 485         * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
 486         FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
 487
 488 2014-02-27  Yufeng Zhang  <yufeng.zhang@arm.com>
 489
 490         * aarch64-opc.c (print_register_offset_address): Call
 491         get_int_reg_name to prepare the register name.
 492
 493 2014-02-25  Ilya Tocar  <ilya.tocar@intel.com>
 494
 495         * i386-opc.tbl: Remove wrong variant of vcvtps2ph
 496         * i386-tbl.h: Regenerate.
 497
 498 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 499
 500         * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
 501         (cpu_flags): Add CpuPREFETCHWT1.
 502         * i386-init.h: Regenerate.
 503         * i386-opc.h (CpuPREFETCHWT1): New.
 504         (i386_cpu_flags): Add cpuprefetchwt1.
 505         * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
 506         * i386-tbl.h: Regenerate.
 507
 508 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 509
 510         * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
 511         to CpuAVX512F.
 512         * i386-tbl.h: Regenerate.
 513
 514 2014-02-19  H.J. Lu  <hongjiu.lu@intel.com>
 515
 516         * i386-gen.c (output_cpu_flags): Don't output trailing space.
 517         (output_opcode_modifier): Likewise.
 518         (output_operand_type): Likewise.
 519         * i386-init.h: Regenerated.
 520         * i386-tbl.h: Likewise.
 521
 522 2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>
 523
 524         * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
 525         MOD_0FC7_REG_5.
 526         (PREFIX enum): Add PREFIX_0FAE_REG_7.
 527         (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
 528         (prefix_table): Add clflusopt.
 529         (mod_table): Add xrstors, xsavec, xsaves.
 530         * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
 531         CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
 532         (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
 533         * i386-init.h: Regenerate.
 534         * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
 535         xsaves64, xsavec, xsavec64.
 536         * i386-tbl.h: Regenerate.
 537
 538 2014-02-10  Alan Modra  <amodra@gmail.com>
 539
 540         * po/POTFILES.in: Regenerate.
 541         * po/opcodes.pot: Regenerate.
 542
 543 2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
 544             Jan Beulich  <jbeulich@suse.com>
 545
 546         PR binutils/16490
 547         * i386-dis.c (OP_E_memory): Fix shift computation for
 548         vex_vsib_q_w_dq_mode.
 549
 550 2014-01-09  Bradley Nelson  <bradnelson@google.com>
 551             Roland McGrath  <mcgrathr@google.com>
 552
 553         * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
 554         last_rex_prefix is -1.
 555
 556 2014-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 557
 558         * i386-gen.c (process_copyright): Update copyright year to 2014.
 559
 560 2014-01-03  Maciej W. Rozycki  <macro@codesourcery.com>
 561
 562         * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
 563
 564 For older changes see ChangeLog-2013
 565 \f
 566 Copyright (C) 2014 Free Software Foundation, Inc.
 567
 568 Copying and distribution of this file, with or without modification,
 569 are permitted in any medium without royalty provided the copyright
 570 notice and this notice are preserved.
 571
 572 Local Variables:
 573 mode: change-log
 574 left-margin: 8
 575 fill-column: 74
 576 version-control: never
 577 End: