opcodes/ChangeLog

   1 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
   2
   3         * arm-dis.c (print_insn_thumb32): Updated to accept new %P
   4         and %Q patterns.
   5
   6 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
   7
   8         * arm-dis.c (thumb32_opcodes): New instruction bfcsel.
   9         (print_insn_thumb32): Edit the switch case for %Z.
  10
  11 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  12
  13         * arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
  14
  15 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  16
  17         * arm-dis.c (thumb32_opcodes): New instruction bfl.
  18
  19 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  20
  21         * arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
  22
  23 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  24
  25         * arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
  26         Arm register with r13 and r15 unpredictable.
  27         (thumb32_opcodes): New instructions for bfx and bflx.
  28
  29 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  30
  31         * arm-dis.c (thumb32_opcodes): New instructions for bf.
  32
  33 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  34
  35         * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
  36
  37 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  38
  39         * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
  40
  41 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  42
  43         * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
  44
  45 2019-04-12  John Darrington <john@darrington.wattle.id.au>
  46
  47         s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
  48         "optr". ("operator" is a reserved word in c++).
  49
  50 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
  51
  52         * aarch64-opc.c (aarch64_print_operand): Add case for
  53         AARCH64_OPND_Rt_SP.
  54         (verify_constraints): Likewise.
  55         * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
  56         (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
  57         to accept Rt|SP as first operand.
  58         (AARCH64_OPERANDS): Add new Rt_SP.
  59         * aarch64-asm-2.c: Regenerated.
  60         * aarch64-dis-2.c: Regenerated.
  61         * aarch64-opc-2.c: Regenerated.
  62
  63 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
  64
  65         * aarch64-asm-2.c: Regenerated.
  66         * aarch64-dis-2.c: Likewise.
  67         * aarch64-opc-2.c: Likewise.
  68         * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
  69
  70 2019-04-09  Robert Suchanek  <robert.suchanek@mips.com>
  71
  72         * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
  73
  74 2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>
  75
  76         * i386-opc.tbl: Consolidate AVX512 BF16 entries.
  77         * i386-init.h: Regenerated.
  78
  79 2019-04-07  Alan Modra  <amodra@gmail.com>
  80
  81         * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
  82         op_separator to control printing of spaces, comma and parens
  83         rather than need_comma, need_paren and spaces vars.
  84
  85 2019-04-07  Alan Modra  <amodra@gmail.com>
  86
  87         PR 24421
  88         * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
  89         (print_insn_neon, print_insn_arm): Likewise.
  90
  91 2019-04-05  Xuepeng Guo  <xuepeng.guo@intel.com>
  92
  93         * i386-dis-evex.h (evex_table): Updated to support BF16
  94         instructions.
  95         * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
  96         and EVEX_W_0F3872_P_3.
  97         * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
  98         (cpu_flags): Add bitfield for CpuAVX512_BF16.
  99         * i386-opc.h (enum): Add CpuAVX512_BF16.
 100         (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
 101         * i386-opc.tbl: Add AVX512 BF16 instructions.
 102         * i386-init.h: Regenerated.
 103         * i386-tbl.h: Likewise.
 104
 105 2019-04-05  Alan Modra  <amodra@gmail.com>
 106
 107         * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
 108         (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
 109         to favour printing of "-" branch hint when using the "y" bit.
 110         Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
 111
 112 2019-04-05  Alan Modra  <amodra@gmail.com>
 113
 114         * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
 115         opcode until first operand is output.
 116
 117 2019-04-04  Peter Bergner  <bergner@linux.ibm.com>
 118
 119         PR gas/24349
 120         * ppc-opc.c (valid_bo_pre_v2): Add comments.
 121         (valid_bo_post_v2): Add support for 'at' branch hints.
 122         (insert_bo): Only error on branch on ctr.
 123         (get_bo_hint_mask): New function.
 124         (insert_boe): Add new 'branch_taken' formal argument.  Add support
 125         for inserting 'at' branch hints.
 126         (extract_boe): Add new 'branch_taken' formal argument.  Add support
 127         for extracting 'at' branch hints.
 128         (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
 129         (BOE): Delete operand.
 130         (BOM, BOP): New operands.
 131         (RM): Update value.
 132         (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
 133         (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
 134         bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
 135         (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
 136         bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
 137         <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
 138         bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
 139         bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
 140         bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
 141         bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
 142         bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
 143         bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
 144         bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
 145         beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
 146         bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
 147         buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
 148         bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
 149         bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
 150         bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
 151         bttarl+>: New extended mnemonics.
 152
 153 2019-03-28  Alan Modra  <amodra@gmail.com>
 154
 155         PR 24390
 156         * ppc-opc.c (BTF): Define.
 157         (powerpc_opcodes): Use for mtfsb*.
 158         * ppc-dis.c (print_insn_powerpc): Print fields with both
 159         PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
 160
 161 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 162
 163         * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
 164         (mapping_symbol_for_insn): Implement new algorithm.
 165         (print_insn): Remove duplicate code.
 166
 167 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 168
 169         * aarch64-dis.c (print_insn_aarch64):
 170         Implement override.
 171
 172 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 173
 174         * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
 175         order.
 176
 177 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 178
 179         * aarch64-dis.c (last_stop_offset): New.
 180         (print_insn_aarch64): Use stop_offset.
 181
 182 2019-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 183
 184         PR gas/24359
 185         * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
 186         CPU_ANY_AVX2_FLAGS.
 187         * i386-init.h: Regenerated.
 188
 189 2019-03-18  H.J. Lu  <hongjiu.lu@intel.com>
 190
 191         PR gas/24348
 192         * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
 193         vmovdqu16, vmovdqu32 and vmovdqu64.
 194         * i386-tbl.h: Regenerated.
 195
 196 2019-03-12  Andreas Krebbel  <krebbel@linux.ibm.com>
 197
 198         * s390-opc.txt: Rename selhhhr to selfhr.  Remove optional operand
 199         from vstrszb, vstrszh, and vstrszf.
 200
 201 2019-03-12  Andreas Krebbel  <krebbel@linux.ibm.com>
 202
 203         * s390-opc.txt: Add instruction descriptions.
 204
 205 2019-02-08  Jim Wilson  <jimw@sifive.com>
 206
 207         * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
 208         <bne>: Likewise.
 209
 210 2019-02-07  Tamar Christina  <tamar.christina@arm.com>
 211
 212         * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
 213
 214 2019-02-07  Tamar Christina  <tamar.christina@arm.com>
 215
 216         PR binutils/23212
 217         * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
 218         * aarch64-opc.c (verify_elem_sd): New.
 219         (fields): Add FLD_sz entr.
 220         * aarch64-tbl.h (_SIMD_INSN): New.
 221         (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
 222         fmulx scalar and vector by element isns.
 223
 224 2019-02-07  Nick Clifton  <nickc@redhat.com>
 225
 226         * po/sv.po: Updated Swedish translation.
 227
 228 2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>
 229
 230         * s390-mkopc.c (main): Accept arch13 as cpu string.
 231         * s390-opc.c: Add new instruction formats and instruction opcode
 232         masks.
 233         * s390-opc.txt: Add new arch13 instructions.
 234
 235 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 236
 237         * aarch64-tbl.h (QL_LDST_AT): Update macro.
 238         (aarch64_opcode): Change encoding for stg, stzg
 239         st2g and st2zg.
 240         * aarch64-asm-2.c: Regenerated.
 241         * aarch64-dis-2.c: Regenerated.
 242         * aarch64-opc-2.c: Regenerated.
 243
 244 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 245
 246         * aarch64-asm-2.c: Regenerated.
 247         * aarch64-dis-2.c: Likewise.
 248         * aarch64-opc-2.c: Likewise.
 249         * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
 250
 251 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 252             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 253
 254         * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
 255         * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
 256         * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
 257         * aarch64-dis.h (ext_addr_simple_2): Likewise.
 258         * aarch64-opc.c (operand_general_constraint_met_p): Remove
 259         case for ldstgv_indexed.
 260         (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
 261         * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
 262         (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
 263         * aarch64-asm-2.c: Regenerated.
 264         * aarch64-dis-2.c: Regenerated.
 265         * aarch64-opc-2.c: Regenerated.
 266
 267 2019-01-23  Nick Clifton  <nickc@redhat.com>
 268
 269         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 270
 271 2019-01-21  Nick Clifton  <nickc@redhat.com>
 272
 273         * po/de.po: Updated German translation.
 274         * po/uk.po: Updated Ukranian translation.
 275
 276 2019-01-20  Chenghua Xu  <paul.hua.gm@gmail.com>
 277         * mips-dis.c (mips_arch_choices): Fix typo in
 278         gs464, gs464e and gs264e descriptors.
 279
 280 2019-01-19  Nick Clifton  <nickc@redhat.com>
 281
 282         * configure: Regenerate.
 283         * po/opcodes.pot: Regenerate.
 284
 285 2018-06-24  Nick Clifton  <nickc@redhat.com>
 286
 287         2.32 branch created.
 288
 289 2019-01-09  John Darrington <john@darrington.wattle.id.au>
 290
 291         * s12z-dis.c (print_insn_s12z):  Do not dereference an operand
 292         if it is null.
 293         -dis.c (opr_emit_disassembly): Do not omit an index if it is
 294         zero.
 295
 296 2019-01-09  Andrew Paprocki  <andrew@ishiboo.com>
 297
 298         * configure: Regenerate.
 299
 300 2019-01-07  Alan Modra  <amodra@gmail.com>
 301
 302         * configure: Regenerate.
 303         * po/POTFILES.in: Regenerate.
 304
 305 2019-01-03  John Darrington <john@darrington.wattle.id.au>
 306
 307         * s12z-opc.c: New file.
 308         * s12z-opc.h: New file.
 309         * s12z-dis.c: Removed all code not directly related to display
 310         of instructions.  Used the interface provided by the new files
 311         instead.
 312         * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
 313         * Makefile.in: Regenerate.
 314         * configure.ac (bfd_s12z_arch): Correct the dependencies.
 315         * configure: Regenerate.
 316
 317 2019-01-01  Alan Modra  <amodra@gmail.com>
 318
 319         Update year range in copyright notice of all files.
 320
 321 For older changes see ChangeLog-2018
 322 \f
 323 Copyright (C) 2019 Free Software Foundation, Inc.
 324
 325 Copying and distribution of this file, with or without modification,
 326 are permitted in any medium without royalty provided the copyright
 327 notice and this notice are preserved.
 328
 329 Local Variables:
 330 mode: change-log
 331 left-margin: 8
 332 fill-column: 74
 333 version-control: never
 334 End: