opcodes/ChangeLog

   1 2010-08-06  Alan Modra  <amodra@gmail.com>
   2
   3         * disassemble.c: Formatting.
   4         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
   5
   6 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
   9         * i386-tbl.h: Regenerated.
  10
  11 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  12
  13         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
  14
  15         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
  16         * i386-tbl.h: Regenerated.
  17
  18 2010-07-29  DJ Delorie  <dj@redhat.com>
  19
  20         * rx-decode.opc (SRR): New.
  21         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
  22         r0,r0) and NOP3 (max r0,r0) special cases.
  23         * rx-decode.c: Regenerate.
  24
  25 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
  26
  27         * i386-dis.c: Add 0F to VEX opcode enums.
  28
  29 2010-07-27  DJ Delorie  <dj@redhat.com>
  30
  31         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
  32         (rx_decode_opcode): Likewise.
  33         * rx-decode.c: Regenerate.
  34
  35 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
  36             Ina Pandit  <ina.pandit@kpitcummins.com>
  37
  38         * v850-dis.c (v850_sreg_names): Updated structure for system
  39         registers.
  40         (float_cc_names): new structure for condition codes.
  41         (print_value): Update the function that prints value.
  42         (get_operand_value): New function to get the operand value.
  43         (disassemble): Updated to handle the disassembly of instructions.
  44         (print_insn_v850): Updated function to print instruction for different
  45         families.
  46         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
  47         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
  48         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
  49         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
  50         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
  51         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
  52         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
  53         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
  54         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
  55         (v850_operands): Update with the relocation name. Also update
  56         the instructions with specific set of processors.
  57
  58 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
  59
  60         * arm-dis.c (print_insn_arm): Add cases for printing more
  61         symbolic operands.
  62         (print_insn_thumb32): Likewise.
  63
  64 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  65
  66         * mips-dis.c (print_insn_mips): Correct branch instruction type
  67         determination.
  68
  69 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  70
  71         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
  72         type and delay slot determination.
  73         (print_insn_mips16): Extend branch instruction type and delay
  74         slot determination to cover all instructions.
  75         * mips16-opc.c (BR): Remove macro.
  76         (UBR, CBR): New macros.
  77         (mips16_opcodes): Update branch annotation for "b", "beqz",
  78         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
  79         and "jrc".
  80
  81 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  82
  83         AVX Programming Reference (June, 2010)
  84         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
  85         * i386-opc.tbl: Likewise.
  86         * i386-tbl.h: Regenerated.
  87
  88 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  89
  90         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
  91
  92 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
  93
  94         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
  95         ppc_cpu_t before inverting.
  96         (ppc_parse_cpu): Likewise.
  97         (print_insn_powerpc): Likewise.
  98
  99 2010-07-03  Alan Modra  <amodra@gmail.com>
 100
 101         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 102         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 103         (PPC64, MFDEC2): Update.
 104         (NON32, NO371): Define.
 105         (powerpc_opcode): Update to not use old opcode flags, and avoid
 106         -m601 duplicates.
 107
 108 2010-07-03  DJ Delorie  <dj@delorie.com>
 109
 110         * m32c-ibld.c: Regenerate.
 111
 112 2010-07-03  Alan Modra  <amodra@gmail.com>
 113
 114         * ppc-opc.c (PWR2COM): Define.
 115         (PPCPWR2): Add PPC_OPCODE_COMMON.
 116         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 117         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 118         "rac" from -mcom.
 119
 120 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 121
 122         AVX Programming Reference (June, 2010)
 123         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 124         (PREFIX_0FAE_REG_1): Likewise.
 125         (PREFIX_0FAE_REG_2): Likewise.
 126         (PREFIX_0FAE_REG_3): Likewise.
 127         (PREFIX_VEX_3813): Likewise.
 128         (PREFIX_VEX_3A1D): Likewise.
 129         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 130         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 131         PREFIX_VEX_3A1D.
 132         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 133         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 134         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 135
 136         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 137         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 138         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 139
 140         * i386-opc.h (CpuXsaveopt): New.
 141         (CpuFSGSBase): Likewise.
 142         (CpuRdRnd): Likewise.
 143         (CpuF16C): Likewise.
 144         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 145         cpuf16c.
 146
 147         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 148         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 149         * i386-init.h: Regenerated.
 150         * i386-tbl.h: Likewise.
 151
 152 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 153
 154         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 155         and mtocrf on EFS.
 156
 157 2010-06-29  Alan Modra  <amodra@gmail.com>
 158
 159         * maxq-dis.c: Delete file.
 160         * Makefile.am: Remove references to maxq.
 161         * configure.in: Likewise.
 162         * disassemble.c: Likewise.
 163         * Makefile.in: Regenerate.
 164         * configure: Regenerate.
 165         * po/POTFILES.in: Regenerate.
 166
 167 2010-06-29  Alan Modra  <amodra@gmail.com>
 168
 169         * mep-dis.c: Regenerate.
 170
 171 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 172
 173         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 174
 175 2010-06-27  Alan Modra  <amodra@gmail.com>
 176
 177         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 178         (decodeInstr): Likewise.
 179         * dlx-dis.c (print_insn_dlx): Likewise.
 180         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 181         * maxq-dis.c (check_move, print_insn): Likewise.
 182         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 183         * msp430-dis.c (msp430_branchinstr): Likewise.
 184         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 185         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 186         * sparc-dis.c (print_insn_sparc): Likewise.
 187         * fr30-asm.c: Regenerate.
 188         * frv-asm.c: Regenerate.
 189         * ip2k-asm.c: Regenerate.
 190         * iq2000-asm.c: Regenerate.
 191         * lm32-asm.c: Regenerate.
 192         * m32c-asm.c: Regenerate.
 193         * m32r-asm.c: Regenerate.
 194         * mep-asm.c: Regenerate.
 195         * mt-asm.c: Regenerate.
 196         * openrisc-asm.c: Regenerate.
 197         * xc16x-asm.c: Regenerate.
 198         * xstormy16-asm.c: Regenerate.
 199
 200 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 201
 202         PR gas/11673
 203         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 204
 205 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 206
 207         PR binutils/11676
 208         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 209
 210 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 211
 212         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 213         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 214         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 215         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 216         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 217         Treat lwsync as msync on e500.
 218
 219 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 220
 221         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 222
 223 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 224
 225         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 226         constants is the same on 32-bit and 64-bit hosts.
 227
 228 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 229
 230         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 231         .short directives so that they can be reassembled.
 232
 233 2010-05-26  Catherine Moore <clm@codesourcery.com>
 234             David Ung  <davidu@mips.com>
 235
 236         * mips-opc.c: Change membership to I1 for instructions ssnop and
 237         ehb.
 238
 239 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 240
 241         * i386-dis.c (sib): New.
 242         (get_sib): Likewise.
 243         (print_insn): Call get_sib.
 244         OP_E_memory): Use sib.
 245
 246 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 247
 248         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 249         * mips-opc.c (I16): Remove.
 250         (mips_builtin_op): Reclassify jalx.
 251
 252 2010-05-19  Alan Modra  <amodra@gmail.com>
 253
 254         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 255         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 256
 257 2010-05-13  Alan Modra  <amodra@gmail.com>
 258
 259         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 260
 261 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 262
 263         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 264         format.
 265         (print_insn_thumb16): Add support for new %W format.
 266
 267 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 268
 269         * Makefile.in: Regenerate with automake 1.11.1.
 270         * aclocal.m4: Ditto.
 271
 272 2010-05-05  Nick Clifton  <nickc@redhat.com>
 273
 274         * po/es.po: Updated Spanish translation.
 275
 276 2010-04-22  Nick Clifton  <nickc@redhat.com>
 277
 278         * po/opcodes.pot: Updated by the Translation project.
 279         * po/vi.po: Updated Vietnamese translation.
 280
 281 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 282
 283         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 284         bits in opcode.
 285
 286 2010-04-09  Nick Clifton  <nickc@redhat.com>
 287
 288         * i386-dis.c (print_insn): Remove unused variable op.
 289         (OP_sI): Remove unused variable mask.
 290
 291 2010-04-07  Alan Modra  <amodra@gmail.com>
 292
 293         * configure: Regenerate.
 294
 295 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 296
 297         * ppc-opc.c (RBOPT): New define.
 298         ("dccci"): Enable for PPCA2.  Make operands optional.
 299         ("iccci"): Likewise.  Do not deprecate for PPC476.
 300
 301 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 302
 303         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 304
 305 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 306
 307         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 308         * Makefile.in: Regenerate.
 309         * configure.in (bfd_tic6x_arch): New.
 310         * configure: Regenerate.
 311         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 312         (disassembler): Handle TI C6X.
 313         * tic6x-dis.c: New.
 314
 315 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 316
 317         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 318
 319 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 320
 321         * dis-buf.c (buffer_read_memory): Give error for reading just
 322         before the start of memory.
 323
 324 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 325             Quentin Neill <quentin.neill@amd.com>
 326
 327         * i386-dis.c (OP_LWP_I): Removed.
 328         (reg_table): Do not use OP_LWP_I, use Iq.
 329         (OP_LWPCB_E): Remove use of names16.
 330         (OP_LWP_E): Same.
 331         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 332         should not set the Vex.length bit.
 333         * i386-tbl.h: Regenerated.
 334
 335 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 336
 337         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 338
 339 2010-02-24  Nick Clifton  <nickc@redhat.com>
 340
 341         PR binutils/6773
 342         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 343         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 344         (thumb32_opcodes): Likewise.
 345
 346 2010-02-15  Nick Clifton  <nickc@redhat.com>
 347
 348         * po/vi.po: Updated Vietnamese translation.
 349
 350 2010-02-12  Doug Evans  <dje@sebabeach.org>
 351
 352         * lm32-opinst.c: Regenerate.
 353
 354 2010-02-11  Doug Evans  <dje@sebabeach.org>
 355
 356         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 357         (print_address): Delete CGEN_PRINT_ADDRESS.
 358         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 359         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 360         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 361         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 362
 363         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 364         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 365         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 366         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 367         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 368         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 369         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 370         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 371         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 372         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 373         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 374         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 375
 376 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 377
 378         * i386-dis.c: Update copyright.
 379         * i386-gen.c: Likewise.
 380         * i386-opc.h: Likewise.
 381         * i386-opc.tbl: Likewise.
 382
 383 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 384             Sebastian Pop  <sebastian.pop@amd.com>
 385
 386         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 387         function to handle 5th imm8 operand.
 388         (PREFIX_VEX_3A48): Added.
 389         (PREFIX_VEX_3A49): Added.
 390         (VEX_W_3A48_P_2): Added.
 391         (VEX_W_3A49_P_2): Added.
 392         (prefix table): Added entries for PREFIX_VEX_3A48
 393         and PREFIX_VEX_3A49.
 394         (vex table): Added entries for VEX_W_3A48_P_2 and
 395         and VEX_W_3A49_P_2.
 396         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 397         for Vec_Imm4 operands.
 398         * i386-opc.h (enum): Added Vec_Imm4.
 399         (i386_operand_type): Added vec_imm4.
 400         * i386-opc.tbl: Add entries for vpermilp[ds].
 401         * i386-init.h: Regenerated.
 402         * i386-tbl.h: Regenerated.
 403
 404 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 405
 406         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 407         and "pwr7".  Move "a2" into alphabetical order.
 408
 409 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 410
 411         * ppc-dis.c (ppc_opts): Add titan entry.
 412         * ppc-opc.c (TITAN, MULHW): Define.
 413         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 414
 415 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 416
 417         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 418         to CPU_BDVER1_FLAGS
 419         * i386-init.h: Regenerated.
 420
 421 2010-02-03  Anthony Green  <green@moxielogic.com>
 422
 423         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 424         0x0f, and make 0x00 an illegal instruction.
 425
 426 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 427
 428         * opcodes/arm-dis.c (struct arm_private_data): New.
 429         (print_insn_coprocessor, print_insn_arm): Update to use struct
 430         arm_private_data.
 431         (is_mapping_symbol, get_map_sym_type): New functions.
 432         (get_sym_code_type): Check the symbol's section.  Do not check
 433         mapping symbols.
 434         (print_insn): Default to disassembling ARM mode code.  Check
 435         for mapping symbols separately from other symbols.  Use
 436         struct arm_private_data.
 437
 438 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 439
 440         * i386-dis.c (EXVexWdqScalar): New.
 441         (vex_scalar_w_dq_mode): Likewise.
 442         (prefix_table): Update entries for PREFIX_VEX_3899,
 443         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 444         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 445         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 446         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 447         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 448         (OP_EX): Likewise.
 449
 450 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 451
 452         * i386-dis.c (XMScalar): New.
 453         (EXdScalar): Likewise.
 454         (EXqScalar): Likewise.
 455         (EXqScalarS): Likewise.
 456         (VexScalar): Likewise.
 457         (EXdVexScalarS): Likewise.
 458         (EXqVexScalarS): Likewise.
 459         (XMVexScalar): Likewise.
 460         (scalar_mode): Likewise.
 461         (d_scalar_mode): Likewise.
 462         (d_scalar_swap_mode): Likewise.
 463         (q_scalar_mode): Likewise.
 464         (q_scalar_swap_mode): Likewise.
 465         (vex_scalar_mode): Likewise.
 466         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 467         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 468         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 469         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 470         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 471         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 472         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 473         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 474         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 475         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 476         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 477         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 478         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 479         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 480         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 481         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 482         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 483         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 484         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 485         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 486         q_scalar_mode, q_scalar_swap_mode.
 487         (OP_XMM): Handle scalar_mode.
 488         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 489         and q_scalar_swap_mode.
 490         (OP_VEX): Handle vex_scalar_mode.
 491
 492 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 493
 494         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 495
 496 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 497
 498         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 499
 500 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 501
 502         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 503
 504 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 505
 506         * i386-dis.c (Bad_Opcode): New.
 507         (bad_opcode): Likewise.
 508         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 509         (dis386_twobyte): Likewise.
 510         (reg_table): Likewise.
 511         (prefix_table): Likewise.
 512         (x86_64_table): Likewise.
 513         (vex_len_table): Likewise.
 514         (vex_w_table): Likewise.
 515         (mod_table): Likewise.
 516         (rm_table): Likewise.
 517         (float_reg): Likewise.
 518         (reg_table): Remove trailing "(bad)" entries.
 519         (prefix_table): Likewise.
 520         (x86_64_table): Likewise.
 521         (vex_len_table): Likewise.
 522         (vex_w_table): Likewise.
 523         (mod_table): Likewise.
 524         (rm_table): Likewise.
 525         (get_valid_dis386): Handle bytemode 0.
 526
 527 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 528
 529         * i386-opc.h (VEXScalar): New.
 530
 531         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 532         instructions.
 533         * i386-tbl.h: Regenerated.
 534
 535 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 536
 537         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 538
 539         * i386-opc.tbl: Add xsave64 and xrstor64.
 540         * i386-tbl.h: Regenerated.
 541
 542 2010-01-20  Nick Clifton  <nickc@redhat.com>
 543
 544         PR 11170
 545         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 546         based post-indexed addressing.
 547
 548 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 549
 550         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 551         * i386-tbl.h: Regenerated.
 552
 553 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 554
 555         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 556         comments.
 557
 558 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 559
 560         * i386-dis.c (names_mm): New.
 561         (intel_names_mm): Likewise.
 562         (att_names_mm): Likewise.
 563         (names_xmm): Likewise.
 564         (intel_names_xmm): Likewise.
 565         (att_names_xmm): Likewise.
 566         (names_ymm): Likewise.
 567         (intel_names_ymm): Likewise.
 568         (att_names_ymm): Likewise.
 569         (print_insn): Set names_mm, names_xmm and names_ymm.
 570         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 571         (OP_XMM): Likewise.
 572         (OP_EM): Likewise.
 573         (OP_EMC): Likewise.
 574         (OP_MXC): Likewise.
 575         (OP_EX): Likewise.
 576         (XMM_Fixup): Likewise.
 577         (OP_VEX): Likewise.
 578         (OP_EX_VexReg): Likewise.
 579         (OP_Vex_2src): Likewise.
 580         (OP_Vex_2src_1): Likewise.
 581         (OP_Vex_2src_2): Likewise.
 582         (OP_REG_VexI4): Likewise.
 583
 584 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 585
 586         * i386-dis.c (print_insn): Update comments.
 587
 588 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 589
 590         * i386-dis.c (rex_original): Removed.
 591         (ckprefix): Remove rex_original.
 592         (print_insn): Update comments.
 593
 594 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 595
 596         * Makefile.in: Regenerate.
 597         * configure: Regenerate.
 598
 599 2010-01-07  Doug Evans  <dje@sebabeach.org>
 600
 601         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 602         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 603         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 604         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 605         * xstormy16-ibld.c: Regenerate.
 606
 607 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 608
 609         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 610         * i386-init.h: Regenerated.
 611
 612 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 613
 614         * arm-dis.c (print_insn): Fixed search for next symbol and data
 615         dumping condition, and the initial mapping symbol state.
 616
 617 2010-01-05  Doug Evans  <dje@sebabeach.org>
 618
 619         * cgen-ibld.in: #include "cgen/basic-modes.h".
 620         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 621         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 622         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 623         * xstormy16-ibld.c: Regenerate.
 624
 625 2010-01-04  Nick Clifton  <nickc@redhat.com>
 626
 627         PR 11123
 628         * arm-dis.c (print_insn_coprocessor): Initialise value.
 629
 630 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 631
 632         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 633
 634 2010-01-02  Doug Evans  <dje@sebabeach.org>
 635
 636         * cgen-asm.in: Update copyright year.
 637         * cgen-dis.in: Update copyright year.
 638         * cgen-ibld.in: Update copyright year.
 639         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 640         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 641         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 642         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 643         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 644         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 645         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 646         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 647         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 648         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 649         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 650         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 651         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 652         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 653         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 654         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 655         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 656         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 657         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 658         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 659         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 660
 661 For older changes see ChangeLog-2009
 662 \f
 663 Local Variables:
 664 mode: change-log
 665 left-margin: 8
 666 fill-column: 74
 667 version-control: never
 668 End: