opcodes/ChangeLog

   1 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
   2
   3         * ppc-dis.c (struct dis_private): Remove.
   4         (powerpc_dialect): Avoid aliasing warnings.
   5         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
   6
   7 2005-09-30  Nick Clifton  <nickc@redhat.com>
   8
   9         * po/ga.po: New Irish translation.
  10         * configure.in (ALL_LINGUAS): Add "ga".
  11         * configure: Regenerate.
  12
  13 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  14
  15         * Makefile.am: Run "make dep-am".
  16         * Makefile.in: Regenerated.
  17         * aclocal.m4: Likewise.
  18         * configure: Likewise.
  19
  20 2005-09-30  Catherine Moore  <clm@cm00re.com>
  21
  22         * Makefile.am: Bfin support.
  23         * Makefile.in: Regenerated.
  24         * aclocal.m4: Regenerated.
  25         * bfin-dis.c: New file.
  26         * configure.in: Bfin support.
  27         * configure: Regenerated.
  28         * disassemble.c (ARCH_bfin): Define.
  29         (disassembler): Add case for bfd_arch_bfin.
  30
  31 2005-09-28  Jan Beulich  <jbeulich@novell.com>
  32
  33         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
  34         (indirEv): Use it.
  35         (stackEv): New.
  36         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
  37         (dis386): Document and use new 'V' meta character. Use it for
  38         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
  39         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
  40         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
  41         data prefix as used whenever DFLAG was examined. Handle 'V'.
  42         (intel_operand_size): Use stack_v_mode.
  43         (OP_E): Use stack_v_mode, but handle only the special case of
  44         64-bit mode without operand size override here; fall through to
  45         v_mode case otherwise.
  46         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
  47         and no operand size override is present.
  48         (OP_J): Use get32s for obtaining the displacement also when rex64
  49         is present.
  50
  51 2005-09-08  Paul Brook  <paul@codesourcery.com>
  52
  53         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
  54
  55 2005-09-06  Chao-ying Fu  <fu@mips.com>
  56
  57         * mips-opc.c (MT32): New define.
  58         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
  59         bottom to avoid opcode collision with "mftr" and "mttr".
  60         Add MT instructions.
  61         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
  62         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
  63         formats.
  64
  65 2005-09-02  Paul Brook  <paul@codesourcery.com>
  66
  67         * arm-dis.c (coprocessor_opcodes): Add null terminator.
  68
  69 2005-09-02  Paul Brook  <paul@codesourcery.com>
  70
  71         * arm-dis.c (coprocessor_opcodes): New.
  72         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
  73         (print_insn_coprocessor): New function.
  74         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
  75         format characters.
  76         (print_insn_thumb32): Use print_insn_coprocessor.
  77
  78 2005-08-30  Paul Brook  <paul@codesourcery.com>
  79
  80         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
  81
  82 2005-08-26  Jan Beulich  <jbeulich@novell.com>
  83
  84         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
  85         re-use.
  86         (OP_E): Call intel_operand_size, move call site out of mode
  87         dependent code.
  88         (OP_OFF): Call intel_operand_size if suffix_always. Remove
  89         ATTRIBUTE_UNUSED from parameters.
  90         (OP_OFF64): Likewise.
  91         (OP_ESreg): Call intel_operand_size.
  92         (OP_DSreg): Likewise.
  93         (OP_DIR): Use colon rather than semicolon as separator of far
  94         jump/call operands.
  95
  96 2005-08-25  Chao-ying Fu  <fu@mips.com>
  97
  98         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
  99         (mips_builtin_opcodes): Add DSP instructions.
 100         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 101         mips64, mips64r2.
 102         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 103         operand formats.
 104
 105 2005-08-23  David Ung  <davidu@mips.com>
 106
 107         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 108         instructions to the table.
 109
 110 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 111
 112         * a29k-dis.c: Delete.
 113         * Makefile.am: Remove a29k support.
 114         * configure.in: Likewise.
 115         * disassemble.c: Likewise.
 116         * Makefile.in: Regenerate.
 117         * configure: Regenerate.
 118         * po/POTFILES.in: Regenerate.
 119
 120 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 121
 122         * ppc-dis.c (powerpc_dialect): Handle e300.
 123         (print_ppc_disassembler_options): Likewise.
 124         * ppc-opc.c (PPCE300): Define.
 125         (powerpc_opcodes): Mark icbt as available for the e300.
 126
 127 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 128
 129         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 130         Use "rp" instead of "%r2" in "b,l" insns.
 131
 132 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 133
 134         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 135         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 136         (main): Likewise.
 137         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 138         and 4 bit optional masks.
 139         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 140         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 141         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 142         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 143         (s390_opformats): Likewise.
 144         * s390-opc.txt: Add new instructions for cpu type z9-109.
 145
 146 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 147
 148         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 149
 150 2005-07-29  Paul Brook  <paul@codesourcery.com>
 151
 152         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 153
 154 2005-07-29  Paul Brook  <paul@codesourcery.com>
 155
 156         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 157         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 158
 159 2005-07-25  DJ Delorie  <dj@redhat.com>
 160
 161         * m32c-asm.c Regenerate.
 162         * m32c-dis.c Regenerate.
 163
 164 2005-07-20  DJ Delorie  <dj@redhat.com>
 165
 166         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 167         enums, so convert them to bit masks, which attributes are.
 168
 169 2005-07-18  Nick Clifton  <nickc@redhat.com>
 170
 171         * configure.in: Restore alpha ordering to list of arches.
 172         * configure: Regenerate.
 173         * disassemble.c: Restore alpha ordering to list of arches.
 174
 175 2005-07-18  Nick Clifton  <nickc@redhat.com>
 176
 177         * m32c-asm.c: Regenerate.
 178         * m32c-desc.c: Regenerate.
 179         * m32c-desc.h: Regenerate.
 180         * m32c-dis.c: Regenerate.
 181         * m32c-ibld.h: Regenerate.
 182         * m32c-opc.c: Regenerate.
 183         * m32c-opc.h: Regenerate.
 184
 185 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 186
 187         * i386-dis.c (PNI_Fixup): Update comment.
 188         (VMX_Fixup): Properly handle the suffix check.
 189
 190 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 191
 192         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 193         mfctl disassembly.
 194
 195 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 196
 197         * Makefile.am: Run "make dep-am".
 198         (stamp-m32c): Fix cpu dependencies.
 199         * Makefile.in: Regenerate.
 200         * ip2k-dis.c: Regenerate.
 201
 202 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 203
 204         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 205         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 206         (Em): New.
 207         (Gm): New.
 208         (VM): New.
 209         (dis386_twobyte): Updated entries 0x78 and 0x79.
 210         (twobyte_has_modrm): Likewise.
 211         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 212         (OP_G): Handle m_mode.
 213
 214 2005-07-14  Jim Blandy  <jimb@redhat.com>
 215
 216         Add support for the Renesas M32C and M16C.
 217         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 218         * m32c-desc.h, m32c-opc.h: New.
 219         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 220         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 221         m32c-opc.c.
 222         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 223         m32c-ibld.lo, m32c-opc.lo.
 224         (CLEANFILES): List stamp-m32c.
 225         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 226         (CGEN_CPUS): Add m32c.
 227         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 228         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 229         (m32c_opc_h): New variable.
 230         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 231         (m32c-opc.lo): New rules.
 232         * Makefile.in: Regenerated.
 233         * configure.in: Add case for bfd_m32c_arch.
 234         * configure: Regenerated.
 235         * disassemble.c (ARCH_m32c): New.
 236         [ARCH_m32c]: #include "m32c-desc.h".
 237         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 238         (disassemble_init_for_target) [ARCH_m32c]: Same.
 239
 240         * cgen-ops.h, cgen-types.h: New files.
 241         * Makefile.am (HFILES): List them.
 242         * Makefile.in: Regenerated.
 243
 244 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 245
 246         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 247         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 248         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 249         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 250         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 251         v850-dis.c: Fix format bugs.
 252         * ia64-gen.c (fail, warn): Add format attribute.
 253         * or32-opc.c (debug): Likewise.
 254
 255 2005-07-07  Khem Raj  <kraj@mvista.com>
 256
 257         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 258         disassembly pattern.
 259
 260 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 261
 262         * Makefile.am (stamp-m32r): Fix path to cpu files.
 263         (stamp-m32r, stamp-iq2000): Likewise.
 264         * Makefile.in: Regenerate.
 265         * m32r-asm.c: Regenerate.
 266         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 267         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 268
 269 2005-07-05  Nick Clifton  <nickc@redhat.com>
 270
 271         * iq2000-asm.c: Regenerate.
 272         * ms1-asm.c: Regenerate.
 273
 274 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 275
 276         * i386-dis.c (SVME_Fixup): New.
 277         (grps): Use it for the lidt entry.
 278         (PNI_Fixup): Call OP_M rather than OP_E.
 279         (INVLPG_Fixup): Likewise.
 280
 281 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 282
 283         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 284
 285 2005-07-01  Nick Clifton  <nickc@redhat.com>
 286
 287         * a29k-dis.c: Update to ISO C90 style function declarations and
 288         fix formatting.
 289         * alpha-opc.c: Likewise.
 290         * arc-dis.c: Likewise.
 291         * arc-opc.c: Likewise.
 292         * avr-dis.c: Likewise.
 293         * cgen-asm.in: Likewise.
 294         * cgen-dis.in: Likewise.
 295         * cgen-ibld.in: Likewise.
 296         * cgen-opc.c: Likewise.
 297         * cris-dis.c: Likewise.
 298         * d10v-dis.c: Likewise.
 299         * d30v-dis.c: Likewise.
 300         * d30v-opc.c: Likewise.
 301         * dis-buf.c: Likewise.
 302         * dlx-dis.c: Likewise.
 303         * h8300-dis.c: Likewise.
 304         * h8500-dis.c: Likewise.
 305         * hppa-dis.c: Likewise.
 306         * i370-dis.c: Likewise.
 307         * i370-opc.c: Likewise.
 308         * m10200-dis.c: Likewise.
 309         * m10300-dis.c: Likewise.
 310         * m68k-dis.c: Likewise.
 311         * m88k-dis.c: Likewise.
 312         * mips-dis.c: Likewise.
 313         * mmix-dis.c: Likewise.
 314         * msp430-dis.c: Likewise.
 315         * ns32k-dis.c: Likewise.
 316         * or32-dis.c: Likewise.
 317         * or32-opc.c: Likewise.
 318         * pdp11-dis.c: Likewise.
 319         * pj-dis.c: Likewise.
 320         * s390-dis.c: Likewise.
 321         * sh-dis.c: Likewise.
 322         * sh64-dis.c: Likewise.
 323         * sparc-dis.c: Likewise.
 324         * sparc-opc.c: Likewise.
 325         * sysdep.h: Likewise.
 326         * tic30-dis.c: Likewise.
 327         * tic4x-dis.c: Likewise.
 328         * tic80-dis.c: Likewise.
 329         * v850-dis.c: Likewise.
 330         * v850-opc.c: Likewise.
 331         * vax-dis.c: Likewise.
 332         * w65-dis.c: Likewise.
 333         * z8kgen.c: Likewise.
 334
 335         * fr30-*: Regenerate.
 336         * frv-*: Regenerate.
 337         * ip2k-*: Regenerate.
 338         * iq2000-*: Regenerate.
 339         * m32r-*: Regenerate.
 340         * ms1-*: Regenerate.
 341         * openrisc-*: Regenerate.
 342         * xstormy16-*: Regenerate.
 343
 344 2005-06-23  Ben Elliston  <bje@gnu.org>
 345
 346         * m68k-dis.c: Use ISC C90.
 347         * m68k-opc.c: Formatting fixes.
 348
 349 2005-06-16  David Ung  <davidu@mips.com>
 350
 351         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 352         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 353
 354 2005-06-15  Dave Brolley  <brolley@redhat.com>
 355
 356         Contribute Morpho ms1 on behalf of Red Hat
 357         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 358         ms1-opc.h: New files, Morpho ms1 target.
 359
 360         2004-05-14  Stan Cox  <scox@redhat.com>
 361
 362         * disassemble.c (ARCH_ms1): Define.
 363         (disassembler): Handle bfd_arch_ms1
 364
 365         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 366
 367         * Makefile.am, Makefile.in: Add ms1 target.
 368         * configure.in: Ditto.
 369
 370 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 371
 372         * arm-opc.h: Delete; fold contents into ...
 373         * arm-dis.c: ... here.  Move includes of internal COFF headers
 374         next to includes of internal ELF headers.
 375         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 376         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 377         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 378         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 379         (iwmmxt_wwnames, iwmmxt_wwssnames):
 380         Make const.
 381         (regnames): Remove iWMMXt coprocessor register sets.
 382         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 383         (get_arm_regnames): Adjust fourth argument to match above changes.
 384         (set_iwmmxt_regnames): Delete.
 385         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 386         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 387         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 388         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 389         ISO syntax for function pointer calls.
 390
 391 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 392
 393         * arm-dis.c: Split up the comments describing the format codes, so
 394         that the ARM and 16-bit Thumb opcode tables each have comments
 395         preceding them that describe all the codes, and only the codes,
 396         valid in those tables.  (32-bit Thumb table is already like this.)
 397         Reorder the lists in all three comments to match the order in
 398         which the codes are implemented.
 399         Remove all forward declarations of static functions.  Convert all
 400         function definitions to ISO C format.
 401         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 402         Return nothing.
 403         (print_insn_thumb16): Remove unused case 'I'.
 404         (print_insn): Update for changed calling convention of subroutines.
 405
 406 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 407
 408         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 409         hex (but retain it being displayed as signed). Remove redundant
 410         checks. Add handling of displacements for 16-bit addressing in Intel
 411         mode.
 412
 413 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 414
 415         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 416         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 417         masking of 'rm' in 16-bit memory address handling.
 418
 419 2005-05-19  Anton Blanchard  <anton@samba.org>
 420
 421         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 422         (print_ppc_disassembler_options): Document it.
 423         * ppc-opc.c (SVC_LEV): Define.
 424         (LEV): Allow optional operand.
 425         (POWER5): Define.
 426         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 427         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 428
 429 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 430
 431         * Makefile.in:  Regenerate.
 432
 433 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 434
 435         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 436         instructions.  Adjust disassembly of some opcodes to match
 437         unified syntax.
 438         (thumb32_opcodes): New table.
 439         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 440         two-halfword branches here.
 441         (print_insn_thumb32): New function.
 442         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 443         and print_insn_thumb32.  Be consistent about order of
 444         halfwords when printing 32-bit instructions.
 445
 446 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 447
 448         PR 843
 449         * i386-dis.c (branch_v_mode): New.
 450         (indirEv): Use branch_v_mode instead of v_mode.
 451         (OP_E): Handle branch_v_mode.
 452
 453 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 454
 455         * d10v-dis.c (dis_2_short): Support 64bit host.
 456
 457 2005-05-07  Nick Clifton  <nickc@redhat.com>
 458
 459         * po/nl.po: Updated translation.
 460
 461 2005-05-07  Nick Clifton  <nickc@redhat.com>
 462
 463         * Update the address and phone number of the FSF organization in
 464         the GPL notices in the following files:
 465         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 466         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 467         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 468         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 469         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 470         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 471         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 472         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 473         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 474         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 475         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 476         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 477         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 478         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 479         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 480         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 481         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 482         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 483         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 484         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 485         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 486         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 487         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 488         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 489         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 490         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 491         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 492         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 493         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 494         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 495         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 496         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 497         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 498
 499 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 500
 501         * ia64-opc.c: Include sysdep.h before libiberty.h.
 502
 503 2005-05-05  Nick Clifton  <nickc@redhat.com>
 504
 505         * configure.in (ALL_LINGUAS): Add vi.
 506         * configure: Regenerate.
 507         * po/vi.po: New.
 508
 509 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 510
 511         * configure.in: Fix the check for basename declaration.
 512         * configure: Regenerate.
 513
 514 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 515
 516         * ppc-opc.c (RTO): Define.
 517         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 518         entries to suit PPC440.
 519
 520 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 521
 522         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 523         Add xcrypt-ctr.
 524
 525 2005-04-14  Nick Clifton  <nickc@redhat.com>
 526
 527         * po/fi.po: New translation: Finnish.
 528         * configure.in (ALL_LINGUAS): Add fi.
 529         * configure: Regenerate.
 530
 531 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 532
 533         * Makefile.am (NO_WERROR): Define.
 534         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 535         * Makefile.in: Regenerate.
 536         * aclocal.m4: Regenerate.
 537         * configure: Regenerate.
 538
 539 2005-04-04  Nick Clifton  <nickc@redhat.com>
 540
 541         * fr30-asm.c: Regenerate.
 542         * frv-asm.c: Regenerate.
 543         * iq2000-asm.c: Regenerate.
 544         * m32r-asm.c: Regenerate.
 545         * openrisc-asm.c: Regenerate.
 546
 547 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 548
 549         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 550         visible operands in Intel mode. The first operand of monitor is
 551         %rax in 64-bit mode.
 552
 553 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 554
 555         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 556         easier future additions.
 557
 558 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 559
 560         * configure.in: Check for basename.
 561         * configure: Regenerate.
 562         * config.in: Ditto.
 563
 564 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 565
 566         * i386-dis.c (SEG_Fixup): New.
 567         (Sv): New.
 568         (dis386): Use "Sv" for 0x8c and 0x8e.
 569
 570 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 571             Nick Clifton  <nickc@redhat.com>
 572
 573         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 574         function entry mask addresses.
 575         (entry_addr_occupied_slots): New variable: The number of occupied
 576         elements in entry_addr.
 577         (entry_addr_total_slots): New variable: The total number of
 578         elements in entry_addr.
 579         (parse_disassembler_options): New function.  Fills in the entry_addr
 580         array.
 581         (free_entry_array): New function.  Release the memory used by the
 582         entry addr array.  Suppressed because there is no way to call it.
 583         (is_function_entry): Check if a given address is a function's
 584         start address by looking at supplied entry mask addresses and
 585         symbol information, if available.
 586         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 587
 588 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 589
 590         * cris-dis.c (print_with_operands): Use ~31L for long instead
 591         of ~31.
 592
 593 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 594
 595         * mmix-opc.c (O): Revert the last change.
 596         (Z): Likewise.
 597
 598 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 599
 600         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 601         (Z): Likewise.
 602
 603 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 604
 605         * mmix-opc.c (O, Z): Force expression as unsigned long.
 606
 607 2005-03-18  Nick Clifton  <nickc@redhat.com>
 608
 609         * ip2k-asm.c: Regenerate.
 610         * op/opcodes.pot: Regenerate.
 611
 612 2005-03-16  Nick Clifton  <nickc@redhat.com>
 613             Ben Elliston  <bje@au.ibm.com>
 614
 615         * configure.in (werror): New switch: Add -Werror to the
 616         compiler command line.  Enabled by default.  Disable via
 617         --disable-werror.
 618         * configure: Regenerate.
 619
 620 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 621
 622         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 623         BOOKE.
 624
 625 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 626
 627         * po/es.po: Commit new Spanish translation.
 628
 629         * po/fr.po: Commit new French translation.
 630
 631 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 632
 633         * vax-dis.c: Fix spelling error
 634         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 635         of just "Entry mask: < r1 ... >"
 636
 637 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 638
 639         * arm-dis.c (arm_opcodes): Document %E and %V.
 640         Add entries for v6T2 ARM instructions:
 641         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 642         (print_insn_arm): Add support for %E and %V.
 643         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 644
 645 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 646             Alan Modra  <amodra@bigpond.net.au>
 647
 648         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 649         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 650         (SPRG_MASK): Delete.
 651         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 652         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 653         mfsprg4..7 after msprg and consolidate.
 654
 655 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 656
 657         * vax-dis.c (entry_mask_bit): New array.
 658         (print_insn_vax): Decode function entry mask.
 659
 660 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 661
 662         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 663
 664 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 665
 666         * po/opcodes.pot: Regenerate.
 667
 668 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 669
 670         * arc-dis.c (a4_decoding_class): New enum.
 671         (dsmOneArcInst): Use the enum values for the decoding class.
 672         Remove redundant case in the switch for decodingClass value 11.
 673
 674 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 675
 676         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 677         accesses.
 678         (OP_C): Consider lock prefix in non-64-bit modes.
 679
 680 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 681
 682         * cris-dis.c (format_hex): Remove ineffective warning fix.
 683         * crx-dis.c (make_instruction): Warning fix.
 684         * frv-asm.c: Regenerate.
 685
 686 2005-02-23  Nick Clifton  <nickc@redhat.com>
 687
 688         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 689         read_memory.
 690
 691         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 692
 693         * crx-dis.c (make_instruction): Move argument structure into inner
 694         scope and ensure that all of its fields are initialised before
 695         they are used.
 696
 697         * fr30-asm.c: Regenerate.
 698         * fr30-dis.c: Regenerate.
 699         * frv-asm.c: Regenerate.
 700         * frv-dis.c: Regenerate.
 701         * ip2k-asm.c: Regenerate.
 702         * ip2k-dis.c: Regenerate.
 703         * iq2000-asm.c: Regenerate.
 704         * iq2000-dis.c: Regenerate.
 705         * m32r-asm.c: Regenerate.
 706         * m32r-dis.c: Regenerate.
 707         * openrisc-asm.c: Regenerate.
 708         * openrisc-dis.c: Regenerate.
 709         * xstormy16-asm.c: Regenerate.
 710         * xstormy16-dis.c: Regenerate.
 711
 712 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 713
 714         * arc-ext.c: Warning fixes.
 715         * arc-ext.h: Likewise.
 716         * cgen-opc.c: Likewise.
 717         * ia64-gen.c: Likewise.
 718         * maxq-dis.c: Likewise.
 719         * ns32k-dis.c: Likewise.
 720         * w65-dis.c: Likewise.
 721         * ia64-asmtab.c: Regenerate.
 722
 723 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 724
 725         * fr30-desc.c: Regenerate.
 726         * fr30-desc.h: Regenerate.
 727         * fr30-opc.c: Regenerate.
 728         * fr30-opc.h: Regenerate.
 729         * frv-desc.c: Regenerate.
 730         * frv-desc.h: Regenerate.
 731         * frv-opc.c: Regenerate.
 732         * frv-opc.h: Regenerate.
 733         * ip2k-desc.c: Regenerate.
 734         * ip2k-desc.h: Regenerate.
 735         * ip2k-opc.c: Regenerate.
 736         * ip2k-opc.h: Regenerate.
 737         * iq2000-desc.c: Regenerate.
 738         * iq2000-desc.h: Regenerate.
 739         * iq2000-opc.c: Regenerate.
 740         * iq2000-opc.h: Regenerate.
 741         * m32r-desc.c: Regenerate.
 742         * m32r-desc.h: Regenerate.
 743         * m32r-opc.c: Regenerate.
 744         * m32r-opc.h: Regenerate.
 745         * m32r-opinst.c: Regenerate.
 746         * openrisc-desc.c: Regenerate.
 747         * openrisc-desc.h: Regenerate.
 748         * openrisc-opc.c: Regenerate.
 749         * openrisc-opc.h: Regenerate.
 750         * xstormy16-desc.c: Regenerate.
 751         * xstormy16-desc.h: Regenerate.
 752         * xstormy16-opc.c: Regenerate.
 753         * xstormy16-opc.h: Regenerate.
 754
 755 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 756
 757         * Makefile.am: Run "make dep-am"
 758         * Makefile.in: Regenerate.
 759
 760 2005-02-15  Nick Clifton  <nickc@redhat.com>
 761
 762         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 763         compile time warnings.
 764         (print_keyword): Likewise.
 765         (default_print_insn): Likewise.
 766
 767         * fr30-desc.c: Regenerated.
 768         * fr30-desc.h: Regenerated.
 769         * fr30-dis.c: Regenerated.
 770         * fr30-opc.c: Regenerated.
 771         * fr30-opc.h: Regenerated.
 772         * frv-desc.c: Regenerated.
 773         * frv-dis.c: Regenerated.
 774         * frv-opc.c: Regenerated.
 775         * ip2k-asm.c: Regenerated.
 776         * ip2k-desc.c: Regenerated.
 777         * ip2k-desc.h: Regenerated.
 778         * ip2k-dis.c: Regenerated.
 779         * ip2k-opc.c: Regenerated.
 780         * ip2k-opc.h: Regenerated.
 781         * iq2000-desc.c: Regenerated.
 782         * iq2000-dis.c: Regenerated.
 783         * iq2000-opc.c: Regenerated.
 784         * m32r-asm.c: Regenerated.
 785         * m32r-desc.c: Regenerated.
 786         * m32r-desc.h: Regenerated.
 787         * m32r-dis.c: Regenerated.
 788         * m32r-opc.c: Regenerated.
 789         * m32r-opc.h: Regenerated.
 790         * m32r-opinst.c: Regenerated.
 791         * openrisc-desc.c: Regenerated.
 792         * openrisc-desc.h: Regenerated.
 793         * openrisc-dis.c: Regenerated.
 794         * openrisc-opc.c: Regenerated.
 795         * openrisc-opc.h: Regenerated.
 796         * xstormy16-desc.c: Regenerated.
 797         * xstormy16-desc.h: Regenerated.
 798         * xstormy16-dis.c: Regenerated.
 799         * xstormy16-opc.c: Regenerated.
 800         * xstormy16-opc.h: Regenerated.
 801
 802 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 803
 804         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 805         address.
 806
 807 2005-02-11  Nick Clifton  <nickc@redhat.com>
 808
 809         * iq2000-asm.c: Regenerate.
 810
 811         * frv-dis.c: Regenerate.
 812
 813 2005-02-07  Jim Blandy  <jimb@redhat.com>
 814
 815         * Makefile.am (CGEN): Load guile.scm before calling the main
 816         application script.
 817         * Makefile.in: Regenerated.
 818         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 819         Simply pass the cgen-opc.scm path to ${cgen} as its first
 820         argument; ${cgen} itself now contains the '-s', or whatever is
 821         appropriate for the Scheme being used.
 822
 823 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 824
 825         * configure: Regenerate to track ../gettext.m4.
 826
 827 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 828
 829         * ia64-gen.c (NELEMS): Define.
 830         (shrink): Generate alias with missing second predicate register when
 831         opcode has two outputs and these are both predicates.
 832         * ia64-opc-i.c (FULL17): Define.
 833         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 834         here to generate output template.
 835         (TBITCM, TNATCM): Undefine after use.
 836         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 837         first input. Add ld16 aliases without ar.csd as second output. Add
 838         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 839         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 840         ar.ccv as third/fourth inputs. Consolidate through...
 841         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 842         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 843         * ia64-asmtab.c: Regenerate.
 844
 845 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 846
 847         * configure: Regenerate to track ../gettext.m4 change.
 848
 849 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 850
 851         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 852         * frv-asm.c: Rebuilt.
 853         * frv-desc.c: Rebuilt.
 854         * frv-desc.h: Rebuilt.
 855         * frv-dis.c: Rebuilt.
 856         * frv-ibld.c: Rebuilt.
 857         * frv-opc.c: Rebuilt.
 858         * frv-opc.h: Rebuilt.
 859
 860 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 861
 862         * configure: Regenerate, ../gettext.m4 was updated.
 863
 864 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 865
 866         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 867         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 868         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 869         * mips-dis.c: Ditto.
 870
 871 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 872
 873         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 874
 875 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 876
 877         * mips-dis.c (no_aliases): New disassembly option flag.
 878         (set_default_mips_dis_options): Init no_aliases to zero.
 879         (parse_mips_dis_option): Handle no-aliases option.
 880         (print_insn_mips): Ignore table entries that are aliases
 881         if no_aliases is set.
 882         (print_insn_mips16): Ditto.
 883         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 884         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 885         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 886         * mips16-opc.c (mips16_opcodes): Ditto.
 887
 888 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 889
 890         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 891         (inheritance diagram): Add missing edge.
 892         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 893         easier for the testsuite.
 894         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 895         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 896         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 897         arch_sh2a_or_sh4_up child.
 898         (sh_table): Do renaming as above.
 899         Correct comment for ldc.l for gas testsuite to read.
 900         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 901         Correct comments for movy.w and movy.l for gas testsuite to read.
 902         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 903
 904 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 905
 906         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 907
 908 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 909
 910         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 911
 912 2005-01-10  Andreas Schwab  <schwab@suse.de>
 913
 914         * disassemble.c (disassemble_init_for_target) <case
 915         bfd_arch_ia64>: Set skip_zeroes to 16.
 916         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 917
 918 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 919
 920         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 921
 922 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 923
 924         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 925         memory references. Convert avr_operand() to C90 formatting.
 926
 927 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 928
 929         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 930
 931 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 932
 933         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 934         (no_op_insn): Initialize array with instructions that have no
 935         operands.
 936         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 937
 938 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 939
 940         * arm-dis.c: Correct top-level comment.
 941
 942 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 943
 944         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 945         architecuture defining the insn.
 946         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 947         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 948         field.
 949         Also include opcode/arm.h.
 950         * Makefile.am (arm-dis.lo): Update dependency list.
 951         * Makefile.in: Regenerate.
 952
 953 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 954
 955         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 956         reflect the change to the short immediate syntax.
 957
 958 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 959
 960         * or32-opc.c (debug): Warning fix.
 961         * po/POTFILES.in: Regenerate.
 962
 963         * maxq-dis.c: Formatting.
 964         (print_insn): Warning fix.
 965
 966 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 967
 968         * arm-dis.c (WORD_ADDRESS): Define.
 969         (print_insn): Use it.  Correct big-endian end-of-section handling.
 970
 971 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 972             Vineet Sharma      <vineets@noida.hcltech.com>
 973
 974         * maxq-dis.c: New file.
 975         * disassemble.c (ARCH_maxq): Define.
 976         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 977         instructions..
 978         * configure.in: Add case for bfd_maxq_arch.
 979         * configure: Regenerate.
 980         * Makefile.am: Add support for maxq-dis.c
 981         * Makefile.in: Regenerate.
 982         * aclocal.m4: Regenerate.
 983
 984 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 985
 986         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 987         mode.
 988         * crx-dis.c: Likewise.
 989
 990 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 991
 992         Generally, handle CRISv32.
 993         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 994         (struct cris_disasm_data): New type.
 995         (format_reg, format_hex, cris_constraint, print_flags)
 996         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 997         callers changed.
 998         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 999         (print_insn_crisv32_without_register_prefix)
1000         (print_insn_crisv10_v32_with_register_prefix)
1001         (print_insn_crisv10_v32_without_register_prefix)
1002         (cris_parse_disassembler_options): New functions.
1003         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1004         parameter.  All callers changed.
1005         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1006         failure.
1007         (cris_constraint) <case 'Y', 'U'>: New cases.
1008         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1009         for constraint 'n'.
1010         (print_with_operands) <case 'Y'>: New case.
1011         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1012         <case 'N', 'Y', 'Q'>: New cases.
1013         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1014         (print_insn_cris_with_register_prefix)
1015         (print_insn_cris_without_register_prefix): Call
1016         cris_parse_disassembler_options.
1017         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1018         for CRISv32 and the size of immediate operands.  New v32-only
1019         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1020         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1021         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1022         Change brp to be v3..v10.
1023         (cris_support_regs): New vector.
1024         (cris_opcodes): Update head comment.  New format characters '[',
1025         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1026         Add new opcodes for v32 and adjust existing opcodes to accommodate
1027         differences to earlier variants.
1028         (cris_cond15s): New vector.
1029
1030 2004-11-04 Jan Beulich <jbeulich@novell.com>
1031
1032         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1033         (indirEb): Remove.
1034         (Mp): Use f_mode rather than none at all.
1035         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1036         replaces what previously was x_mode; x_mode now means 128-bit SSE
1037         operands.
1038         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1039         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1040         pinsrw's second operand is Edqw.
1041         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1042         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1043         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1044         mode when an operand size override is present or always suffixing.
1045         More instructions will need to be added to this group.
1046         (putop): Handle new macro chars 'C' (short/long suffix selector),
1047         'I' (Intel mode override for following macro char), and 'J' (for
1048         adding the 'l' prefix to far branches in AT&T mode). When an
1049         alternative was specified in the template, honor macro character when
1050         specified for Intel mode.
1051         (OP_E): Handle new *_mode values. Correct pointer specifications for
1052         memory operands. Consolidate output of index register.
1053         (OP_G): Handle new *_mode values.
1054         (OP_I): Handle const_1_mode.
1055         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1056         respective opcode prefix bits have been consumed.
1057         (OP_EM, OP_EX): Provide some default handling for generating pointer
1058         specifications.
1059
1060 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1061
1062         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1063         COP_INST macro.
1064
1065 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1066
1067         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1068         (getregliststring): Support HI/LO and user registers.
1069         * crx-opc.c (crx_instruction): Update data structure according to the
1070         rearrangement done in CRX opcode header file.
1071         (crx_regtab):  Likewise.
1072         (crx_optab):  Likewise.
1073         (crx_instruction): Reorder load/stor instructions, remove unsupported
1074         formats.
1075         support new Co-Processor instruction 'cpi'.
1076
1077 2004-10-27  Nick Clifton  <nickc@redhat.com>
1078
1079         * opcodes/iq2000-asm.c: Regenerate.
1080         * opcodes/iq2000-desc.c: Regenerate.
1081         * opcodes/iq2000-desc.h: Regenerate.
1082         * opcodes/iq2000-dis.c: Regenerate.
1083         * opcodes/iq2000-ibld.c: Regenerate.
1084         * opcodes/iq2000-opc.c: Regenerate.
1085         * opcodes/iq2000-opc.h: Regenerate.
1086
1087 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1088
1089         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1090         us4, us5 (respectively).
1091         Remove unsupported 'popa' instruction.
1092         Reverse operands order in store co-processor instructions.
1093
1094 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1095
1096         * Makefile.am: Run "make dep-am"
1097         * Makefile.in: Regenerate.
1098
1099 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1100
1101         * xtensa-dis.c: Use ISO C90 formatting.
1102
1103 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1104
1105         * ppc-opc.c: Revert 2004-09-09 change.
1106
1107 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1108
1109         * xtensa-dis.c (state_names): Delete.
1110         (fetch_data): Use xtensa_isa_maxlength.
1111         (print_xtensa_operand): Replace operand parameter with opcode/operand
1112         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1113         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1114         instruction bundles.  Use xmalloc instead of malloc.
1115
1116 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1117
1118         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1119         initializers.
1120
1121 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1122
1123         * crx-opc.c (crx_instruction): Support Co-processor insns.
1124         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1125         (getregliststring): Change function to use the above enum.
1126         (print_arg): Handle CO-Processor insns.
1127         (crx_cinvs): Add 'b' option to invalidate the branch-target
1128         cache.
1129
1130 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1131
1132         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1133         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1134         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1135         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1136         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1137
1138 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1139
1140         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1141         rather than add it.
1142
1143 2004-09-30  Paul Brook  <paul@codesourcery.com>
1144
1145         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1146         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1147
1148 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1149
1150         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1151         (CONFIG_STATUS_DEPENDENCIES): New.
1152         (Makefile): Removed.
1153         (config.status): Likewise.
1154         * Makefile.in: Regenerated.
1155
1156 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1157
1158         * Makefile.am: Run "make dep-am".
1159         * Makefile.in: Regenerate.
1160         * aclocal.m4: Regenerate.
1161         * configure: Regenerate.
1162         * po/POTFILES.in: Regenerate.
1163         * po/opcodes.pot: Regenerate.
1164
1165 2004-09-11  Andreas Schwab  <schwab@suse.de>
1166
1167         * configure: Rebuild.
1168
1169 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1170
1171         * ppc-opc.c (L): Make this field not optional.
1172
1173 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1174
1175         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1176         Fix parameter to 'm[t|f]csr' insns.
1177
1178 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1179
1180         * configure.in: Autoupdate to autoconf 2.59.
1181         * aclocal.m4: Rebuild with aclocal 1.4p6.
1182         * configure: Rebuild with autoconf 2.59.
1183         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1184         bfd changes for autoconf 2.59 on the way).
1185         * config.in: Rebuild with autoheader 2.59.
1186
1187 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1188
1189         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1190
1191 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1192
1193         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1194         (GRPPADLCK2): New define.
1195         (twobyte_has_modrm): True for 0xA6.
1196         (grps): GRPPADLCK2 for opcode 0xA6.
1197
1198 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1199
1200         Introduce SH2a support.
1201         * sh-opc.h (arch_sh2a_base): Renumber.
1202         (arch_sh2a_nofpu_base): Remove.
1203         (arch_sh_base_mask): Adjust.
1204         (arch_opann_mask): New.
1205         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1206         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1207         (sh_table): Adjust whitespace.
1208         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1209         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1210         instruction list throughout.
1211         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1212         of arch_sh2a in instruction list throughout.
1213         (arch_sh2e_up): Accomodate above changes.
1214         (arch_sh2_up): Ditto.
1215         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1216         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1217         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1218         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1219         * sh-opc.h (arch_sh2a_nofpu): New.
1220         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1221         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1222         instruction.
1223         2004-01-20  DJ Delorie  <dj@redhat.com>
1224         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1225         2003-12-29  DJ Delorie  <dj@redhat.com>
1226         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1227         sh_opcode_info, sh_table): Add sh2a support.
1228         (arch_op32): New, to tag 32-bit opcodes.
1229         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1230         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1231         * sh-opc.h (arch_sh2a): Add.
1232         * sh-dis.c (arch_sh2a): Handle.
1233         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1234
1235 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1236
1237         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1238
1239 2004-07-22  Nick Clifton  <nickc@redhat.com>
1240
1241         PR/280
1242         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1243         insns - this is done by objdump itself.
1244         * h8500-dis.c (print_insn_h8500): Likewise.
1245
1246 2004-07-21  Jan Beulich <jbeulich@novell.com>
1247
1248         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1249         regardless of address size prefix in effect.
1250         (ptr_reg): Size or address registers does not depend on rex64, but
1251         on the presence of an address size override.
1252         (OP_MMX): Use rex.x only for xmm registers.
1253         (OP_EM): Use rex.z only for xmm registers.
1254
1255 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1256
1257         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1258         move/branch operations to the bottom so that VR5400 multimedia
1259         instructions take precedence in disassembly.
1260
1261 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1262
1263         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1264         ISA-specific "break" encoding.
1265
1266 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1267
1268         * arm-opc.h: Fix typo in comment.
1269
1270 2004-07-11  Andreas Schwab  <schwab@suse.de>
1271
1272         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1273
1274 2004-07-09  Andreas Schwab  <schwab@suse.de>
1275
1276         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1277
1278 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1279
1280         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1281         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1282         (crx-dis.lo): New target.
1283         (crx-opc.lo): Likewise.
1284         * Makefile.in: Regenerate.
1285         * configure.in: Handle bfd_crx_arch.
1286         * configure: Regenerate.
1287         * crx-dis.c: New file.
1288         * crx-opc.c: New file.
1289         * disassemble.c (ARCH_crx): Define.
1290         (disassembler): Handle ARCH_crx.
1291
1292 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1293
1294         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1295         * ia64-asmtab.c: Regnerate.
1296
1297 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1298
1299         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1300         (extract_fxm): Don't test dialect.
1301         (XFXFXM_MASK): Include the power4 bit.
1302         (XFXM): Add p4 param.
1303         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1304
1305 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1306
1307         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1308         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1309
1310 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1311
1312         * ppc-opc.c (BH, XLBH_MASK): Define.
1313         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1314
1315 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1316
1317         * i386-dis.c (x_mode): Comment.
1318         (two_source_ops): File scope.
1319         (float_mem): Correct fisttpll and fistpll.
1320         (float_mem_mode): New table.
1321         (dofloat): Use it.
1322         (OP_E): Correct intel mode PTR output.
1323         (ptr_reg): Use open_char and close_char.
1324         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1325         operands.  Set two_source_ops.
1326
1327 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1328
1329         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1330         instead of _raw_size.
1331
1332 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1333
1334         * ia64-gen.c (in_iclass): Handle more postinc st
1335         and ld variants.
1336         * ia64-asmtab.c: Rebuilt.
1337
1338 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1339
1340         * s390-opc.txt: Correct architecture mask for some opcodes.
1341         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1342         in the esa mode as well.
1343
1344 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1345
1346         * sh-dis.c (target_arch): Make unsigned.
1347         (print_insn_sh): Replace (most of) switch with a call to
1348         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1349         * sh-opc.h: Redefine architecture flags values.
1350         Add sh3-nommu architecture.
1351         Reorganise <arch>_up macros so they make more visual sense.
1352         (SH_MERGE_ARCH_SET): Define new macro.
1353         (SH_VALID_BASE_ARCH_SET): Likewise.
1354         (SH_VALID_MMU_ARCH_SET): Likewise.
1355         (SH_VALID_CO_ARCH_SET): Likewise.
1356         (SH_VALID_ARCH_SET): Likewise.
1357         (SH_MERGE_ARCH_SET_VALID): Likewise.
1358         (SH_ARCH_SET_HAS_FPU): Likewise.
1359         (SH_ARCH_SET_HAS_DSP): Likewise.
1360         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1361         (sh_get_arch_from_bfd_mach): Add prototype.
1362         (sh_get_arch_up_from_bfd_mach): Likewise.
1363         (sh_get_bfd_mach_from_arch_set): Likewise.
1364         (sh_merge_bfd_arc): Likewise.
1365
1366 2004-05-24  Peter Barada  <peter@the-baradas.com>
1367
1368         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1369         into new match_insn_m68k function.  Loop over canidate
1370         matches and select first that completely matches.
1371         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1372         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1373         to verify addressing for MAC/EMAC.
1374         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1375         reigster halves since 'fpu' and 'spl' look misleading.
1376         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1377         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1378         first, tighten up match masks.
1379         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1380         'size' from special case code in print_insn_m68k to
1381         determine decode size of insns.
1382
1383 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1384
1385         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1386         well as when -mpower4.
1387
1388 2004-05-13  Nick Clifton  <nickc@redhat.com>
1389
1390         * po/fr.po: Updated French translation.
1391
1392 2004-05-05  Peter Barada  <peter@the-baradas.com>
1393
1394         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1395         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1396         * m68k-op.c: Switch from ColdFire chips to core variants.
1397
1398 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1399
1400         PR 147.
1401         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1402
1403 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1404
1405         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1406         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1407
1408 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1409
1410         * sh-dis.c (print_insn_sh): Print the value in constant pool
1411         as a symbol if it looks like a symbol.
1412
1413 2004-04-22  Peter Barada <peter@the-baradas.com>
1414
1415         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1416         appropriate ColdFire architectures.
1417         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1418         mask addressing.
1419         Add EMAC instructions, fix MAC instructions. Remove
1420         macmw/macml/msacmw/msacml instructions since mask addressing now
1421         supported.
1422
1423 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1424
1425         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1426         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1427         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1428         macro.  Adjust all users.
1429
1430 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1431
1432         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1433         separately.
1434
1435 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1436
1437         * m32r-asm.c: Regenerate.
1438
1439 2004-03-29  Stan Shebs  <shebs@apple.com>
1440
1441         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1442         used.
1443
1444 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1445
1446         * aclocal.m4: Regenerate.
1447         * config.in: Regenerate.
1448         * configure: Regenerate.
1449         * po/POTFILES.in: Regenerate.
1450         * po/opcodes.pot: Regenerate.
1451
1452 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1453
1454         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1455         PPC_OPERANDS_GPR_0.
1456         * ppc-opc.c (RA0): Define.
1457         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1458         (RAOPT): Rename from RAO.  Update all uses.
1459         (powerpc_opcodes): Use RA0 as appropriate.
1460
1461 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1462
1463         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1464
1465 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1466
1467         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1468
1469 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1470
1471         * i386-dis.c (GRPPLOCK): Delete.
1472         (grps): Delete GRPPLOCK entry.
1473
1474 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1475
1476         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1477         (M, Mp): Use OP_M.
1478         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1479         (GRPPADLCK): Define.
1480         (dis386): Use NOP_Fixup on "nop".
1481         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1482         (twobyte_has_modrm): Set for 0xa7.
1483         (padlock_table): Delete.  Move to..
1484         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1485         and clflush.
1486         (print_insn): Revert PADLOCK_SPECIAL code.
1487         (OP_E): Delete sfence, lfence, mfence checks.
1488
1489 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1490
1491         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1492         (INVLPG_Fixup): New function.
1493         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1494
1495 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1496
1497         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1498         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1499         (padlock_table): New struct with PadLock instructions.
1500         (print_insn): Handle PADLOCK_SPECIAL.
1501
1502 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1503
1504         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1505         (OP_E): Twiddle clflush to sfence here.
1506
1507 2004-03-08  Nick Clifton  <nickc@redhat.com>
1508
1509         * po/de.po: Updated German translation.
1510
1511 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1512
1513         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1514         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1515         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1516         accordingly.
1517
1518 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1519
1520         * frv-asm.c: Regenerate.
1521         * frv-desc.c: Regenerate.
1522         * frv-desc.h: Regenerate.
1523         * frv-dis.c: Regenerate.
1524         * frv-ibld.c: Regenerate.
1525         * frv-opc.c: Regenerate.
1526         * frv-opc.h: Regenerate.
1527
1528 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1529
1530         * frv-desc.c, frv-opc.c: Regenerate.
1531
1532 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1533
1534         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1535
1536 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1537
1538         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1539         Also correct mistake in the comment.
1540
1541 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1542
1543         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1544         ensure that double registers have even numbers.
1545         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1546         that reserved instruction 0xfffd does not decode the same
1547         as 0xfdfd (ftrv).
1548         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1549         REG_N refers to a double register.
1550         Add REG_N_B01 nibble type and use it instead of REG_NM
1551         in ftrv.
1552         Adjust the bit patterns in a few comments.
1553
1554 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1555
1556         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1557
1558 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1559
1560         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1561
1562 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1563
1564         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1565
1566 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1567
1568         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1569         mtivor32, mtivor33, mtivor34.
1570
1571 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1572
1573         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1574
1575 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1576
1577         * arm-opc.h Maverick accumulator register opcode fixes.
1578
1579 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1580
1581         * m32r-dis.c: Regenerate.
1582
1583 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1584
1585         * sh-opc.h (sh_table): "fsrra", not "fssra".
1586
1587 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1588
1589         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1590         contraints.
1591
1592 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1593
1594         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1595
1596 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1597
1598         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1599         1.  Don't print scale factor on AT&T mode when index missing.
1600
1601 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1602
1603         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1604         when loaded into XR registers.
1605
1606 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1607
1608         * frv-desc.h: Regenerate.
1609         * frv-desc.c: Regenerate.
1610         * frv-opc.c: Regenerate.
1611
1612 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1613
1614         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1615
1616 2004-01-09  Paul Brook  <paul@codesourcery.com>
1617
1618         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1619         specific opcodes.
1620
1621 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1622
1623         * Makefile.am (libopcodes_la_DEPENDENCIES)
1624         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1625         comment about the problem.
1626         * Makefile.in: Regenerate.
1627
1628 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1629
1630         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1631         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1632         cut&paste errors in shifting/truncating numerical operands.
1633         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1634         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1635         (parse_uslo16): Likewise.
1636         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1637         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1638         (parse_s12): Likewise.
1639         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1640         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1641         (parse_uslo16): Likewise.
1642         (parse_uhi16): Parse gothi and gotfuncdeschi.
1643         (parse_d12): Parse got12 and gotfuncdesc12.
1644         (parse_s12): Likewise.
1645
1646 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1647
1648         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1649         instruction which looks similar to an 'rla' instruction.
1650
1651 For older changes see ChangeLog-0203
1652 \f
1653 Local Variables:
1654 mode: change-log
1655 left-margin: 8
1656 fill-column: 74
1657 version-control: never
1658 End: