opcodes/ChangeLog

   1 2010-10-18  Maciej W. Rozycki  <macro@linux-mips.org>
   2
   3         * mips-opc.c (mips_builtin_opcodes): Move M_LD_OB and M_SD_OB
   4         macros before their corresponding MIPS III hardware instructions.
   5
   6 2010-10-16  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         * i386-gen.c (cpu_flag_init): Add CpuNop to CPU_GENERIC64_FLAGS.
   9
  10         * i386-init.h: Regenerated.
  11
  12 2010-10-15  Mike Frysinger  <vapier@gentoo.org>
  13
  14         * bfin-dis.c (decode_dsp32alu_0): Call imm5d() for BYTEOP2M.
  15
  16 2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
  17
  18         * i386-opc.tbl: Remove CheckRegSize from movq.
  19         * i386-tbl.h: Regenerated.
  20
  21 2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
  22
  23         * i386-opc.tbl: Remove CheckRegSize from instructions with
  24         0, 1 or fixed operands.
  25         * i386-tbl.h: Regenerated.
  26
  27 2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
  28
  29         * i386-gen.c (opcode_modifiers): Add CheckRegSize.
  30
  31         * i386-opc.h (CheckRegSize): New.
  32         (i386_opcode_modifier): Add checkregsize.
  33
  34         * i386-opc.tbl: Add CheckRegSize to instructions which
  35         require register size check.
  36         * i386-tbl.h: Regenerated.
  37
  38 2010-10-12  Andreas Schwab  <schwab@linux-m68k.org>
  39
  40         * m68k-opc.c (m68k_opcodes): Move fnop before fbf.
  41
  42 2010-10-11  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  43
  44         * s390-opc.c: Make the instruction masks for the load/store on
  45         condition instructions to cover the condition code mask as well.
  46         * s390-opc.txt: lgoc -> locg and stgoc -> stocg.
  47
  48 2010-10-11  Jan Kratochvil  <jan.kratochvil@redhat.com>
  49             Jiang Jilin  <freephp@gmail.com>
  50
  51         * Makefile.am (libopcodes_a_SOURCES): New as empty.
  52         * Makefile.in: Regenerate.
  53
  54 2010-10-09  Matt Rice  <ratmice@gmail.com>
  55
  56         * fr30-desc.h: Regenerate.
  57         * frv-desc.h: Regenerate.
  58         * ip2k-desc.h: Regenerate.
  59         * iq2000-desc.h: Regenerate.
  60         * lm32-desc.h: Regenerate.
  61         * m32c-desc.h: Regenerate.
  62         * m32r-desc.h: Regenerate.
  63         * mep-desc.h: Regenerate.
  64         * mep-opc.c: Regenerate.
  65         * mt-desc.h: Regenerate.
  66         * openrisc-desc.h: Regenerate.
  67         * xc16x-desc.h: Regenerate.
  68         * xstormy16-desc.h: Regenerate.
  69
  70 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
  71
  72         Fix build with -DDEBUG=7
  73         * frv-opc.c: Regenerate.
  74         * or32-dis.c (DEBUG): Don't redefine.
  75         (find_bytes_big, or32_extract, or32_opcode_match, or32_print_register):
  76         Adapt DEBUG code to some type changes throughout.
  77         * or32-opc.c (or32_extract): Likewise.
  78
  79 2010-10-07  Bernd Schmidt  <bernds@codesourcery.com>
  80
  81         * tic6x-dis.c (print_insn_tic6x): Correct decoding of fstg field
  82         in SPKERNEL instructions.
  83
  84 2010-10-02  H.J. Lu  <hongjiu.lu@intel.com>
  85
  86         PR binutils/12076
  87         * i386-dis.c (RMAL): Remove duplicate.
  88
  89 2010-09-30  Pierre Muller  <muller@ics.u-strasbg.fr>
  90
  91         * s390-mkopc.c (main): Exit with error 1 if sscanf fails
  92         to parse all 6 parameters.
  93
  94 2010-09-28  Pierre Muller  <muller@ics.u-strasbg.fr>
  95
  96         * s390-mkopc.c (main): Change description array size to 80.
  97         Add maximum length of 79 to description parsing.
  98
  99 2010-09-27  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 100
 101         * configure: Regenerate.
 102
 103 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 104
 105         * s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
 106         (main): Recognize the new CPU string.
 107         * s390-opc.c: Add new instruction formats and masks.
 108         * s390-opc.txt: Add new z196 instructions.
 109
 110 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 111
 112         * s390-dis.c (print_insn_s390): Pick instruction with most
 113         specific mask.
 114         * s390-opc.c: Add unused bits to the insn mask.
 115         * s390-opc.txt: Reorder some instructions to prefer more recent
 116         versions.
 117
 118 2010-09-27  Tejas Belagod  <tejas.belagod@arm.com>
 119
 120         * arm_dis.c (print_insn_coprocessor): Apply off-by-alignment
 121         correction to unaligned PCs while printing comment.
 122
 123 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 124
 125         * arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
 126         (thumb32_opcodes): Likewise.
 127         (banked_regname): New function.
 128         (print_insn_arm): Add Virtualization Extensions support.
 129         (print_insn_thumb32): Likewise.
 130
 131 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 132
 133         * arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
 134         ARM state.
 135
 136 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 137
 138         * arm-dis.c (arm_opcodes): SMC implies Security Extensions.
 139         (thumb32_opcodes): Likewise.
 140
 141 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 142
 143         * arm-dis.c (arm_opcodes): Add support for pldw.
 144         (thumb32_opcodes): Likewise.
 145
 146 2010-09-22  Robin Getz  <robin.getz@analog.com>
 147
 148         * bfin-dis.c (fmtconst): Cast address to 32bits.
 149
 150 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 151
 152         * bfin-dis.c (decode_REGMV_0): Rewrite valid combo checks.
 153
 154 2010-09-22  Robin Getz  <robin.getz@analog.com>
 155
 156         * bfin-dis.c (decode_ProgCtrl_0): Check for parallel insns.
 157         Reject P6/P7 to TESTSET.
 158         (decode_PushPopReg_0): Check for parallel insns.  Reject pushing
 159         SP onto the stack.
 160         (decode_PushPopMultiple_0): Check for parallel insns.  Make sure
 161         P/D fields match all the time.
 162         (decode_CCflag_0): Check for parallel insns.  Verify x/y fields
 163         are 0 for accumulator compares.
 164         (decode_CC2stat_0): Check for parallel insns.  Reject CC<op>CC.
 165         (decode_CaCTRL_0, decode_ccMV_0, decode_CC2dreg_0, decode_BRCC_0,
 166         decode_UJUMP_0, decode_LOGI2op_0, decode_COMPI2opD_0,
 167         decode_COMPI2opP_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
 168         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
 169         decode_pseudoOChar_0, decode_pseudodbg_assert_0): Check for parallel
 170         insns.
 171         (decode_dagMODim_0): Verify br field for IREG ops.
 172         (decode_LDST_0): Reject preg load into same preg.
 173         (_print_insn_bfin): Handle returns for ILLEGAL decodes.
 174         (print_insn_bfin): Likewise.
 175
 176 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 177
 178         * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
 179
 180 2010-09-22  Robin Getz  <robin.getz@analog.com>
 181
 182         * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
 183
 184 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 185
 186         * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
 187
 188 2010-09-22  Robin Getz  <robin.getz@analog.com>
 189
 190         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
 191         register values greater than 8.
 192         (IS_RESERVEDREG, allreg, mostreg): New helpers.
 193         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
 194         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
 195         (decode_CC2dreg_0): Check valid CC register number.
 196
 197 2010-09-22  Robin Getz  <robin.getz@analog.com>
 198
 199         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
 200
 201 2010-09-22  Robin Getz  <robin.getz@analog.com>
 202
 203         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
 204         (reg_names): Likewise.
 205         (decode_statbits): Likewise; while reformatting to make manageable.
 206
 207 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 208
 209         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
 210         (decode_pseudoOChar_0): New function.
 211         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
 212
 213 2010-09-22  Robin Getz  <robin.getz@analog.com>
 214
 215         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
 216         LSHIFT instead of SHIFT.
 217
 218 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 219
 220         * bfin-dis.c (constant_formats): Constify the whole structure.
 221         (fmtconst): Add const to return value.
 222         (reg_names): Mark const.
 223         (decode_multfunc): Mark s0/s1 as const.
 224         (decode_macfunc): Mark a/sop as const.
 225
 226 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
 227
 228         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
 229
 230 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
 231
 232         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
 233         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
 234
 235 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
 236
 237         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
 238         dlx_insn_type array.
 239
 240 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
 241
 242         PR binutils/11960
 243         * i386-dis.c (sIv): New.
 244         (dis386): Replace Iq with sIv on "pushT".
 245         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
 246         (x86_64_table): Replace {T|}/{P|} with P.
 247         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
 248         (OP_sI): Update v_mode.  Remove w_mode.
 249
 250 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
 251
 252         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
 253         on E500 and E500MC.
 254
 255 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
 256
 257         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
 258         prefetchw.
 259
 260 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 261
 262         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
 263         to processor flags for PENTIUMPRO processors and later.
 264         * i386-opc.h (enum): Add CpuNop.
 265         (i386_cpu_flags): Add cpunop bit.
 266         * i386-opc.tbl: Change nop cpu_flags.
 267         * i386-init.h: Regenerated.
 268         * i386-tbl.h: Likewise.
 269
 270 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 271
 272         * i386-opc.h (enum): Fix typos in comments.
 273
 274 2010-08-06  Alan Modra  <amodra@gmail.com>
 275
 276         * disassemble.c: Formatting.
 277         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
 278
 279 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 280
 281         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
 282         * i386-tbl.h: Regenerated.
 283
 284 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 285
 286         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 287
 288         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 289         * i386-tbl.h: Regenerated.
 290
 291 2010-07-29  DJ Delorie  <dj@redhat.com>
 292
 293         * rx-decode.opc (SRR): New.
 294         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 295         r0,r0) and NOP3 (max r0,r0) special cases.
 296         * rx-decode.c: Regenerate.
 297
 298 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 299
 300         * i386-dis.c: Add 0F to VEX opcode enums.
 301
 302 2010-07-27  DJ Delorie  <dj@redhat.com>
 303
 304         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 305         (rx_decode_opcode): Likewise.
 306         * rx-decode.c: Regenerate.
 307
 308 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 309             Ina Pandit  <ina.pandit@kpitcummins.com>
 310
 311         * v850-dis.c (v850_sreg_names): Updated structure for system
 312         registers.
 313         (float_cc_names): new structure for condition codes.
 314         (print_value): Update the function that prints value.
 315         (get_operand_value): New function to get the operand value.
 316         (disassemble): Updated to handle the disassembly of instructions.
 317         (print_insn_v850): Updated function to print instruction for different
 318         families.
 319         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 320         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 321         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 322         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 323         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 324         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 325         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 326         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 327         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 328         (v850_operands): Update with the relocation name. Also update
 329         the instructions with specific set of processors.
 330
 331 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 332
 333         * arm-dis.c (print_insn_arm): Add cases for printing more
 334         symbolic operands.
 335         (print_insn_thumb32): Likewise.
 336
 337 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 338
 339         * mips-dis.c (print_insn_mips): Correct branch instruction type
 340         determination.
 341
 342 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 343
 344         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 345         type and delay slot determination.
 346         (print_insn_mips16): Extend branch instruction type and delay
 347         slot determination to cover all instructions.
 348         * mips16-opc.c (BR): Remove macro.
 349         (UBR, CBR): New macros.
 350         (mips16_opcodes): Update branch annotation for "b", "beqz",
 351         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 352         and "jrc".
 353
 354 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 355
 356         AVX Programming Reference (June, 2010)
 357         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 358         * i386-opc.tbl: Likewise.
 359         * i386-tbl.h: Regenerated.
 360
 361 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 362
 363         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 364
 365 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 366
 367         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 368         ppc_cpu_t before inverting.
 369         (ppc_parse_cpu): Likewise.
 370         (print_insn_powerpc): Likewise.
 371
 372 2010-07-03  Alan Modra  <amodra@gmail.com>
 373
 374         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 375         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 376         (PPC64, MFDEC2): Update.
 377         (NON32, NO371): Define.
 378         (powerpc_opcode): Update to not use old opcode flags, and avoid
 379         -m601 duplicates.
 380
 381 2010-07-03  DJ Delorie  <dj@delorie.com>
 382
 383         * m32c-ibld.c: Regenerate.
 384
 385 2010-07-03  Alan Modra  <amodra@gmail.com>
 386
 387         * ppc-opc.c (PWR2COM): Define.
 388         (PPCPWR2): Add PPC_OPCODE_COMMON.
 389         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 390         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 391         "rac" from -mcom.
 392
 393 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 394
 395         AVX Programming Reference (June, 2010)
 396         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 397         (PREFIX_0FAE_REG_1): Likewise.
 398         (PREFIX_0FAE_REG_2): Likewise.
 399         (PREFIX_0FAE_REG_3): Likewise.
 400         (PREFIX_VEX_3813): Likewise.
 401         (PREFIX_VEX_3A1D): Likewise.
 402         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 403         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 404         PREFIX_VEX_3A1D.
 405         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 406         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 407         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 408
 409         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 410         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 411         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 412
 413         * i386-opc.h (CpuXsaveopt): New.
 414         (CpuFSGSBase): Likewise.
 415         (CpuRdRnd): Likewise.
 416         (CpuF16C): Likewise.
 417         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 418         cpuf16c.
 419
 420         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 421         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 422         * i386-init.h: Regenerated.
 423         * i386-tbl.h: Likewise.
 424
 425 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 426
 427         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 428         and mtocrf on EFS.
 429
 430 2010-06-29  Alan Modra  <amodra@gmail.com>
 431
 432         * maxq-dis.c: Delete file.
 433         * Makefile.am: Remove references to maxq.
 434         * configure.in: Likewise.
 435         * disassemble.c: Likewise.
 436         * Makefile.in: Regenerate.
 437         * configure: Regenerate.
 438         * po/POTFILES.in: Regenerate.
 439
 440 2010-06-29  Alan Modra  <amodra@gmail.com>
 441
 442         * mep-dis.c: Regenerate.
 443
 444 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 445
 446         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 447
 448 2010-06-27  Alan Modra  <amodra@gmail.com>
 449
 450         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 451         (decodeInstr): Likewise.
 452         * dlx-dis.c (print_insn_dlx): Likewise.
 453         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 454         * maxq-dis.c (check_move, print_insn): Likewise.
 455         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 456         * msp430-dis.c (msp430_branchinstr): Likewise.
 457         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 458         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 459         * sparc-dis.c (print_insn_sparc): Likewise.
 460         * fr30-asm.c: Regenerate.
 461         * frv-asm.c: Regenerate.
 462         * ip2k-asm.c: Regenerate.
 463         * iq2000-asm.c: Regenerate.
 464         * lm32-asm.c: Regenerate.
 465         * m32c-asm.c: Regenerate.
 466         * m32r-asm.c: Regenerate.
 467         * mep-asm.c: Regenerate.
 468         * mt-asm.c: Regenerate.
 469         * openrisc-asm.c: Regenerate.
 470         * xc16x-asm.c: Regenerate.
 471         * xstormy16-asm.c: Regenerate.
 472
 473 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 474
 475         PR gas/11673
 476         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 477
 478 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 479
 480         PR binutils/11676
 481         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 482
 483 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 484
 485         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 486         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 487         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 488         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 489         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 490         Treat lwsync as msync on e500.
 491
 492 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 493
 494         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 495
 496 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 497
 498         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 499         constants is the same on 32-bit and 64-bit hosts.
 500
 501 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 502
 503         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 504         .short directives so that they can be reassembled.
 505
 506 2010-05-26  Catherine Moore <clm@codesourcery.com>
 507             David Ung  <davidu@mips.com>
 508
 509         * mips-opc.c: Change membership to I1 for instructions ssnop and
 510         ehb.
 511
 512 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 513
 514         * i386-dis.c (sib): New.
 515         (get_sib): Likewise.
 516         (print_insn): Call get_sib.
 517         OP_E_memory): Use sib.
 518
 519 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 520
 521         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 522         * mips-opc.c (I16): Remove.
 523         (mips_builtin_op): Reclassify jalx.
 524
 525 2010-05-19  Alan Modra  <amodra@gmail.com>
 526
 527         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 528         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 529
 530 2010-05-13  Alan Modra  <amodra@gmail.com>
 531
 532         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 533
 534 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 535
 536         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 537         format.
 538         (print_insn_thumb16): Add support for new %W format.
 539
 540 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 541
 542         * Makefile.in: Regenerate with automake 1.11.1.
 543         * aclocal.m4: Ditto.
 544
 545 2010-05-05  Nick Clifton  <nickc@redhat.com>
 546
 547         * po/es.po: Updated Spanish translation.
 548
 549 2010-04-22  Nick Clifton  <nickc@redhat.com>
 550
 551         * po/opcodes.pot: Updated by the Translation project.
 552         * po/vi.po: Updated Vietnamese translation.
 553
 554 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 555
 556         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 557         bits in opcode.
 558
 559 2010-04-09  Nick Clifton  <nickc@redhat.com>
 560
 561         * i386-dis.c (print_insn): Remove unused variable op.
 562         (OP_sI): Remove unused variable mask.
 563
 564 2010-04-07  Alan Modra  <amodra@gmail.com>
 565
 566         * configure: Regenerate.
 567
 568 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 569
 570         * ppc-opc.c (RBOPT): New define.
 571         ("dccci"): Enable for PPCA2.  Make operands optional.
 572         ("iccci"): Likewise.  Do not deprecate for PPC476.
 573
 574 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 575
 576         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 577
 578 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 579
 580         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 581         * Makefile.in: Regenerate.
 582         * configure.in (bfd_tic6x_arch): New.
 583         * configure: Regenerate.
 584         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 585         (disassembler): Handle TI C6X.
 586         * tic6x-dis.c: New.
 587
 588 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 589
 590         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 591
 592 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 593
 594         * dis-buf.c (buffer_read_memory): Give error for reading just
 595         before the start of memory.
 596
 597 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 598             Quentin Neill <quentin.neill@amd.com>
 599
 600         * i386-dis.c (OP_LWP_I): Removed.
 601         (reg_table): Do not use OP_LWP_I, use Iq.
 602         (OP_LWPCB_E): Remove use of names16.
 603         (OP_LWP_E): Same.
 604         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 605         should not set the Vex.length bit.
 606         * i386-tbl.h: Regenerated.
 607
 608 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 609
 610         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 611
 612 2010-02-24  Nick Clifton  <nickc@redhat.com>
 613
 614         PR binutils/6773
 615         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 616         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 617         (thumb32_opcodes): Likewise.
 618
 619 2010-02-15  Nick Clifton  <nickc@redhat.com>
 620
 621         * po/vi.po: Updated Vietnamese translation.
 622
 623 2010-02-12  Doug Evans  <dje@sebabeach.org>
 624
 625         * lm32-opinst.c: Regenerate.
 626
 627 2010-02-11  Doug Evans  <dje@sebabeach.org>
 628
 629         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 630         (print_address): Delete CGEN_PRINT_ADDRESS.
 631         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 632         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 633         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 634         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 635
 636         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 637         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 638         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 639         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 640         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 641         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 642         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 643         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 644         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 645         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 646         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 647         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 648
 649 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 650
 651         * i386-dis.c: Update copyright.
 652         * i386-gen.c: Likewise.
 653         * i386-opc.h: Likewise.
 654         * i386-opc.tbl: Likewise.
 655
 656 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 657             Sebastian Pop  <sebastian.pop@amd.com>
 658
 659         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 660         function to handle 5th imm8 operand.
 661         (PREFIX_VEX_3A48): Added.
 662         (PREFIX_VEX_3A49): Added.
 663         (VEX_W_3A48_P_2): Added.
 664         (VEX_W_3A49_P_2): Added.
 665         (prefix table): Added entries for PREFIX_VEX_3A48
 666         and PREFIX_VEX_3A49.
 667         (vex table): Added entries for VEX_W_3A48_P_2 and
 668         and VEX_W_3A49_P_2.
 669         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 670         for Vec_Imm4 operands.
 671         * i386-opc.h (enum): Added Vec_Imm4.
 672         (i386_operand_type): Added vec_imm4.
 673         * i386-opc.tbl: Add entries for vpermilp[ds].
 674         * i386-init.h: Regenerated.
 675         * i386-tbl.h: Regenerated.
 676
 677 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 678
 679         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 680         and "pwr7".  Move "a2" into alphabetical order.
 681
 682 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 683
 684         * ppc-dis.c (ppc_opts): Add titan entry.
 685         * ppc-opc.c (TITAN, MULHW): Define.
 686         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 687
 688 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 689
 690         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 691         to CPU_BDVER1_FLAGS
 692         * i386-init.h: Regenerated.
 693
 694 2010-02-03  Anthony Green  <green@moxielogic.com>
 695
 696         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 697         0x0f, and make 0x00 an illegal instruction.
 698
 699 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 700
 701         * opcodes/arm-dis.c (struct arm_private_data): New.
 702         (print_insn_coprocessor, print_insn_arm): Update to use struct
 703         arm_private_data.
 704         (is_mapping_symbol, get_map_sym_type): New functions.
 705         (get_sym_code_type): Check the symbol's section.  Do not check
 706         mapping symbols.
 707         (print_insn): Default to disassembling ARM mode code.  Check
 708         for mapping symbols separately from other symbols.  Use
 709         struct arm_private_data.
 710
 711 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 712
 713         * i386-dis.c (EXVexWdqScalar): New.
 714         (vex_scalar_w_dq_mode): Likewise.
 715         (prefix_table): Update entries for PREFIX_VEX_3899,
 716         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 717         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 718         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 719         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 720         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 721         (OP_EX): Likewise.
 722
 723 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 724
 725         * i386-dis.c (XMScalar): New.
 726         (EXdScalar): Likewise.
 727         (EXqScalar): Likewise.
 728         (EXqScalarS): Likewise.
 729         (VexScalar): Likewise.
 730         (EXdVexScalarS): Likewise.
 731         (EXqVexScalarS): Likewise.
 732         (XMVexScalar): Likewise.
 733         (scalar_mode): Likewise.
 734         (d_scalar_mode): Likewise.
 735         (d_scalar_swap_mode): Likewise.
 736         (q_scalar_mode): Likewise.
 737         (q_scalar_swap_mode): Likewise.
 738         (vex_scalar_mode): Likewise.
 739         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 740         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 741         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 742         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 743         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 744         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 745         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 746         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 747         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 748         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 749         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 750         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 751         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 752         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 753         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 754         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 755         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 756         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 757         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 758         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 759         q_scalar_mode, q_scalar_swap_mode.
 760         (OP_XMM): Handle scalar_mode.
 761         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 762         and q_scalar_swap_mode.
 763         (OP_VEX): Handle vex_scalar_mode.
 764
 765 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 766
 767         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 768
 769 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 770
 771         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 772
 773 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 774
 775         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 776
 777 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 778
 779         * i386-dis.c (Bad_Opcode): New.
 780         (bad_opcode): Likewise.
 781         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 782         (dis386_twobyte): Likewise.
 783         (reg_table): Likewise.
 784         (prefix_table): Likewise.
 785         (x86_64_table): Likewise.
 786         (vex_len_table): Likewise.
 787         (vex_w_table): Likewise.
 788         (mod_table): Likewise.
 789         (rm_table): Likewise.
 790         (float_reg): Likewise.
 791         (reg_table): Remove trailing "(bad)" entries.
 792         (prefix_table): Likewise.
 793         (x86_64_table): Likewise.
 794         (vex_len_table): Likewise.
 795         (vex_w_table): Likewise.
 796         (mod_table): Likewise.
 797         (rm_table): Likewise.
 798         (get_valid_dis386): Handle bytemode 0.
 799
 800 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 801
 802         * i386-opc.h (VEXScalar): New.
 803
 804         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 805         instructions.
 806         * i386-tbl.h: Regenerated.
 807
 808 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 809
 810         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 811
 812         * i386-opc.tbl: Add xsave64 and xrstor64.
 813         * i386-tbl.h: Regenerated.
 814
 815 2010-01-20  Nick Clifton  <nickc@redhat.com>
 816
 817         PR 11170
 818         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 819         based post-indexed addressing.
 820
 821 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 822
 823         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 824         * i386-tbl.h: Regenerated.
 825
 826 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 827
 828         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 829         comments.
 830
 831 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 832
 833         * i386-dis.c (names_mm): New.
 834         (intel_names_mm): Likewise.
 835         (att_names_mm): Likewise.
 836         (names_xmm): Likewise.
 837         (intel_names_xmm): Likewise.
 838         (att_names_xmm): Likewise.
 839         (names_ymm): Likewise.
 840         (intel_names_ymm): Likewise.
 841         (att_names_ymm): Likewise.
 842         (print_insn): Set names_mm, names_xmm and names_ymm.
 843         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 844         (OP_XMM): Likewise.
 845         (OP_EM): Likewise.
 846         (OP_EMC): Likewise.
 847         (OP_MXC): Likewise.
 848         (OP_EX): Likewise.
 849         (XMM_Fixup): Likewise.
 850         (OP_VEX): Likewise.
 851         (OP_EX_VexReg): Likewise.
 852         (OP_Vex_2src): Likewise.
 853         (OP_Vex_2src_1): Likewise.
 854         (OP_Vex_2src_2): Likewise.
 855         (OP_REG_VexI4): Likewise.
 856
 857 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 858
 859         * i386-dis.c (print_insn): Update comments.
 860
 861 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 862
 863         * i386-dis.c (rex_original): Removed.
 864         (ckprefix): Remove rex_original.
 865         (print_insn): Update comments.
 866
 867 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 868
 869         * Makefile.in: Regenerate.
 870         * configure: Regenerate.
 871
 872 2010-01-07  Doug Evans  <dje@sebabeach.org>
 873
 874         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 875         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 876         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 877         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 878         * xstormy16-ibld.c: Regenerate.
 879
 880 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 881
 882         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 883         * i386-init.h: Regenerated.
 884
 885 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 886
 887         * arm-dis.c (print_insn): Fixed search for next symbol and data
 888         dumping condition, and the initial mapping symbol state.
 889
 890 2010-01-05  Doug Evans  <dje@sebabeach.org>
 891
 892         * cgen-ibld.in: #include "cgen/basic-modes.h".
 893         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 894         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 895         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 896         * xstormy16-ibld.c: Regenerate.
 897
 898 2010-01-04  Nick Clifton  <nickc@redhat.com>
 899
 900         PR 11123
 901         * arm-dis.c (print_insn_coprocessor): Initialise value.
 902
 903 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 904
 905         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 906
 907 2010-01-02  Doug Evans  <dje@sebabeach.org>
 908
 909         * cgen-asm.in: Update copyright year.
 910         * cgen-dis.in: Update copyright year.
 911         * cgen-ibld.in: Update copyright year.
 912         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 913         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 914         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 915         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 916         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 917         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 918         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 919         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 920         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 921         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 922         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 923         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 924         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 925         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 926         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 927         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 928         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 929         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 930         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 931         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 932         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 933
 934 For older changes see ChangeLog-2009
 935 \f
 936 Local Variables:
 937 mode: change-log
 938 left-margin: 8
 939 fill-column: 74
 940 version-control: never
 941 End: