1 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2 Jan Beulich <jbeulich@suse.com>
5 * i386-dis.c (MOVSXD_Fixup): New function.
6 (movsxd_mode): New enum.
7 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
8 (intel_operand_size): Handle movsxd_mode.
9 (OP_E_register): Likewise.
11 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
12 register on movsxd. Add movsxd with 16-bit destination register
13 for AMD64 and Intel64 ISAs.
14 * i386-tbl.h: Regenerated.
16 2020-01-27 Tamar Christina <tamar.christina@arm.com>
19 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
20 * aarch64-asm-2.c: Regenerate
21 * aarch64-dis-2.c: Likewise.
22 * aarch64-opc-2.c: Likewise.
24 2020-01-21 Jan Beulich <jbeulich@suse.com>
26 * i386-opc.tbl (sysret): Drop DefaultSize.
27 * i386-tbl.h: Re-generate.
29 2020-01-21 Jan Beulich <jbeulich@suse.com>
31 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
33 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
34 * i386-tbl.h: Re-generate.
36 2020-01-20 Nick Clifton <nickc@redhat.com>
38 * po/de.po: Updated German translation.
39 * po/pt_BR.po: Updated Brazilian Portuguese translation.
40 * po/uk.po: Updated Ukranian translation.
42 2020-01-20 Alan Modra <amodra@gmail.com>
44 * hppa-dis.c (fput_const): Remove useless cast.
46 2020-01-20 Alan Modra <amodra@gmail.com>
48 * arm-dis.c (print_insn_arm): Wrap 'T' value.
50 2020-01-18 Nick Clifton <nickc@redhat.com>
52 * configure: Regenerate.
53 * po/opcodes.pot: Regenerate.
55 2020-01-18 Nick Clifton <nickc@redhat.com>
57 Binutils 2.34 branch created.
59 2020-01-17 Christian Biesinger <cbiesinger@google.com>
61 * opintl.h: Fix spelling error (seperate).
63 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
65 * i386-opc.tbl: Add {vex} pseudo prefix.
66 * i386-tbl.h: Regenerated.
68 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
71 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
72 (neon_opcodes): Likewise.
73 (select_arm_features): Make sure we enable MVE bits when selecting
74 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
77 2020-01-16 Jan Beulich <jbeulich@suse.com>
79 * i386-opc.tbl: Drop stale comment from XOP section.
81 2020-01-16 Jan Beulich <jbeulich@suse.com>
83 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
84 (extractps): Add VexWIG to SSE2AVX forms.
85 * i386-tbl.h: Re-generate.
87 2020-01-16 Jan Beulich <jbeulich@suse.com>
89 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
90 Size64 from and use VexW1 on SSE2AVX forms.
91 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
92 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
93 * i386-tbl.h: Re-generate.
95 2020-01-15 Alan Modra <amodra@gmail.com>
97 * tic4x-dis.c (tic4x_version): Make unsigned long.
98 (optab, optab_special, registernames): New file scope vars.
99 (tic4x_print_register): Set up registernames rather than
100 malloc'd registertable.
101 (tic4x_disassemble): Delete optable and optable_special. Use
102 optab and optab_special instead. Throw away old optab,
103 optab_special and registernames when info->mach changes.
105 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
108 * z80-dis.c (suffix): Use .db instruction to generate double
111 2020-01-14 Alan Modra <amodra@gmail.com>
113 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
114 values to unsigned before shifting.
116 2020-01-13 Thomas Troeger <tstroege@gmx.de>
118 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
120 (print_insn_thumb16, print_insn_thumb32): Likewise.
121 (print_insn): Initialize the insn info.
122 * i386-dis.c (print_insn): Initialize the insn info fields, and
125 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
127 * arc-opc.c (C_NE): Make it required.
129 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
131 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
132 reserved register name.
134 2020-01-13 Alan Modra <amodra@gmail.com>
136 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
137 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
139 2020-01-13 Alan Modra <amodra@gmail.com>
141 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
142 result of wasm_read_leb128 in a uint64_t and check that bits
143 are not lost when copying to other locals. Use uint32_t for
144 most locals. Use PRId64 when printing int64_t.
146 2020-01-13 Alan Modra <amodra@gmail.com>
148 * score-dis.c: Formatting.
149 * score7-dis.c: Formatting.
151 2020-01-13 Alan Modra <amodra@gmail.com>
153 * score-dis.c (print_insn_score48): Use unsigned variables for
154 unsigned values. Don't left shift negative values.
155 (print_insn_score32): Likewise.
156 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
158 2020-01-13 Alan Modra <amodra@gmail.com>
160 * tic4x-dis.c (tic4x_print_register): Remove dead code.
162 2020-01-13 Alan Modra <amodra@gmail.com>
164 * fr30-ibld.c: Regenerate.
166 2020-01-13 Alan Modra <amodra@gmail.com>
168 * xgate-dis.c (print_insn): Don't left shift signed value.
169 (ripBits): Formatting, use 1u.
171 2020-01-10 Alan Modra <amodra@gmail.com>
173 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
174 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
176 2020-01-10 Alan Modra <amodra@gmail.com>
178 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
179 and XRREG value earlier to avoid a shift with negative exponent.
180 * m10200-dis.c (disassemble): Similarly.
182 2020-01-09 Nick Clifton <nickc@redhat.com>
185 * z80-dis.c (ld_ii_ii): Use correct cast.
187 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
190 * z80-dis.c (ld_ii_ii): Use character constant when checking
193 2020-01-09 Jan Beulich <jbeulich@suse.com>
195 * i386-dis.c (SEP_Fixup): New.
197 (dis386_twobyte): Use it for sysenter/sysexit.
198 (enum x86_64_isa): Change amd64 enumerator to value 1.
199 (OP_J): Compare isa64 against intel64 instead of amd64.
200 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
202 * i386-tbl.h: Re-generate.
204 2020-01-08 Alan Modra <amodra@gmail.com>
206 * z8k-dis.c: Include libiberty.h
207 (instr_data_s): Make max_fetched unsigned.
208 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
209 Don't exceed byte_info bounds.
210 (output_instr): Make num_bytes unsigned.
211 (unpack_instr): Likewise for nibl_count and loop.
212 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
214 * z8k-opc.h: Regenerate.
216 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
218 * arc-tbl.h (llock): Use 'LLOCK' as class.
220 (scond): Use 'SCOND' as class.
222 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
225 2020-01-06 Alan Modra <amodra@gmail.com>
227 * m32c-ibld.c: Regenerate.
229 2020-01-06 Alan Modra <amodra@gmail.com>
232 * z80-dis.c (suffix): Don't use a local struct buffer copy.
233 Peek at next byte to prevent recursion on repeated prefix bytes.
234 Ensure uninitialised "mybuf" is not accessed.
235 (print_insn_z80): Don't zero n_fetch and n_used here,..
236 (print_insn_z80_buf): ..do it here instead.
238 2020-01-04 Alan Modra <amodra@gmail.com>
240 * m32r-ibld.c: Regenerate.
242 2020-01-04 Alan Modra <amodra@gmail.com>
244 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
246 2020-01-04 Alan Modra <amodra@gmail.com>
248 * crx-dis.c (match_opcode): Avoid shift left of signed value.
250 2020-01-04 Alan Modra <amodra@gmail.com>
252 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
254 2020-01-03 Jan Beulich <jbeulich@suse.com>
256 * aarch64-tbl.h (aarch64_opcode_table): Use
257 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
259 2020-01-03 Jan Beulich <jbeulich@suse.com>
261 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
262 forms of SUDOT and USDOT.
264 2020-01-03 Jan Beulich <jbeulich@suse.com>
266 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
268 * opcodes/aarch64-dis-2.c: Re-generate.
270 2020-01-03 Jan Beulich <jbeulich@suse.com>
272 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
274 * opcodes/aarch64-dis-2.c: Re-generate.
276 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
278 * z80-dis.c: Add support for eZ80 and Z80 instructions.
280 2020-01-01 Alan Modra <amodra@gmail.com>
282 Update year range in copyright notice of all files.
284 For older changes see ChangeLog-2019
286 Copyright (C) 2020 Free Software Foundation, Inc.
288 Copying and distribution of this file, with or without modification,
289 are permitted in any medium without royalty provided the copyright
290 notice and this notice are preserved.
296 version-control: never