opcodes/ChangeLog

   1 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * po/es.po: Commit new Spanish translation.
   4
   5         * po/fr.po: Commit new French translation.
   6
   7 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
   8
   9         * vax-dis.c: Fix spelling error
  10         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
  11         of just "Entry mask: < r1 ... >"
  12
  13 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
  14
  15         * arm-dis.c (arm_opcodes): Document %E and %V.
  16         Add entries for v6T2 ARM instructions:
  17         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
  18         (print_insn_arm): Add support for %E and %V.
  19         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
  20
  21 2005-03-10  Jeff Baker  <jbaker@qnx.com>
  22             Alan Modra  <amodra@bigpond.net.au>
  23
  24         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
  25         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
  26         (SPRG_MASK): Delete.
  27         (XSPRG_MASK): Mask off extra bits now part of sprg field.
  28         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
  29         mfsprg4..7 after msprg and consolidate.
  30
  31 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  32
  33         * vax-dis.c (entry_mask_bit): New array.
  34         (print_insn_vax): Decode function entry mask.
  35
  36 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
  37
  38         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
  39
  40 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
  41
  42         * po/opcodes.pot: Regenerate.
  43
  44 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
  45
  46         * arc-dis.c (a4_decoding_class): New enum.
  47         (dsmOneArcInst): Use the enum values for the decoding class.
  48         Remove redundant case in the switch for decodingClass value 11.
  49
  50 2005-03-02  Jan Beulich  <jbeulich@novell.com>
  51
  52         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
  53         accesses.
  54         (OP_C): Consider lock prefix in non-64-bit modes.
  55
  56 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
  57
  58         * cris-dis.c (format_hex): Remove ineffective warning fix.
  59         * crx-dis.c (make_instruction): Warning fix.
  60         * frv-asm.c: Regenerate.
  61
  62 2005-02-23  Nick Clifton  <nickc@redhat.com>
  63
  64         * cgen-dis.in: Use bfd_byte for buffers that are passed to
  65         read_memory.
  66
  67         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
  68
  69         * crx-dis.c (make_instruction): Move argument structure into inner
  70         scope and ensure that all of its fields are initialised before
  71         they are used.
  72
  73         * fr30-asm.c: Regenerate.
  74         * fr30-dis.c: Regenerate.
  75         * frv-asm.c: Regenerate.
  76         * frv-dis.c: Regenerate.
  77         * ip2k-asm.c: Regenerate.
  78         * ip2k-dis.c: Regenerate.
  79         * iq2000-asm.c: Regenerate.
  80         * iq2000-dis.c: Regenerate.
  81         * m32r-asm.c: Regenerate.
  82         * m32r-dis.c: Regenerate.
  83         * openrisc-asm.c: Regenerate.
  84         * openrisc-dis.c: Regenerate.
  85         * xstormy16-asm.c: Regenerate.
  86         * xstormy16-dis.c: Regenerate.
  87
  88 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
  89
  90         * arc-ext.c: Warning fixes.
  91         * arc-ext.h: Likewise.
  92         * cgen-opc.c: Likewise.
  93         * ia64-gen.c: Likewise.
  94         * maxq-dis.c: Likewise.
  95         * ns32k-dis.c: Likewise.
  96         * w65-dis.c: Likewise.
  97         * ia64-asmtab.c: Regenerate.
  98
  99 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 100
 101         * fr30-desc.c: Regenerate.
 102         * fr30-desc.h: Regenerate.
 103         * fr30-opc.c: Regenerate.
 104         * fr30-opc.h: Regenerate.
 105         * frv-desc.c: Regenerate.
 106         * frv-desc.h: Regenerate.
 107         * frv-opc.c: Regenerate.
 108         * frv-opc.h: Regenerate.
 109         * ip2k-desc.c: Regenerate.
 110         * ip2k-desc.h: Regenerate.
 111         * ip2k-opc.c: Regenerate.
 112         * ip2k-opc.h: Regenerate.
 113         * iq2000-desc.c: Regenerate.
 114         * iq2000-desc.h: Regenerate.
 115         * iq2000-opc.c: Regenerate.
 116         * iq2000-opc.h: Regenerate.
 117         * m32r-desc.c: Regenerate.
 118         * m32r-desc.h: Regenerate.
 119         * m32r-opc.c: Regenerate.
 120         * m32r-opc.h: Regenerate.
 121         * m32r-opinst.c: Regenerate.
 122         * openrisc-desc.c: Regenerate.
 123         * openrisc-desc.h: Regenerate.
 124         * openrisc-opc.c: Regenerate.
 125         * openrisc-opc.h: Regenerate.
 126         * xstormy16-desc.c: Regenerate.
 127         * xstormy16-desc.h: Regenerate.
 128         * xstormy16-opc.c: Regenerate.
 129         * xstormy16-opc.h: Regenerate.
 130
 131 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 132
 133         * Makefile.am: Run "make dep-am"
 134         * Makefile.in: Regenerate.
 135
 136 2005-02-15  Nick Clifton  <nickc@redhat.com>
 137
 138         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 139         compile time warnings.
 140         (print_keyword): Likewise.
 141         (default_print_insn): Likewise.
 142
 143         * fr30-desc.c: Regenerated.
 144         * fr30-desc.h: Regenerated.
 145         * fr30-dis.c: Regenerated.
 146         * fr30-opc.c: Regenerated.
 147         * fr30-opc.h: Regenerated.
 148         * frv-desc.c: Regenerated.
 149         * frv-dis.c: Regenerated.
 150         * frv-opc.c: Regenerated.
 151         * ip2k-asm.c: Regenerated.
 152         * ip2k-desc.c: Regenerated.
 153         * ip2k-desc.h: Regenerated.
 154         * ip2k-dis.c: Regenerated.
 155         * ip2k-opc.c: Regenerated.
 156         * ip2k-opc.h: Regenerated.
 157         * iq2000-desc.c: Regenerated.
 158         * iq2000-dis.c: Regenerated.
 159         * iq2000-opc.c: Regenerated.
 160         * m32r-asm.c: Regenerated.
 161         * m32r-desc.c: Regenerated.
 162         * m32r-desc.h: Regenerated.
 163         * m32r-dis.c: Regenerated.
 164         * m32r-opc.c: Regenerated.
 165         * m32r-opc.h: Regenerated.
 166         * m32r-opinst.c: Regenerated.
 167         * openrisc-desc.c: Regenerated.
 168         * openrisc-desc.h: Regenerated.
 169         * openrisc-dis.c: Regenerated.
 170         * openrisc-opc.c: Regenerated.
 171         * openrisc-opc.h: Regenerated.
 172         * xstormy16-desc.c: Regenerated.
 173         * xstormy16-desc.h: Regenerated.
 174         * xstormy16-dis.c: Regenerated.
 175         * xstormy16-opc.c: Regenerated.
 176         * xstormy16-opc.h: Regenerated.
 177
 178 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 179
 180         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 181         address.
 182
 183 2005-02-11  Nick Clifton  <nickc@redhat.com>
 184
 185         * iq2000-asm.c: Regenerate.
 186
 187         * frv-dis.c: Regenerate.
 188
 189 2005-02-07  Jim Blandy  <jimb@redhat.com>
 190
 191         * Makefile.am (CGEN): Load guile.scm before calling the main
 192         application script.
 193         * Makefile.in: Regenerated.
 194         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 195         Simply pass the cgen-opc.scm path to ${cgen} as its first
 196         argument; ${cgen} itself now contains the '-s', or whatever is
 197         appropriate for the Scheme being used.
 198
 199 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 200
 201         * configure: Regenerate to track ../gettext.m4.
 202
 203 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 204
 205         * ia64-gen.c (NELEMS): Define.
 206         (shrink): Generate alias with missing second predicate register when
 207         opcode has two outputs and these are both predicates.
 208         * ia64-opc-i.c (FULL17): Define.
 209         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 210         here to generate output template.
 211         (TBITCM, TNATCM): Undefine after use.
 212         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 213         first input. Add ld16 aliases without ar.csd as second output. Add
 214         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 215         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 216         ar.ccv as third/fourth inputs. Consolidate through...
 217         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 218         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 219         * ia64-asmtab.c: Regenerate.
 220
 221 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 222
 223         * configure: Regenerate to track ../gettext.m4 change.
 224
 225 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 226
 227         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 228         * frv-asm.c: Rebuilt.
 229         * frv-desc.c: Rebuilt.
 230         * frv-desc.h: Rebuilt.
 231         * frv-dis.c: Rebuilt.
 232         * frv-ibld.c: Rebuilt.
 233         * frv-opc.c: Rebuilt.
 234         * frv-opc.h: Rebuilt.
 235
 236 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 237
 238         * configure: Regenerate, ../gettext.m4 was updated.
 239
 240 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 241
 242         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 243         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 244         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 245         * mips-dis.c: Ditto.
 246
 247 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 248
 249         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 250
 251 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 252
 253         * mips-dis.c (no_aliases): New disassembly option flag.
 254         (set_default_mips_dis_options): Init no_aliases to zero.
 255         (parse_mips_dis_option): Handle no-aliases option.
 256         (print_insn_mips): Ignore table entries that are aliases
 257         if no_aliases is set.
 258         (print_insn_mips16): Ditto.
 259         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 260         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 261         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 262         * mips16-opc.c (mips16_opcodes): Ditto.
 263
 264 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 265
 266         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 267         (inheritance diagram): Add missing edge.
 268         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 269         easier for the testsuite.
 270         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 271         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 272         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 273         arch_sh2a_or_sh4_up child.
 274         (sh_table): Do renaming as above.
 275         Correct comment for ldc.l for gas testsuite to read.
 276         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 277         Correct comments for movy.w and movy.l for gas testsuite to read.
 278         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 279
 280 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 281
 282         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 283
 284 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 285
 286         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 287
 288 2005-01-10  Andreas Schwab  <schwab@suse.de>
 289
 290         * disassemble.c (disassemble_init_for_target) <case
 291         bfd_arch_ia64>: Set skip_zeroes to 16.
 292         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 293
 294 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 295
 296         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 297
 298 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 299
 300         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 301         memory references. Convert avr_operand() to C90 formatting.
 302
 303 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 304
 305         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 306
 307 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 308
 309         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 310         (no_op_insn): Initialize array with instructions that have no
 311         operands.
 312         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 313
 314 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 315
 316         * arm-dis.c: Correct top-level comment.
 317
 318 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 319
 320         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 321         architecuture defining the insn.
 322         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 323         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 324         field.
 325         Also include opcode/arm.h.
 326         * Makefile.am (arm-dis.lo): Update dependency list.
 327         * Makefile.in: Regenerate.
 328
 329 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 330
 331         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 332         reflect the change to the short immediate syntax.
 333
 334 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 335
 336         * or32-opc.c (debug): Warning fix.
 337         * po/POTFILES.in: Regenerate.
 338
 339         * maxq-dis.c: Formatting.
 340         (print_insn): Warning fix.
 341
 342 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 343
 344         * arm-dis.c (WORD_ADDRESS): Define.
 345         (print_insn): Use it.  Correct big-endian end-of-section handling.
 346
 347 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 348             Vineet Sharma      <vineets@noida.hcltech.com>
 349
 350         * maxq-dis.c: New file.
 351         * disassemble.c (ARCH_maxq): Define.
 352         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 353         instructions..
 354         * configure.in: Add case for bfd_maxq_arch.
 355         * configure: Regenerate.
 356         * Makefile.am: Add support for maxq-dis.c
 357         * Makefile.in: Regenerate.
 358         * aclocal.m4: Regenerate.
 359
 360 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 361
 362         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 363         mode.
 364         * crx-dis.c: Likewise.
 365
 366 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 367
 368         Generally, handle CRISv32.
 369         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 370         (struct cris_disasm_data): New type.
 371         (format_reg, format_hex, cris_constraint, print_flags)
 372         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 373         callers changed.
 374         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 375         (print_insn_crisv32_without_register_prefix)
 376         (print_insn_crisv10_v32_with_register_prefix)
 377         (print_insn_crisv10_v32_without_register_prefix)
 378         (cris_parse_disassembler_options): New functions.
 379         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 380         parameter.  All callers changed.
 381         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 382         failure.
 383         (cris_constraint) <case 'Y', 'U'>: New cases.
 384         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 385         for constraint 'n'.
 386         (print_with_operands) <case 'Y'>: New case.
 387         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 388         <case 'N', 'Y', 'Q'>: New cases.
 389         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 390         (print_insn_cris_with_register_prefix)
 391         (print_insn_cris_without_register_prefix): Call
 392         cris_parse_disassembler_options.
 393         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 394         for CRISv32 and the size of immediate operands.  New v32-only
 395         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 396         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 397         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 398         Change brp to be v3..v10.
 399         (cris_support_regs): New vector.
 400         (cris_opcodes): Update head comment.  New format characters '[',
 401         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 402         Add new opcodes for v32 and adjust existing opcodes to accommodate
 403         differences to earlier variants.
 404         (cris_cond15s): New vector.
 405
 406 2004-11-04 Jan Beulich <jbeulich@novell.com>
 407
 408         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 409         (indirEb): Remove.
 410         (Mp): Use f_mode rather than none at all.
 411         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 412         replaces what previously was x_mode; x_mode now means 128-bit SSE
 413         operands.
 414         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 415         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 416         pinsrw's second operand is Edqw.
 417         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 418         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 419         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 420         mode when an operand size override is present or always suffixing.
 421         More instructions will need to be added to this group.
 422         (putop): Handle new macro chars 'C' (short/long suffix selector),
 423         'I' (Intel mode override for following macro char), and 'J' (for
 424         adding the 'l' prefix to far branches in AT&T mode). When an
 425         alternative was specified in the template, honor macro character when
 426         specified for Intel mode.
 427         (OP_E): Handle new *_mode values. Correct pointer specifications for
 428         memory operands. Consolidate output of index register.
 429         (OP_G): Handle new *_mode values.
 430         (OP_I): Handle const_1_mode.
 431         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 432         respective opcode prefix bits have been consumed.
 433         (OP_EM, OP_EX): Provide some default handling for generating pointer
 434         specifications.
 435
 436 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 437
 438         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 439         COP_INST macro.
 440
 441 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 442
 443         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 444         (getregliststring): Support HI/LO and user registers.
 445         * crx-opc.c (crx_instruction): Update data structure according to the
 446         rearrangement done in CRX opcode header file.
 447         (crx_regtab):  Likewise.
 448         (crx_optab):  Likewise.
 449         (crx_instruction): Reorder load/stor instructions, remove unsupported
 450         formats.
 451         support new Co-Processor instruction 'cpi'.
 452
 453 2004-10-27  Nick Clifton  <nickc@redhat.com>
 454
 455         * opcodes/iq2000-asm.c: Regenerate.
 456         * opcodes/iq2000-desc.c: Regenerate.
 457         * opcodes/iq2000-desc.h: Regenerate.
 458         * opcodes/iq2000-dis.c: Regenerate.
 459         * opcodes/iq2000-ibld.c: Regenerate.
 460         * opcodes/iq2000-opc.c: Regenerate.
 461         * opcodes/iq2000-opc.h: Regenerate.
 462
 463 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 464
 465         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 466         us4, us5 (respectively).
 467         Remove unsupported 'popa' instruction.
 468         Reverse operands order in store co-processor instructions.
 469
 470 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 471
 472         * Makefile.am: Run "make dep-am"
 473         * Makefile.in: Regenerate.
 474
 475 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 476
 477         * xtensa-dis.c: Use ISO C90 formatting.
 478
 479 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 480
 481         * ppc-opc.c: Revert 2004-09-09 change.
 482
 483 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 484
 485         * xtensa-dis.c (state_names): Delete.
 486         (fetch_data): Use xtensa_isa_maxlength.
 487         (print_xtensa_operand): Replace operand parameter with opcode/operand
 488         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 489         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 490         instruction bundles.  Use xmalloc instead of malloc.
 491
 492 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 493
 494         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 495         initializers.
 496
 497 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 498
 499         * crx-opc.c (crx_instruction): Support Co-processor insns.
 500         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 501         (getregliststring): Change function to use the above enum.
 502         (print_arg): Handle CO-Processor insns.
 503         (crx_cinvs): Add 'b' option to invalidate the branch-target
 504         cache.
 505
 506 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 507
 508         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 509         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 510         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 511         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 512         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 513
 514 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 515
 516         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 517         rather than add it.
 518
 519 2004-09-30  Paul Brook  <paul@codesourcery.com>
 520
 521         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 522         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 523
 524 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 525
 526         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 527         (CONFIG_STATUS_DEPENDENCIES): New.
 528         (Makefile): Removed.
 529         (config.status): Likewise.
 530         * Makefile.in: Regenerated.
 531
 532 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 533
 534         * Makefile.am: Run "make dep-am".
 535         * Makefile.in: Regenerate.
 536         * aclocal.m4: Regenerate.
 537         * configure: Regenerate.
 538         * po/POTFILES.in: Regenerate.
 539         * po/opcodes.pot: Regenerate.
 540
 541 2004-09-11  Andreas Schwab  <schwab@suse.de>
 542
 543         * configure: Rebuild.
 544
 545 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 546
 547         * ppc-opc.c (L): Make this field not optional.
 548
 549 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 550
 551         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 552         Fix parameter to 'm[t|f]csr' insns.
 553
 554 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 555
 556         * configure.in: Autoupdate to autoconf 2.59.
 557         * aclocal.m4: Rebuild with aclocal 1.4p6.
 558         * configure: Rebuild with autoconf 2.59.
 559         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 560         bfd changes for autoconf 2.59 on the way).
 561         * config.in: Rebuild with autoheader 2.59.
 562
 563 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 564
 565         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 566
 567 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 568
 569         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 570         (GRPPADLCK2): New define.
 571         (twobyte_has_modrm): True for 0xA6.
 572         (grps): GRPPADLCK2 for opcode 0xA6.
 573
 574 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 575
 576         Introduce SH2a support.
 577         * sh-opc.h (arch_sh2a_base): Renumber.
 578         (arch_sh2a_nofpu_base): Remove.
 579         (arch_sh_base_mask): Adjust.
 580         (arch_opann_mask): New.
 581         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 582         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 583         (sh_table): Adjust whitespace.
 584         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 585         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 586         instruction list throughout.
 587         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 588         of arch_sh2a in instruction list throughout.
 589         (arch_sh2e_up): Accomodate above changes.
 590         (arch_sh2_up): Ditto.
 591         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 592         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 593         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 594         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 595         * sh-opc.h (arch_sh2a_nofpu): New.
 596         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 597         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 598         instruction.
 599         2004-01-20  DJ Delorie  <dj@redhat.com>
 600         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 601         2003-12-29  DJ Delorie  <dj@redhat.com>
 602         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 603         sh_opcode_info, sh_table): Add sh2a support.
 604         (arch_op32): New, to tag 32-bit opcodes.
 605         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 606         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 607         * sh-opc.h (arch_sh2a): Add.
 608         * sh-dis.c (arch_sh2a): Handle.
 609         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 610
 611 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 612
 613         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 614
 615 2004-07-22  Nick Clifton  <nickc@redhat.com>
 616
 617         PR/280
 618         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 619         insns - this is done by objdump itself.
 620         * h8500-dis.c (print_insn_h8500): Likewise.
 621
 622 2004-07-21  Jan Beulich <jbeulich@novell.com>
 623
 624         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 625         regardless of address size prefix in effect.
 626         (ptr_reg): Size or address registers does not depend on rex64, but
 627         on the presence of an address size override.
 628         (OP_MMX): Use rex.x only for xmm registers.
 629         (OP_EM): Use rex.z only for xmm registers.
 630
 631 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 632
 633         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 634         move/branch operations to the bottom so that VR5400 multimedia
 635         instructions take precedence in disassembly.
 636
 637 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 638
 639         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 640         ISA-specific "break" encoding.
 641
 642 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 643
 644         * arm-opc.h: Fix typo in comment.
 645
 646 2004-07-11  Andreas Schwab  <schwab@suse.de>
 647
 648         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 649
 650 2004-07-09  Andreas Schwab  <schwab@suse.de>
 651
 652         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 653
 654 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 655
 656         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 657         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 658         (crx-dis.lo): New target.
 659         (crx-opc.lo): Likewise.
 660         * Makefile.in: Regenerate.
 661         * configure.in: Handle bfd_crx_arch.
 662         * configure: Regenerate.
 663         * crx-dis.c: New file.
 664         * crx-opc.c: New file.
 665         * disassemble.c (ARCH_crx): Define.
 666         (disassembler): Handle ARCH_crx.
 667
 668 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 669
 670         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 671         * ia64-asmtab.c: Regnerate.
 672
 673 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 674
 675         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 676         (extract_fxm): Don't test dialect.
 677         (XFXFXM_MASK): Include the power4 bit.
 678         (XFXM): Add p4 param.
 679         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 680
 681 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 682
 683         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 684         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 685
 686 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 687
 688         * ppc-opc.c (BH, XLBH_MASK): Define.
 689         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 690
 691 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 692
 693         * i386-dis.c (x_mode): Comment.
 694         (two_source_ops): File scope.
 695         (float_mem): Correct fisttpll and fistpll.
 696         (float_mem_mode): New table.
 697         (dofloat): Use it.
 698         (OP_E): Correct intel mode PTR output.
 699         (ptr_reg): Use open_char and close_char.
 700         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 701         operands.  Set two_source_ops.
 702
 703 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 704
 705         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 706         instead of _raw_size.
 707
 708 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 709
 710         * ia64-gen.c (in_iclass): Handle more postinc st
 711         and ld variants.
 712         * ia64-asmtab.c: Rebuilt.
 713
 714 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 715
 716         * s390-opc.txt: Correct architecture mask for some opcodes.
 717         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 718         in the esa mode as well.
 719
 720 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 721
 722         * sh-dis.c (target_arch): Make unsigned.
 723         (print_insn_sh): Replace (most of) switch with a call to
 724         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 725         * sh-opc.h: Redefine architecture flags values.
 726         Add sh3-nommu architecture.
 727         Reorganise <arch>_up macros so they make more visual sense.
 728         (SH_MERGE_ARCH_SET): Define new macro.
 729         (SH_VALID_BASE_ARCH_SET): Likewise.
 730         (SH_VALID_MMU_ARCH_SET): Likewise.
 731         (SH_VALID_CO_ARCH_SET): Likewise.
 732         (SH_VALID_ARCH_SET): Likewise.
 733         (SH_MERGE_ARCH_SET_VALID): Likewise.
 734         (SH_ARCH_SET_HAS_FPU): Likewise.
 735         (SH_ARCH_SET_HAS_DSP): Likewise.
 736         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 737         (sh_get_arch_from_bfd_mach): Add prototype.
 738         (sh_get_arch_up_from_bfd_mach): Likewise.
 739         (sh_get_bfd_mach_from_arch_set): Likewise.
 740         (sh_merge_bfd_arc): Likewise.
 741
 742 2004-05-24  Peter Barada  <peter@the-baradas.com>
 743
 744         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 745         into new match_insn_m68k function.  Loop over canidate
 746         matches and select first that completely matches.
 747         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 748         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 749         to verify addressing for MAC/EMAC.
 750         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 751         reigster halves since 'fpu' and 'spl' look misleading.
 752         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 753         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 754         first, tighten up match masks.
 755         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 756         'size' from special case code in print_insn_m68k to
 757         determine decode size of insns.
 758
 759 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 760
 761         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 762         well as when -mpower4.
 763
 764 2004-05-13  Nick Clifton  <nickc@redhat.com>
 765
 766         * po/fr.po: Updated French translation.
 767
 768 2004-05-05  Peter Barada  <peter@the-baradas.com>
 769
 770         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 771         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 772         * m68k-op.c: Switch from ColdFire chips to core variants.
 773
 774 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 775
 776         PR 147.
 777         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 778
 779 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 780
 781         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 782         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 783
 784 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 785
 786         * sh-dis.c (print_insn_sh): Print the value in constant pool
 787         as a symbol if it looks like a symbol.
 788
 789 2004-04-22  Peter Barada <peter@the-baradas.com>
 790
 791         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 792         appropriate ColdFire architectures.
 793         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 794         mask addressing.
 795         Add EMAC instructions, fix MAC instructions. Remove
 796         macmw/macml/msacmw/msacml instructions since mask addressing now
 797         supported.
 798
 799 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 800
 801         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 802         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 803         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 804         macro.  Adjust all users.
 805
 806 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 807
 808         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 809         separately.
 810
 811 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 812
 813         * m32r-asm.c: Regenerate.
 814
 815 2004-03-29  Stan Shebs  <shebs@apple.com>
 816
 817         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 818         used.
 819
 820 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 821
 822         * aclocal.m4: Regenerate.
 823         * config.in: Regenerate.
 824         * configure: Regenerate.
 825         * po/POTFILES.in: Regenerate.
 826         * po/opcodes.pot: Regenerate.
 827
 828 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 829
 830         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 831         PPC_OPERANDS_GPR_0.
 832         * ppc-opc.c (RA0): Define.
 833         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 834         (RAOPT): Rename from RAO.  Update all uses.
 835         (powerpc_opcodes): Use RA0 as appropriate.
 836
 837 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 838
 839         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 840
 841 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 842
 843         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 844
 845 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 846
 847         * i386-dis.c (GRPPLOCK): Delete.
 848         (grps): Delete GRPPLOCK entry.
 849
 850 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 851
 852         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 853         (M, Mp): Use OP_M.
 854         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 855         (GRPPADLCK): Define.
 856         (dis386): Use NOP_Fixup on "nop".
 857         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 858         (twobyte_has_modrm): Set for 0xa7.
 859         (padlock_table): Delete.  Move to..
 860         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 861         and clflush.
 862         (print_insn): Revert PADLOCK_SPECIAL code.
 863         (OP_E): Delete sfence, lfence, mfence checks.
 864
 865 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 866
 867         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 868         (INVLPG_Fixup): New function.
 869         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 870
 871 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 872
 873         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 874         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 875         (padlock_table): New struct with PadLock instructions.
 876         (print_insn): Handle PADLOCK_SPECIAL.
 877
 878 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 879
 880         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 881         (OP_E): Twiddle clflush to sfence here.
 882
 883 2004-03-08  Nick Clifton  <nickc@redhat.com>
 884
 885         * po/de.po: Updated German translation.
 886
 887 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 888
 889         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 890         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 891         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 892         accordingly.
 893
 894 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 895
 896         * frv-asm.c: Regenerate.
 897         * frv-desc.c: Regenerate.
 898         * frv-desc.h: Regenerate.
 899         * frv-dis.c: Regenerate.
 900         * frv-ibld.c: Regenerate.
 901         * frv-opc.c: Regenerate.
 902         * frv-opc.h: Regenerate.
 903
 904 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 905
 906         * frv-desc.c, frv-opc.c: Regenerate.
 907
 908 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 909
 910         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 911
 912 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 913
 914         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 915         Also correct mistake in the comment.
 916
 917 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 918
 919         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 920         ensure that double registers have even numbers.
 921         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 922         that reserved instruction 0xfffd does not decode the same
 923         as 0xfdfd (ftrv).
 924         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 925         REG_N refers to a double register.
 926         Add REG_N_B01 nibble type and use it instead of REG_NM
 927         in ftrv.
 928         Adjust the bit patterns in a few comments.
 929
 930 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 931
 932         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 933
 934 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 935
 936         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 937
 938 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 939
 940         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 941
 942 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 943
 944         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 945         mtivor32, mtivor33, mtivor34.
 946
 947 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 948
 949         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 950
 951 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 952
 953         * arm-opc.h Maverick accumulator register opcode fixes.
 954
 955 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 956
 957         * m32r-dis.c: Regenerate.
 958
 959 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 960
 961         * sh-opc.h (sh_table): "fsrra", not "fssra".
 962
 963 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 964
 965         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 966         contraints.
 967
 968 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 969
 970         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 971
 972 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 973
 974         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 975         1.  Don't print scale factor on AT&T mode when index missing.
 976
 977 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 978
 979         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 980         when loaded into XR registers.
 981
 982 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 983
 984         * frv-desc.h: Regenerate.
 985         * frv-desc.c: Regenerate.
 986         * frv-opc.c: Regenerate.
 987
 988 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 989
 990         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 991
 992 2004-01-09  Paul Brook  <paul@codesourcery.com>
 993
 994         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 995         specific opcodes.
 996
 997 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 998
 999         * Makefile.am (libopcodes_la_DEPENDENCIES)
1000         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1001         comment about the problem.
1002         * Makefile.in: Regenerate.
1003
1004 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1005
1006         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1007         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1008         cut&paste errors in shifting/truncating numerical operands.
1009         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1010         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1011         (parse_uslo16): Likewise.
1012         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1013         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1014         (parse_s12): Likewise.
1015         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1016         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1017         (parse_uslo16): Likewise.
1018         (parse_uhi16): Parse gothi and gotfuncdeschi.
1019         (parse_d12): Parse got12 and gotfuncdesc12.
1020         (parse_s12): Likewise.
1021
1022 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1023
1024         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1025         instruction which looks similar to an 'rla' instruction.
1026
1027 For older changes see ChangeLog-0203
1028 \f
1029 Local Variables:
1030 mode: change-log
1031 left-margin: 8
1032 fill-column: 74
1033 version-control: never
1034 End: