opcodes/ChangeLog

   1 2018-03-08  Jan Beulich  <jbeulich@suse.com>
   2
   3         * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
   4         forms.
   5         * i386-tlb.h: Re-generate.
   6
   7 2018-03-07  Alan Modra  <amodra@gmail.com>
   8
   9         * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
  10         bfd_arch_rs6000.
  11         * disassemble.h (print_insn_rs6000): Delete.
  12         * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
  13         (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
  14         (print_insn_rs6000): Delete.
  15
  16 2018-03-03  Alan Modra  <amodra@gmail.com>
  17
  18         * sysdep.h (opcodes_error_handler): Define.
  19         (_bfd_error_handler): Declare.
  20         * Makefile.am: Remove stray #.
  21         * opc2c.c (main): Remove bogus -l arg handling.  Print "DO NOT
  22         EDIT" comment.
  23         * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
  24         * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
  25         * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
  26         opcodes_error_handler to print errors.  Standardize error messages.
  27         * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
  28         and include opintl.h.
  29         * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
  30         * i386-gen.c: Standardize error messages.
  31         * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
  32         * Makefile.in: Regenerate.
  33         * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
  34         * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
  35         * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
  36         * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
  37         * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
  38         * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
  39         * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
  40         * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
  41         * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
  42         * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
  43         * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
  44         * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
  45         * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
  46
  47 2018-03-01  H.J. Lu  <hongjiu.lu@intel.com>
  48
  49         * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
  50         vpsub[bwdq] instructions.
  51         * i386-tbl.h: Regenerated.
  52
  53 2018-03-01  Alan Modra  <amodra@gmail.com>
  54
  55         * configure.ac (ALL_LINGUAS): Sort.
  56         * configure: Regenerate.
  57
  58 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  59
  60         * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
  61         macro by assignements.
  62
  63 2018-02-27  H.J. Lu  <hongjiu.lu@intel.com>
  64
  65         PR gas/22871
  66         * i386-gen.c (opcode_modifiers): Add Optimize.
  67         * i386-opc.h (Optimize): New enum.
  68         (i386_opcode_modifier): Add optimize.
  69         * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
  70         "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
  71         "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
  72         "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
  73         vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
  74         vpxord and vpxorq.
  75         * i386-tbl.h: Regenerated.
  76
  77 2018-02-26  Alan Modra  <amodra@gmail.com>
  78
  79         * crx-dis.c (getregliststring): Allocate a large enough buffer
  80         to silence false positive gcc8 warning.
  81
  82 2018-02-22  Shea Levy <shea@shealevy.com>
  83
  84         * disassemble.c (ARCH_riscv): Define if ARCH_all.
  85
  86 2018-02-22  H.J. Lu  <hongjiu.lu@intel.com>
  87
  88         * i386-opc.tbl: Add {rex},
  89         * i386-tbl.h: Regenerated.
  90
  91 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
  92
  93         * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
  94         (mips16_opcodes): Replace `M' with `m' for "restore".
  95
  96 2018-02-19  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  97
  98         * arm-dis.c (thumb_opcodes): Fix BXNS mask.
  99
 100 2018-02-13  Maciej W. Rozycki  <macro@mips.com>
 101
 102         * wasm32-dis.c (print_insn_wasm32): Rename `index' local
 103         variable to `function_index'.
 104
 105 2018-02-13  Nick Clifton  <nickc@redhat.com>
 106
 107         PR 22823
 108         * metag-dis.c (print_fmmov): Double buffer size to avoid warning
 109         about truncation of printing.
 110
 111 2018-02-12  Henry Wong <henry@stuffedcow.net>
 112
 113         * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
 114
 115 2018-02-05  Nick Clifton  <nickc@redhat.com>
 116
 117         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 118
 119 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 120
 121         * i386-dis.c (enum): Add pconfig.
 122         * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
 123         (cpu_flags): Add CpuPCONFIG.
 124         * i386-opc.h (enum): Add CpuPCONFIG.
 125         (i386_cpu_flags): Add cpupconfig.
 126         * i386-opc.tbl: Add PCONFIG instruction.
 127         * i386-init.h: Regenerate.
 128         * i386-tbl.h: Likewise.
 129
 130 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 131
 132         * i386-dis.c (enum): Add PREFIX_0F09.
 133         * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
 134         (cpu_flags): Add CpuWBNOINVD.
 135         * i386-opc.h (enum): Add CpuWBNOINVD.
 136         (i386_cpu_flags): Add cpuwbnoinvd.
 137         * i386-opc.tbl: Add WBNOINVD instruction.
 138         * i386-init.h: Regenerate.
 139         * i386-tbl.h: Likewise.
 140
 141 2018-01-17  Jim Wilson  <jimw@sifive.com>
 142
 143         * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
 144
 145 2018-01-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 146
 147         * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
 148         Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
 149         CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
 150         (cpu_flags): Add CpuIBT, CpuSHSTK.
 151         * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
 152         (i386_cpu_flags): Add cpuibt, cpushstk.
 153         * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
 154         * i386-init.h: Regenerate.
 155         * i386-tbl.h: Likewise.
 156
 157 2018-01-16  Nick Clifton  <nickc@redhat.com>
 158
 159         * po/pt_BR.po: Updated Brazilian Portugese translation.
 160         * po/de.po: Updated German translation.
 161
 162 2018-01-15  Jim Wilson  <jimw@sifive.com>
 163
 164         * riscv-opc.c (match_c_nop): New.
 165         (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
 166
 167 2018-01-15  Nick Clifton  <nickc@redhat.com>
 168
 169         * po/uk.po: Updated Ukranian translation.
 170
 171 2018-01-13  Nick Clifton  <nickc@redhat.com>
 172
 173         * po/opcodes.pot: Regenerated.
 174
 175 2018-01-13  Nick Clifton  <nickc@redhat.com>
 176
 177         * configure: Regenerate.
 178
 179 2018-01-13  Nick Clifton  <nickc@redhat.com>
 180
 181         2.30 branch created.
 182
 183 2018-01-11  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 184
 185         * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
 186         * i386-tbl.h: Regenerate.
 187
 188 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 189
 190         * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
 191         * i386-tbl.h: Re-generate.
 192
 193 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 194
 195         * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
 196         vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
 197         vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
 198         vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
 199         vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
 200         Disp8MemShift of AVX512VL forms.
 201         * i386-tbl.h: Re-generate.
 202
 203 2018-01-09  Jim Wilson  <jimw@sifive.com>
 204
 205         * riscv-dis.c (maybe_print_address): If base_reg is zero,
 206         then the hi_addr value is zero.
 207
 208 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 209
 210         * arm-dis.c (arm_opcodes): Add csdb.
 211         (thumb32_opcodes): Add csdb.
 212
 213 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 214
 215         * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
 216         * aarch64-asm-2.c: Regenerate.
 217         * aarch64-dis-2.c: Regenerate.
 218         * aarch64-opc-2.c: Regenerate.
 219
 220 2018-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 221
 222         PR gas/22681
 223         * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
 224         Remove AVX512 vmovd with 64-bit operands.
 225         * i386-tbl.h: Regenerated.
 226
 227 2018-01-05  Jim Wilson  <jimw@sifive.com>
 228
 229         * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
 230         jalr.
 231
 232 2018-01-03  Alan Modra  <amodra@gmail.com>
 233
 234         Update year range in copyright notice of all files.
 235
 236 2018-01-02  Jan Beulich  <jbeulich@suse.com>
 237
 238         * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
 239         and OPERAND_TYPE_REGZMM entries.
 240
 241 For older changes see ChangeLog-2017
 242 \f
 243 Copyright (C) 2018 Free Software Foundation, Inc.
 244
 245 Copying and distribution of this file, with or without modification,
 246 are permitted in any medium without royalty provided the copyright
 247 notice and this notice are preserved.
 248
 249 Local Variables:
 250 mode: change-log
 251 left-margin: 8
 252 fill-column: 74
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 254 End: