1 2018-05-07 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-gen.c (opcode_modifiers): Replace AddrPrefixOp0 with
5 * i386-opc.h (AddrPrefixOp0): Renamed to ...
6 (AddrPrefixOpReg): This.
7 (i386_opcode_modifier): Rename addrprefixop0 to addrprefixopreg.
8 * i386-opc.tbl: Replace AddrPrefixOp0 with AddrPrefixOpReg.
10 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
12 * ppc-opc.c (powerpc_num_opcodes): Change type to unsigned.
13 (vle_num_opcodes): Likewise.
14 (spe2_num_opcodes): Likewise.
15 * ppc-dis.c (disassemble_init_powerpc) <powerpc_opcd_indices>: Rewrite
17 (disassemble_init_powerpc) <vle_opcd_indices>: Likewise.
18 (disassemble_init_powerpc) <spe2_opcd_indices>: Likewise. Initialize
21 2018-05-01 Tamar Christina <tamar.christina@arm.com>
23 * aarch64-dis.c (aarch64_opcode_decode): Moved memory clear code.
25 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
27 Makefile.am: Added nfp-dis.c.
28 configure.ac: Added bfd_nfp_arch.
29 disassemble.h: Added print_insn_nfp prototype.
30 disassemble.c: Added ARCH_nfp and call to print_insn_nfp
31 nfp-dis.c: New, for NFP support.
32 po/POTFILES.in: Added nfp-dis.c to the list.
33 Makefile.in: Regenerate.
34 configure: Regenerate.
36 2018-04-26 Jan Beulich <jbeulich@suse.com>
38 * i386-opc.tbl: Fold various non-memory operand AVX512VL
39 templates into their base ones.
40 * i386-tlb.h: Re-generate.
42 2018-04-26 Jan Beulich <jbeulich@suse.com>
44 * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
45 CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
46 CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
47 CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
48 * i386-init.h: Re-generate.
50 2018-04-26 Jan Beulich <jbeulich@suse.com>
52 * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
53 CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
54 CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
55 Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
57 (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
59 * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
61 (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
62 cpuregzmm, and cpuregmask.
63 * i386-init.h: Re-generate.
64 * i386-tbl.h: Re-generate.
66 2018-04-26 Jan Beulich <jbeulich@suse.com>
68 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
69 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
70 * i386-init.h: Re-generate.
72 2018-04-26 Jan Beulich <jbeulich@suse.com>
74 * i386-gen.c (VexImmExt): Delete.
75 * i386-opc.h (VexImmExt, veximmext): Delete.
76 * i386-opc.tbl: Drop all VexImmExt uses.
77 * i386-tlb.h: Re-generate.
79 2018-04-25 Jan Beulich <jbeulich@suse.com>
81 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
83 * i386-tlb.h: Re-generate.
85 2018-04-25 Tamar Christina <tamar.christina@arm.com>
87 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
89 2018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
91 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
93 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
94 (cpu_flags): Add CpuCLDEMOTE.
95 * i386-init.h: Regenerate.
96 * i386-opc.h (enum): Add CpuCLDEMOTE,
97 (i386_cpu_flags): Add cpucldemote.
98 * i386-opc.tbl: Add cldemote.
99 * i386-tbl.h: Regenerate.
101 2018-04-16 Alan Modra <amodra@gmail.com>
103 * Makefile.am: Remove sh5 and sh64 support.
104 * configure.ac: Likewise.
105 * disassemble.c: Likewise.
106 * disassemble.h: Likewise.
107 * sh-dis.c: Likewise.
108 * sh64-dis.c: Delete.
109 * sh64-opc.c: Delete.
110 * sh64-opc.h: Delete.
111 * Makefile.in: Regenerate.
112 * configure: Regenerate.
113 * po/POTFILES.in: Regenerate.
115 2018-04-16 Alan Modra <amodra@gmail.com>
117 * Makefile.am: Remove w65 support.
118 * configure.ac: Likewise.
119 * disassemble.c: Likewise.
120 * disassemble.h: Likewise.
123 * Makefile.in: Regenerate.
124 * configure: Regenerate.
125 * po/POTFILES.in: Regenerate.
127 2018-04-16 Alan Modra <amodra@gmail.com>
129 * configure.ac: Remove we32k support.
130 * configure: Regenerate.
132 2018-04-16 Alan Modra <amodra@gmail.com>
134 * Makefile.am: Remove m88k support.
135 * configure.ac: Likewise.
136 * disassemble.c: Likewise.
137 * disassemble.h: Likewise.
138 * m88k-dis.c: Delete.
139 * Makefile.in: Regenerate.
140 * configure: Regenerate.
141 * po/POTFILES.in: Regenerate.
143 2018-04-16 Alan Modra <amodra@gmail.com>
145 * Makefile.am: Remove i370 support.
146 * configure.ac: Likewise.
147 * disassemble.c: Likewise.
148 * disassemble.h: Likewise.
149 * i370-dis.c: Delete.
150 * i370-opc.c: Delete.
151 * Makefile.in: Regenerate.
152 * configure: Regenerate.
153 * po/POTFILES.in: Regenerate.
155 2018-04-16 Alan Modra <amodra@gmail.com>
157 * Makefile.am: Remove h8500 support.
158 * configure.ac: Likewise.
159 * disassemble.c: Likewise.
160 * disassemble.h: Likewise.
161 * h8500-dis.c: Delete.
162 * h8500-opc.h: Delete.
163 * Makefile.in: Regenerate.
164 * configure: Regenerate.
165 * po/POTFILES.in: Regenerate.
167 2018-04-16 Alan Modra <amodra@gmail.com>
169 * configure.ac: Remove tahoe support.
170 * configure: Regenerate.
172 2018-04-15 H.J. Lu <hongjiu.lu@intel.com>
174 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
176 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
178 * i386-tbl.h: Regenerated.
180 2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
182 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
183 PREFIX_MOD_1_0FAE_REG_6.
185 (OP_E_register): Use va_mode.
186 * i386-dis-evex.h (prefix_table):
187 New instructions (see prefixes above).
188 * i386-gen.c (cpu_flag_init): Add WAITPKG.
189 (cpu_flags): Likewise.
190 * i386-opc.h (enum): Likewise.
191 (i386_cpu_flags): Likewise.
192 * i386-opc.tbl: Add umonitor, umwait, tpause.
193 * i386-init.h: Regenerate.
194 * i386-tbl.h: Likewise.
196 2018-04-11 Alan Modra <amodra@gmail.com>
198 * opcodes/i860-dis.c: Delete.
199 * opcodes/i960-dis.c: Delete.
200 * Makefile.am: Remove i860 and i960 support.
201 * configure.ac: Likewise.
202 * disassemble.c: Likewise.
203 * disassemble.h: Likewise.
204 * Makefile.in: Regenerate.
205 * configure: Regenerate.
206 * po/POTFILES.in: Regenerate.
208 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
211 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
213 (print_insn): Clear vex instead of vex.evex.
215 2018-04-04 Nick Clifton <nickc@redhat.com>
217 * po/es.po: Updated Spanish translation.
219 2018-03-28 Jan Beulich <jbeulich@suse.com>
221 * i386-gen.c (opcode_modifiers): Delete VecESize.
222 * i386-opc.h (VecESize): Delete.
223 (struct i386_opcode_modifier): Delete vecesize.
224 * i386-opc.tbl: Drop VecESize.
225 * i386-tlb.h: Re-generate.
227 2018-03-28 Jan Beulich <jbeulich@suse.com>
229 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
230 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
231 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
232 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
233 * i386-tlb.h: Re-generate.
235 2018-03-28 Jan Beulich <jbeulich@suse.com>
237 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
239 * i386-tlb.h: Re-generate.
241 2018-03-28 Jan Beulich <jbeulich@suse.com>
243 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
244 (vex_len_table): Drop Y for vcvt*2si.
245 (putop): Replace plain 'Y' handling by abort().
247 2018-03-28 Nick Clifton <nickc@redhat.com>
250 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
251 instructions with only a base address register.
252 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
253 handle AARHC64_OPND_SVE_ADDR_R.
254 (aarch64_print_operand): Likewise.
255 * aarch64-asm-2.c: Regenerate.
256 * aarch64_dis-2.c: Regenerate.
257 * aarch64-opc-2.c: Regenerate.
259 2018-03-22 Jan Beulich <jbeulich@suse.com>
261 * i386-opc.tbl: Drop VecESize from register only insn forms and
262 memory forms not allowing broadcast.
263 * i386-tlb.h: Re-generate.
265 2018-03-22 Jan Beulich <jbeulich@suse.com>
267 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
268 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
269 sha256*): Drop Disp<N>.
271 2018-03-22 Jan Beulich <jbeulich@suse.com>
273 * i386-dis.c (EbndS, bnd_swap_mode): New.
274 (prefix_table): Use EbndS.
275 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
276 * i386-opc.tbl (bndmov): Move misplaced Load.
277 * i386-tlb.h: Re-generate.
279 2018-03-22 Jan Beulich <jbeulich@suse.com>
281 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
282 templates allowing memory operands and folded ones for register
284 * i386-tlb.h: Re-generate.
286 2018-03-22 Jan Beulich <jbeulich@suse.com>
288 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
289 256-bit templates. Drop redundant leftover Disp<N>.
290 * i386-tlb.h: Re-generate.
292 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
294 * riscv-opc.c (riscv_insn_types): New.
296 2018-03-13 Nick Clifton <nickc@redhat.com>
298 * po/pt_BR.po: Updated Brazilian Portuguese translation.
300 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
302 * i386-opc.tbl: Add Optimize to clr.
303 * i386-tbl.h: Regenerated.
305 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
307 * i386-gen.c (opcode_modifiers): Remove OldGcc.
308 * i386-opc.h (OldGcc): Removed.
309 (i386_opcode_modifier): Remove oldgcc.
310 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
311 instructions for old (<= 2.8.1) versions of gcc.
312 * i386-tbl.h: Regenerated.
314 2018-03-08 Jan Beulich <jbeulich@suse.com>
316 * i386-opc.h (EVEXDYN): New.
317 * i386-opc.tbl: Fold various AVX512VL templates.
318 * i386-tlb.h: Re-generate.
320 2018-03-08 Jan Beulich <jbeulich@suse.com>
322 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
323 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
324 vpexpandd, vpexpandq): Fold AFX512VF templates.
325 * i386-tlb.h: Re-generate.
327 2018-03-08 Jan Beulich <jbeulich@suse.com>
329 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
330 Fold 128- and 256-bit VEX-encoded templates.
331 * i386-tlb.h: Re-generate.
333 2018-03-08 Jan Beulich <jbeulich@suse.com>
335 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
336 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
337 vpexpandd, vpexpandq): Fold AVX512F templates.
338 * i386-tlb.h: Re-generate.
340 2018-03-08 Jan Beulich <jbeulich@suse.com>
342 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
343 64-bit templates. Drop Disp<N>.
344 * i386-tlb.h: Re-generate.
346 2018-03-08 Jan Beulich <jbeulich@suse.com>
348 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
349 and 256-bit templates.
350 * i386-tlb.h: Re-generate.
352 2018-03-08 Jan Beulich <jbeulich@suse.com>
354 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
355 * i386-tlb.h: Re-generate.
357 2018-03-08 Jan Beulich <jbeulich@suse.com>
359 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
361 * i386-tlb.h: Re-generate.
363 2018-03-08 Jan Beulich <jbeulich@suse.com>
365 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
366 * i386-tlb.h: Re-generate.
368 2018-03-08 Jan Beulich <jbeulich@suse.com>
370 * i386-gen.c (opcode_modifiers): Delete FloatD.
371 * i386-opc.h (FloatD): Delete.
372 (struct i386_opcode_modifier): Delete floatd.
373 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
375 * i386-tlb.h: Re-generate.
377 2018-03-08 Jan Beulich <jbeulich@suse.com>
379 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
381 2018-03-08 Jan Beulich <jbeulich@suse.com>
383 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
384 * i386-tlb.h: Re-generate.
386 2018-03-08 Jan Beulich <jbeulich@suse.com>
388 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
390 * i386-tlb.h: Re-generate.
392 2018-03-07 Alan Modra <amodra@gmail.com>
394 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
396 * disassemble.h (print_insn_rs6000): Delete.
397 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
398 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
399 (print_insn_rs6000): Delete.
401 2018-03-03 Alan Modra <amodra@gmail.com>
403 * sysdep.h (opcodes_error_handler): Define.
404 (_bfd_error_handler): Declare.
405 * Makefile.am: Remove stray #.
406 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
408 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
409 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
410 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
411 opcodes_error_handler to print errors. Standardize error messages.
412 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
413 and include opintl.h.
414 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
415 * i386-gen.c: Standardize error messages.
416 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
417 * Makefile.in: Regenerate.
418 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
419 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
420 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
421 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
422 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
423 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
424 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
425 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
426 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
427 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
428 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
429 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
430 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
432 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
434 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
435 vpsub[bwdq] instructions.
436 * i386-tbl.h: Regenerated.
438 2018-03-01 Alan Modra <amodra@gmail.com>
440 * configure.ac (ALL_LINGUAS): Sort.
441 * configure: Regenerate.
443 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
445 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
446 macro by assignements.
448 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
451 * i386-gen.c (opcode_modifiers): Add Optimize.
452 * i386-opc.h (Optimize): New enum.
453 (i386_opcode_modifier): Add optimize.
454 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
455 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
456 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
457 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
458 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
460 * i386-tbl.h: Regenerated.
462 2018-02-26 Alan Modra <amodra@gmail.com>
464 * crx-dis.c (getregliststring): Allocate a large enough buffer
465 to silence false positive gcc8 warning.
467 2018-02-22 Shea Levy <shea@shealevy.com>
469 * disassemble.c (ARCH_riscv): Define if ARCH_all.
471 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
473 * i386-opc.tbl: Add {rex},
474 * i386-tbl.h: Regenerated.
476 2018-02-20 Maciej W. Rozycki <macro@mips.com>
478 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
479 (mips16_opcodes): Replace `M' with `m' for "restore".
481 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
483 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
485 2018-02-13 Maciej W. Rozycki <macro@mips.com>
487 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
488 variable to `function_index'.
490 2018-02-13 Nick Clifton <nickc@redhat.com>
493 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
494 about truncation of printing.
496 2018-02-12 Henry Wong <henry@stuffedcow.net>
498 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
500 2018-02-05 Nick Clifton <nickc@redhat.com>
502 * po/pt_BR.po: Updated Brazilian Portuguese translation.
504 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
506 * i386-dis.c (enum): Add pconfig.
507 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
508 (cpu_flags): Add CpuPCONFIG.
509 * i386-opc.h (enum): Add CpuPCONFIG.
510 (i386_cpu_flags): Add cpupconfig.
511 * i386-opc.tbl: Add PCONFIG instruction.
512 * i386-init.h: Regenerate.
513 * i386-tbl.h: Likewise.
515 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
517 * i386-dis.c (enum): Add PREFIX_0F09.
518 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
519 (cpu_flags): Add CpuWBNOINVD.
520 * i386-opc.h (enum): Add CpuWBNOINVD.
521 (i386_cpu_flags): Add cpuwbnoinvd.
522 * i386-opc.tbl: Add WBNOINVD instruction.
523 * i386-init.h: Regenerate.
524 * i386-tbl.h: Likewise.
526 2018-01-17 Jim Wilson <jimw@sifive.com>
528 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
530 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
532 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
533 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
534 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
535 (cpu_flags): Add CpuIBT, CpuSHSTK.
536 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
537 (i386_cpu_flags): Add cpuibt, cpushstk.
538 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
539 * i386-init.h: Regenerate.
540 * i386-tbl.h: Likewise.
542 2018-01-16 Nick Clifton <nickc@redhat.com>
544 * po/pt_BR.po: Updated Brazilian Portugese translation.
545 * po/de.po: Updated German translation.
547 2018-01-15 Jim Wilson <jimw@sifive.com>
549 * riscv-opc.c (match_c_nop): New.
550 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
552 2018-01-15 Nick Clifton <nickc@redhat.com>
554 * po/uk.po: Updated Ukranian translation.
556 2018-01-13 Nick Clifton <nickc@redhat.com>
558 * po/opcodes.pot: Regenerated.
560 2018-01-13 Nick Clifton <nickc@redhat.com>
562 * configure: Regenerate.
564 2018-01-13 Nick Clifton <nickc@redhat.com>
568 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
570 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
571 * i386-tbl.h: Regenerate.
573 2018-01-10 Jan Beulich <jbeulich@suse.com>
575 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
576 * i386-tbl.h: Re-generate.
578 2018-01-10 Jan Beulich <jbeulich@suse.com>
580 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
581 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
582 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
583 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
584 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
585 Disp8MemShift of AVX512VL forms.
586 * i386-tbl.h: Re-generate.
588 2018-01-09 Jim Wilson <jimw@sifive.com>
590 * riscv-dis.c (maybe_print_address): If base_reg is zero,
591 then the hi_addr value is zero.
593 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
595 * arm-dis.c (arm_opcodes): Add csdb.
596 (thumb32_opcodes): Add csdb.
598 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
600 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
601 * aarch64-asm-2.c: Regenerate.
602 * aarch64-dis-2.c: Regenerate.
603 * aarch64-opc-2.c: Regenerate.
605 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
608 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
609 Remove AVX512 vmovd with 64-bit operands.
610 * i386-tbl.h: Regenerated.
612 2018-01-05 Jim Wilson <jimw@sifive.com>
614 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
617 2018-01-03 Alan Modra <amodra@gmail.com>
619 Update year range in copyright notice of all files.
621 2018-01-02 Jan Beulich <jbeulich@suse.com>
623 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
624 and OPERAND_TYPE_REGZMM entries.
626 For older changes see ChangeLog-2017
628 Copyright (C) 2018 Free Software Foundation, Inc.
630 Copying and distribution of this file, with or without modification,
631 are permitted in any medium without royalty provided the copyright
632 notice and this notice are preserved.
638 version-control: never