opcodes/ChangeLog

   1 2012-11-23  Alan Modra  <amodra@gmail.com>
   2
   3         * ppc-dis.c (ppc_parse_cpu): Add "sticky" param.  Track bits
   4         set from ppc_opts.sticky in it.  Delete "retain_mask".
   5         (powerpc_init_dialect): Choose default dialect from info->mach
   6         before parsing -M options.  Handle more bfd_mach_ppc variants.
   7         Update common default to power7.
   8
   9 2012-11-21  David Holsgrove  <david.holsgrove@xilinx.com>
  10
  11         * microblaze-opc.h (op_code_struct): Add swapb, swaph Increase MAX_OPCODES.
  12         * microblaze-opcm.h (microblaze_instr): Likewise
  13
  14 2012-11-21  Edgar E. Iglesias <edgar.iglesias@gmail.com>
  15
  16         * microblaze-opcm.h: Add REG_SLR_MASK, REG_SHR_MASK, REG_SHR and REG_SLR
  17         * microblaze-dis.c (get_field_special): Handle REG_SLR_MASK and REG_SHR_MASK
  18
  19 2012-11-20  Kirill Yukhin  <kirill.yukhin@intel.com>
  20             H.J. Lu  <hongjiu.lu@intel.com>
  21
  22         PR gas/14859
  23         * i386-opc.tbl: Fix opcode for 64-bit jecxz.
  24         * i386-tbl.h: Regenerated.
  25
  26 2012-11-20  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  27
  28         * s390-opc.txt: Fix srstu and strag opcodes.
  29
  30 2012-11-14  David Holsgrove  <david.holsgrove@xilinx.com>
  31
  32         * microblaze-opc.h: Define new instruction type INST_TYPE_IMM5,
  33         update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5,
  34         and increase MAX_OPCODES.
  35         (op_code_struct):  add mbar and sleep
  36         * microblaze-opcm.h (microblaze_instr): add mbar
  37         Define IMM_MBAR and IMM5_MBAR_MASK
  38         * microblaze-dis.c: Add get_field_imm5_mbar
  39         (print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE
  40
  41 2012-11-14  Edgar E. Iglesias <edgar.iglesias@gmail.com>
  42
  43         * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add clz insn
  44         * microblaze-opcm.h (microblaze_instr): add clz
  45
  46 2012-11-14  Edgar E. Iglesias <edgar.iglesias@gmail.com>
  47
  48         * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add lbur,
  49         lhur, lwr, sbr, shr, swr
  50         * microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr,
  51         swr
  52
  53 2012-11-09  Nick Clifton  <nickc@redhat.com>
  54
  55         * configure.in: Add bfd_v850_rh850_arch.
  56         * configure: Regenerate.
  57         * disassemble.c (disassembler): Likewise.
  58
  59 2012-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  60
  61         * aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
  62         * ia64-gen.c (fetch_insn_class): Likewise.
  63
  64 2012-11-08  Alan Modra  <amodra@gmail.com>
  65
  66         * po/POTFILES.in: Regenerate.
  67
  68 2012-11-05  Alan Modra  <amodra@gmail.com>
  69
  70         * configure.in: Apply 2012-09-10 change to config.in here.
  71
  72 2012-10-26  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  73
  74         * s390-mkopc.c: Accept empty lines in s390-opc.txt.
  75         * s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2
  76         and RRF_RMRR.
  77         * s390-opc.txt: Add new instructions.  New instruction type for lptea.
  78
  79 2012-10-26  Christian Groessler  <chris@groessler.org>
  80
  81         * z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
  82         trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb).  Remove
  83         non-existing opcode trtrb.
  84         * z8k-opc.h: Regenerate.
  85
  86 2012-10-26  Alan Modra  <amodra@gmail.com>
  87
  88         * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
  89
  90 2012-10-24  Roland McGrath  <mcgrathr@google.com>
  91
  92         * i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
  93         set rex_used to rex.
  94
  95 2012-10-22  Peter Bergner  <bergner@vnet.ibm.com>
  96
  97         * ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
  98
  99 2012-10-18  Tom Tromey  <tromey@redhat.com>
 100
 101         * tic54x-dis.c (print_instruction): Don't use K&R style.
 102         (print_parallel_instruction, sprint_dual_address)
 103         (sprint_indirect_address, sprint_direct_address, sprint_mmr)
 104         (sprint_cc2, sprint_condition): Likewise.
 105
 106 2012-10-18  Kai Tietz  <ktietz@redhat.com>
 107
 108         * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
 109         value with a default.
 110         (do_special_encoding): Likewise.
 111         (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
 112         variables with default.
 113         * arc-dis.c (write_comments_): Don't use strncat due
 114         size of state->commentBuffer pointer isn't predictable.
 115
 116 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
 117
 118         * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
 119         rmr_el3; remove daifset and daifclr.
 120
 121 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
 122
 123         * aarch64-opc.c (operand_general_constraint_met_p): Change to check
 124         the alignment of addr.offset.imm instead of that of shifter.amount for
 125         operand type AARCH64_OPND_ADDR_UIMM12.
 126
 127 2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 128
 129         * arm-dis.c: Use preferred form of vrint instruction variants
 130         for disassembly.
 131
 132 2012-10-09  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 133
 134         * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
 135         * i386-init.h: Regenerated.
 136
 137 2012-10-05  Peter Bergner  <bergner@vnet.ibm.com>
 138
 139         * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
 140         * ppc-opc.c (VBA): New define.
 141         (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
 142         mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
 143
 144 2012-10-04  Nick Clifton  <nickc@redhat.com>
 145
 146         * v850-dis.c (disassemble): Place square parentheses around second
 147         register operand of clr1, not1, set1 and tst1 instructions.
 148
 149 2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 150
 151         * s390-mkopc.c: Support new option zEC12.
 152         * s390-opc.c: Add new instruction formats.
 153         * s390-opc.txt: Add new instructions for zEC12.
 154
 155 2012-09-27  Anthony Green  <green@moxielogic.com>
 156
 157         * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
 158         * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
 159
 160 2012-09-25  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 161
 162         * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
 163         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
 164         and CPU_BTVER2_FLAGS.
 165         * i386-init.h: Regenerated.
 166
 167 2012-09-20  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 168
 169         * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
 170         CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
 171         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
 172         CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
 173         (cpu_flags): Add CpuCX16.
 174         * i386-opc.h (CpuCX16): New.
 175         (i386_cpu_flags): Add cpucx16.
 176         * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
 177         * i386-tbl.h: Regenerate.
 178         * i386-init.h: Likewise.
 179
 180 2012-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 181
 182         * arm-dis.c: Changed ldra and strl-form mnemonics
 183         to lda and stl-form.
 184
 185 2012-09-18  Chao-ying Fu  <fu@mips.com>
 186
 187         * micromips-opc.c (micromips_opcodes): Correct the encoding of
 188         the "swxc1" instruction.
 189
 190 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
 191
 192         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
 193         the parameter 'inst'.
 194         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
 195         (convert_mov_to_movewide): Change to assert (0) when
 196         aarch64_wide_constant_p returns FALSE.
 197
 198 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
 199
 200         * configure: Regenerate.
 201
 202 2012-09-14  Anthony Green  <green@moxielogic.com>
 203
 204         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
 205         the address after the branch instruction.
 206
 207 2012-09-13  Anthony Green  <green@moxielogic.com>
 208
 209         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
 210
 211 2012-09-10  Matthias Klose  <doko@ubuntu.com>
 212
 213         * config.in: Disable sanity check for kfreebsd.
 214
 215 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
 216
 217         * configure: Regenerated.
 218
 219 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
 220
 221         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
 222         * ia64-gen.c: Promote completer index type to longlong.
 223         (irf_operand): Add new register recognition.
 224         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
 225         (lookup_specifier): Add new resource recognition.
 226         (insert_bit_table_ent): Relax abort condition according to the
 227         changed completer index type.
 228         (print_dis_table): Fix printf format for completer index.
 229         * ia64-ic.tbl: Add a new instruction class.
 230         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
 231         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
 232         * ia64-opc.h: Define short names for new operand types.
 233         * ia64-raw.tbl: Add new RAW resource for DAHR register.
 234         * ia64-waw.tbl: Add new WAW resource for DAHR register.
 235         * ia64-asmtab.c: Regenerate.
 236
 237 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
 238
 239         * ppc-opc.c (VXASHB_MASK): New define.
 240         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
 241
 242 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
 243
 244         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
 245         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
 246         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
 247         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
 248         vupklsh>: Use VXVA_MASK.
 249         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
 250         <mfvscr>: Use VXVAVB_MASK.
 251         <mtvscr>: Use VXVDVA_MASK.
 252         <vspltb>: Use VXUIMM4_MASK.
 253         <vsplth>: Use VXUIMM3_MASK.
 254         <vspltw>: Use VXUIMM2_MASK.
 255
 256 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 257
 258         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
 259
 260 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 261
 262         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
 263
 264 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 265
 266         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
 267
 268 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 269
 270         * arm-dis.c (neon_opcodes): Add support for AES instructions.
 271
 272 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 273
 274         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
 275         conversions.
 276
 277 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
 278
 279         * arm-dis.c (coprocessor_opcodes): Add VRINT.
 280         (neon_opcodes): Likewise.
 281
 282 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 283
 284         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
 285         variants.
 286         (neon_opcodes): Likewise.
 287
 288 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 289
 290         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 291         (neon_opcodes): Likewise.
 292
 293 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 294
 295         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 296         (print_insn_coprocessor): Add new %<>c bitfield format
 297         specifier.
 298
 299 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 300
 301         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 302         (thumb32_opcodes): Likewise.
 303         (print_arm_insn): Add support for %<>T formatter.
 304
 305 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 306
 307         * arm-dis.c (arm_opcodes): Add HLT.
 308         (thumb_opcodes): Likewise.
 309
 310 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 311
 312         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 313
 314 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 315
 316         * arm-dis.c (arm_opcodes): Add SEVL.
 317         (thumb_opcodes): Likewise.
 318         (thumb32_opcodes): Likewise.
 319
 320 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 321
 322         * arm-dis.c (data_barrier_option): New function.
 323         (print_insn_arm): Use data_barrier_option.
 324         (print_insn_thumb32): Use data_barrier_option.
 325
 326 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 327
 328         * arm-dis.c (COND_UNCOND): New constant.
 329         (print_insn_coprocessor): Add support for %u format specifier.
 330         (print_insn_neon): Likewise.
 331
 332 2012-08-21  David S. Miller  <davem@davemloft.net>
 333
 334         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 335         F3F4 macro.
 336
 337 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 338
 339         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 340         vabsduh, vabsduw, mviwsplt.
 341
 342 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 343
 344         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 345         CPU_BTVER2_FLAGS.
 346
 347         * i386-opc.h: Update CpuPRFCHW comment.
 348
 349         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 350         * i386-init.h: Regenerated.
 351         * i386-tbl.h: Likewise.
 352
 353 2012-08-17  Nick Clifton  <nickc@redhat.com>
 354
 355         * po/uk.po: New Ukranian translation.
 356         * configure.in (ALL_LINGUAS): Add uk.
 357         * configure: Regenerate.
 358
 359 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 360
 361         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 362         RBX for the third operand.
 363         <"lswi">: Use RAX for second and NBI for the third operand.
 364
 365 2012-08-15  DJ Delorie  <dj@redhat.com>
 366
 367         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 368         operands, so that data addresses can be corrected when not
 369         ES-overridden.
 370         * rl78-decode.c: Regenerate.
 371         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 372         irrelevent.  When the 'e' specifier is used on an operand and no
 373         ES prefix is provided, adjust address to make it absolute.
 374
 375 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 376
 377         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 378
 379 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 380
 381         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 382
 383 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 384
 385         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 386         macros, use local variables for info struct member accesses,
 387         update the type of the variable used to hold the instruction
 388         word.
 389         (print_insn_mips, print_mips16_insn_arg): Likewise.
 390         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 391         local variables for info struct member accesses.
 392         (print_insn_micromips): Add GET_OP_S local macro.
 393         (_print_insn_mips): Update the type of the variable used to hold
 394         the instruction word.
 395
 396 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 397             Laurent Desnogues  <laurent.desnogues@arm.com>
 398             Jim MacArthur  <jim.macarthur@arm.com>
 399             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 400             Nigel Stephens  <nigel.stephens@arm.com>
 401             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 402             Richard Earnshaw  <rearnsha@arm.com>
 403             Sofiane Naci  <sofiane.naci@arm.com>
 404             Tejas Belagod  <tejas.belagod@arm.com>
 405             Yufeng Zhang  <yufeng.zhang@arm.com>
 406
 407         * Makefile.am: Add AArch64.
 408         * Makefile.in: Regenerate.
 409         * aarch64-asm.c: New file.
 410         * aarch64-asm.h: New file.
 411         * aarch64-dis.c: New file.
 412         * aarch64-dis.h: New file.
 413         * aarch64-gen.c: New file.
 414         * aarch64-opc.c: New file.
 415         * aarch64-opc.h: New file.
 416         * aarch64-tbl.h: New file.
 417         * configure.in: Add AArch64.
 418         * configure: Regenerate.
 419         * disassemble.c: Add AArch64.
 420         * aarch64-asm-2.c: New file (automatically generated).
 421         * aarch64-dis-2.c: New file (automatically generated).
 422         * aarch64-opc-2.c: New file (automatically generated).
 423         * po/POTFILES.in: Regenerate.
 424
 425 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 426
 427         * micromips-opc.c (micromips_opcodes): Update comment.
 428         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 429         instructions for IOCT as appropriate.
 430         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 431         opcode_is_member.
 432         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 433         the result of a check for the -Wno-missing-field-initializers
 434         GCC option.
 435         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 436         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 437         compilation.
 438         (mips16-opc.lo): Likewise.
 439         (micromips-opc.lo): Likewise.
 440         * aclocal.m4: Regenerate.
 441         * configure: Regenerate.
 442         * Makefile.in: Regenerate.
 443
 444 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 445
 446         PR gas/14423
 447         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 448         * i386-init.h: Regenerated.
 449
 450 2012-08-09  Nick Clifton  <nickc@redhat.com>
 451
 452         * po/vi.po: Updated Vietnamese translation.
 453
 454 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 455
 456         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 457         AMD-reserved cases as "prefetch".
 458         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 459         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 460         (reg_table): Use those under REG_0F18.
 461         (mod_table): Add those cases as "nop/reserved".
 462
 463 2012-08-07  Jan Beulich <jbeulich@suse.com>
 464
 465         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 466
 467 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 468
 469         * i386-dis.c (print_insn): Print spaces between multiple excess
 470         prefixes.  Return actual number of excess prefixes consumed,
 471         not always one.
 472
 473         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 474
 475 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 476             Victor Khimenko  <khim@google.com>
 477             H.J. Lu  <hongjiu.lu@intel.com>
 478
 479         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 480         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 481         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 482         (OP_E_register): Likewise.
 483         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 484
 485 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 486
 487         * configure.in: Formatting.
 488         * configure: Regenerate.
 489
 490 2012-08-01  Alan Modra  <amodra@gmail.com>
 491
 492         * h8300-dis.c: Fix printf arg warnings.
 493         * i960-dis.c: Likewise.
 494         * mips-dis.c: Likewise.
 495         * pdp11-dis.c: Likewise.
 496         * sh-dis.c: Likewise.
 497         * v850-dis.c: Likewise.
 498         * configure.in: Formatting.
 499         * configure: Regenerate.
 500         * rl78-decode.c: Regenerate.
 501         * po/POTFILES.in: Regenerate.
 502
 503 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 504             Catherine Moore  <clm@codesourcery.com>
 505             Maciej W. Rozycki  <macro@codesourcery.com>
 506
 507         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 508         (DSP_VOLA): Likewise.
 509         (D32, D33): Likewise.
 510         (micromips_opcodes): Add DSP ASE instructions.
 511         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 512         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 513
 514 2012-07-31  Jan Beulich <jbeulich@suse.com>
 515
 516         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 517         instruction group. Mark as requiring AVX2.
 518         * i386-tbl.h: Re-generate.
 519
 520 2012-07-30  Nick Clifton  <nickc@redhat.com>
 521
 522         * po/opcodes.pot: Updated template.
 523         * po/es.po: Updated Spanish translation.
 524         * po/fi.po: Updated Finnish translation.
 525
 526 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 527
 528         * configure.in (BFD_VERSION): Run bfd/configure --version and
 529         parse the output of that.
 530         * configure: Regenerate.
 531
 532 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 533
 534         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 535
 536 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 537             Dr David Alan Gilbert  <dave@treblig.org>
 538
 539         PR binutils/13135
 540         * arm-dis.c: Add necessary casts for printing integer values.
 541         Use %s when printing string values.
 542         * hppa-dis.c: Likewise.
 543         * m68k-dis.c: Likewise.
 544         * microblaze-dis.c: Likewise.
 545         * mips-dis.c: Likewise.
 546         * sparc-dis.c: Likewise.
 547
 548 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 549
 550         PR binutils/14355
 551         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 552         (VEX_LEN_0FXOP_08_CD): Likewise.
 553         (VEX_LEN_0FXOP_08_CE): Likewise.
 554         (VEX_LEN_0FXOP_08_CF): Likewise.
 555         (VEX_LEN_0FXOP_08_EC): Likewise.
 556         (VEX_LEN_0FXOP_08_ED): Likewise.
 557         (VEX_LEN_0FXOP_08_EE): Likewise.
 558         (VEX_LEN_0FXOP_08_EF): Likewise.
 559         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 560         vpcomub, vpcomuw, vpcomud, vpcomuq.
 561         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 562         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 563         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 564         VEX_LEN_0FXOP_08_EF.
 565
 566 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 567
 568         * i386-dis.c (PREFIX_0F38F6): New.
 569         (prefix_table): Add adcx, adox instructions.
 570         (three_byte_table): Use PREFIX_0F38F6.
 571         (mod_table): Add rdseed instruction.
 572         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 573         (cpu_flags): Likewise.
 574         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 575         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 576         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 577         prefetchw.
 578         * i386-tbl.h: Regenerate.
 579         * i386-init.h: Likewise.
 580
 581 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 582
 583         * mips-dis.c: Remove gratuitous newline.
 584
 585 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 586
 587         * xgate-dis.c: Removed an IF statement that will
 588         always be false due to overlapping operand masks.
 589         * xgate-opc.c: Corrected 'com' opcode entry and
 590         fixed spacing.
 591
 592 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 593
 594         * i386-opc.tbl: Add RepPrefixOk to nop.
 595         * i386-tbl.h: Regenerate.
 596
 597 2012-06-28  Nick Clifton  <nickc@redhat.com>
 598
 599         * po/vi.po: Updated Vietnamese translation.
 600
 601 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 602
 603         * i386-opc.tbl: Add RepPrefixOk to ret.
 604         * i386-tbl.h: Regenerate.
 605
 606         * i386-opc.h (RepPrefixOk): New enum constant.
 607         (i386_opcode_modifier): New bitfield 'repprefixok'.
 608         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 609         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 610         instructions that have IsString.
 611         * i386-tbl.h: Regenerate.
 612
 613 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 614
 615         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 616         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 617         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 618         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 619         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 620         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 621         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 622         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 623         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 624
 625 2012-05-19  Alan Modra  <amodra@gmail.com>
 626
 627         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 628         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 629
 630 2012-05-18  Alan Modra  <amodra@gmail.com>
 631
 632         * ia64-opc.c: Remove #include "ansidecl.h".
 633         * z8kgen.c: Include sysdep.h first.
 634
 635         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 636         * bfin-dis.c: Likewise.
 637         * i860-dis.c: Likewise.
 638         * ia64-dis.c: Likewise.
 639         * ia64-gen.c: Likewise.
 640         * m68hc11-dis.c: Likewise.
 641         * mmix-dis.c: Likewise.
 642         * msp430-dis.c: Likewise.
 643         * or32-dis.c: Likewise.
 644         * rl78-dis.c: Likewise.
 645         * rx-dis.c: Likewise.
 646         * tic4x-dis.c: Likewise.
 647         * tilegx-opc.c: Likewise.
 648         * tilepro-opc.c: Likewise.
 649         * rx-decode.c: Regenerate.
 650
 651 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 652
 653         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 654
 655 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 656
 657         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 658
 659 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 660             Nick Clifton  <nickc@redhat.com>
 661
 662         PR 14072
 663         * configure.in: Add check that sysdep.h has been included before
 664         any system header files.
 665         * configure: Regenerate.
 666         * config.in: Regenerate.
 667         * sysdep.h: Generate an error if included before config.h.
 668         * alpha-opc.c: Include sysdep.h before any other header file.
 669         * alpha-dis.c: Likewise.
 670         * avr-dis.c: Likewise.
 671         * cgen-opc.c: Likewise.
 672         * cr16-dis.c: Likewise.
 673         * cris-dis.c: Likewise.
 674         * crx-dis.c: Likewise.
 675         * d10v-dis.c: Likewise.
 676         * d10v-opc.c: Likewise.
 677         * d30v-dis.c: Likewise.
 678         * d30v-opc.c: Likewise.
 679         * h8500-dis.c: Likewise.
 680         * i370-dis.c: Likewise.
 681         * i370-opc.c: Likewise.
 682         * m10200-dis.c: Likewise.
 683         * m10300-dis.c: Likewise.
 684         * micromips-opc.c: Likewise.
 685         * mips-opc.c: Likewise.
 686         * mips61-opc.c: Likewise.
 687         * moxie-dis.c: Likewise.
 688         * or32-opc.c: Likewise.
 689         * pj-dis.c: Likewise.
 690         * ppc-dis.c: Likewise.
 691         * ppc-opc.c: Likewise.
 692         * s390-dis.c: Likewise.
 693         * sh-dis.c: Likewise.
 694         * sh64-dis.c: Likewise.
 695         * sparc-dis.c: Likewise.
 696         * sparc-opc.c: Likewise.
 697         * spu-dis.c: Likewise.
 698         * tic30-dis.c: Likewise.
 699         * tic54x-dis.c: Likewise.
 700         * tic80-dis.c: Likewise.
 701         * tic80-opc.c: Likewise.
 702         * tilegx-dis.c: Likewise.
 703         * tilepro-dis.c: Likewise.
 704         * v850-dis.c: Likewise.
 705         * v850-opc.c: Likewise.
 706         * vax-dis.c: Likewise.
 707         * w65-dis.c: Likewise.
 708         * xgate-dis.c: Likewise.
 709         * xtensa-dis.c: Likewise.
 710         * rl78-decode.opc: Likewise.
 711         * rl78-decode.c: Regenerate.
 712         * rx-decode.opc: Likewise.
 713         * rx-decode.c: Regenerate.
 714
 715 2012-05-17  Alan Modra  <amodra@gmail.com>
 716
 717         * ppc_dis.c: Don't include elf/ppc.h.
 718
 719 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 720
 721         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 722         to PUSH/POP {reg}.
 723
 724 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 725             Stephane Carrez <stcarrez@nerim.fr>
 726
 727         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 728         target.
 729         * disassemble.c: Likewise.
 730         * configure: Regenerate.
 731         * m68hc11-dis.c: Make objdump output more consistent, use hex
 732         instead of decimal and use 0x prefix for hex.
 733         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 734
 735 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 736
 737         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 738         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 739         (vle_opcd_indices): New array.
 740         (lookup_vle): New function.
 741         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 742         (print_insn_powerpc): Likewise.
 743         * ppc-opc.c: Likewise.
 744
 745 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 746             Maciej W. Rozycki  <macro@codesourcery.com>
 747             Rhonda Wittels  <rhonda@codesourcery.com>
 748             Nathan Froyd <froydnj@codesourcery.com>
 749
 750         * ppc-opc.c (insert_arx, extract_arx): New functions.
 751         (insert_ary, extract_ary): New functions.
 752         (insert_li20, extract_li20): New functions.
 753         (insert_rx, extract_rx): New functions.
 754         (insert_ry, extract_ry): New functions.
 755         (insert_sci8, extract_sci8): New functions.
 756         (insert_sci8n, extract_sci8n): New functions.
 757         (insert_sd4h, extract_sd4h): New functions.
 758         (insert_sd4w, extract_sd4w): New functions.
 759         (insert_vlesi, extract_vlesi): New functions.
 760         (insert_vlensi, extract_vlensi): New functions.
 761         (insert_vleui, extract_vleui): New functions.
 762         (insert_vleil, extract_vleil): New functions.
 763         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 764         (BI16, BI32, BO32, B8): New.
 765         (B15, B24, CRD32, CRS): New.
 766         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 767         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 768         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 769         (SH6_MASK): Use PPC_OPSHIFT_INV.
 770         (SI8, UI5, OIMM5, UI7, BO16): New.
 771         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 772         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 773         (ALLOW8_SPRG): New.
 774         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 775         (OPVUP, OPVUP_MASK OPVUP): New
 776         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 777         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 778         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 779         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 780         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 781         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 782         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 783         (SE_IM5, SE_IM5_MASK): New.
 784         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 785         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 786         (BO32DNZ, BO32DZ): New.
 787         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 788         (PPCVLE): New.
 789         (powerpc_opcodes): Add new VLE instructions.  Update existing
 790         instruction to include PPCVLE if supported.
 791         * ppc-dis.c (ppc_opts): Add vle entry.
 792         (get_powerpc_dialect): New function.
 793         (powerpc_init_dialect): VLE support.
 794         (print_insn_big_powerpc): Call get_powerpc_dialect.
 795         (print_insn_little_powerpc): Likewise.
 796         (operand_value_powerpc): Handle negative shift counts.
 797         (print_insn_powerpc): Handle 2-byte instruction lengths.
 798
 799 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 800
 801         PR binutils/14028
 802         * configure.in: Invoke ACX_HEADER_STRING.
 803         * configure: Regenerate.
 804         * config.in: Regenerate.
 805         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 806         string.h and strings.h.
 807
 808 2012-05-11  Nick Clifton  <nickc@redhat.com>
 809
 810         PR binutils/14006
 811         * arm-dis.c (print_insn): Fix detection of instruction mode in
 812         files containing multiple executable sections.
 813
 814 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 815
 816         * Makefile.in, configure: regenerate
 817         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 818         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 819         New functions.
 820         * configure.in: Recognize xgate.
 821         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 822         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 823         and opcode generation for xgate.
 824
 825 2012-04-30  DJ Delorie  <dj@redhat.com>
 826
 827         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 828         already the maximum bit size.
 829         * rx-decode.c: Regenerate.
 830
 831 2012-04-27  David S. Miller  <davem@davemloft.net>
 832
 833         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 834         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 835
 836         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 837         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 838
 839         * sparc-opc.c (CBCOND): New define.
 840         (CBCOND_XCC): Likewise.
 841         (cbcond): New helper macro.
 842         (sparc_opcodes): Add compare-and-branch instructions.
 843
 844         * sparc-dis.c (print_insn_sparc): Handle ')'.
 845         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 846
 847         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 848         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 849
 850 2012-04-12  David S. Miller  <davem@davemloft.net>
 851
 852         * sparc-dis.c (X_DISP10): Define.
 853         (print_insn_sparc): Handle '='.
 854
 855 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 856
 857         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 858         sprintf call and the '*' field width.
 859
 860 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 861
 862         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 863
 864 2012-03-16  Alan Modra  <amodra@gmail.com>
 865
 866         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 867         (powerpc_opcd_indices): Bump array size.
 868         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 869         corresponding to unused opcodes to following entry.
 870         (lookup_powerpc): New function, extracted and optimised from..
 871         (print_insn_powerpc): ..here.
 872
 873 2012-03-15  Alan Modra  <amodra@gmail.com>
 874             James Lemke  <jwlemke@codesourcery.com>
 875
 876         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 877         * ppc-dis.c (private): New var.
 878         (powerpc_init_dialect): Don't return calloc failure, instead use
 879         private.
 880         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 881         (powerpc_opcd_indices): New array.
 882         (disassemble_init_powerpc): New function.
 883         (print_insn_big_powerpc): Don't init dialect here.
 884         (print_insn_little_powerpc): Likewise.
 885         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 886
 887 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 888
 889         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 890         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 891         (PPCVEC2, PPCTMR, E6500): New short names.
 892         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 893         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 894         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 895         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 896         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 897         optional operands on sync instruction for E6500 target.
 898
 899 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 900
 901         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 902
 903 2012-02-27  Alan Modra  <amodra@gmail.com>
 904
 905         * mt-dis.c: Regenerate.
 906
 907 2012-02-27  Alan Modra  <amodra@gmail.com>
 908
 909         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 910         is the inverse of corresponding insert function.
 911         (extract_d22, extract_u9, extract_r4): Likewise.
 912         (extract_d9): Correct sign extension.
 913         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 914         rely on implementation defined behaviour for shift right of
 915         signed types.
 916         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 917         (extract_d23): Likewise, and correct mask.
 918
 919 2012-02-27  Alan Modra  <amodra@gmail.com>
 920
 921         * crx-dis.c (print_arg): Mask constant to 32 bits.
 922         * crx-opc.c (cst4_map): Use int array.
 923
 924 2012-02-27  Alan Modra  <amodra@gmail.com>
 925
 926         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 927         (FIELDD): Sign extend with xor,sub.
 928
 929 2012-02-25  Walter Lee  <walt@tilera.com>
 930
 931         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 932         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 933         TILEPRO_OPC_LW_TLS_SN.
 934
 935 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 936
 937         * i386-opc.h (HLEPrefixNone): New.
 938         (HLEPrefixLock): Likewise.
 939         (HLEPrefixAny): Likewise.
 940         (HLEPrefixRelease): Likewise.
 941
 942 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 943
 944         * i386-dis.c (HLE_Fixup1): New.
 945         (HLE_Fixup2): Likewise.
 946         (HLE_Fixup3): Likewise.
 947         (Ebh1): Likewise.
 948         (Evh1): Likewise.
 949         (Ebh2): Likewise.
 950         (Evh2): Likewise.
 951         (Ebh3): Likewise.
 952         (Evh3): Likewise.
 953         (MOD_C6_REG_7): Likewise.
 954         (MOD_C7_REG_7): Likewise.
 955         (RM_C6_REG_7): Likewise.
 956         (RM_C7_REG_7): Likewise.
 957         (XACQUIRE_PREFIX): Likewise.
 958         (XRELEASE_PREFIX): Likewise.
 959         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 960         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 961         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 962         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 963         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 964         MOD_C6_REG_7 and MOD_C7_REG_7.
 965         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 966         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 967         xtest.
 968         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 969         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 970
 971         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 972         CPU_RTM_FLAGS.
 973         (cpu_flags): Add CpuHLE and CpuRTM.
 974         (opcode_modifiers): Add HLEPrefixOk.
 975
 976         * i386-opc.h (CpuHLE): New.
 977         (CpuRTM): Likewise.
 978         (HLEPrefixOk): Likewise.
 979         (i386_cpu_flags): Add cpuhle and cpurtm.
 980         (i386_opcode_modifier): Add hleprefixok.
 981
 982         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 983         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 984         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 985         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 986         xtest.
 987         * i386-init.h: Regenerated.
 988         * i386-tbl.h: Likewise.
 989
 990 2012-01-24  DJ Delorie  <dj@redhat.com>
 991
 992         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 993         * rl78-decode.c: Regenerate.
 994
 995 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 996
 997         PR binutils/10173
 998         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 999
1000 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
1001
1002         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
1003         register and move them after pmove with PSR/PCSR register.
1004
1005 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
1006
1007         * i386-dis.c (mod_table): Add vmfunc.
1008
1009         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
1010         (cpu_flags): CpuVMFUNC.
1011
1012         * i386-opc.h (CpuVMFUNC): New.
1013         (i386_cpu_flags): Add cpuvmfunc.
1014
1015         * i386-opc.tbl: Add vmfunc.
1016         * i386-init.h: Regenerated.
1017         * i386-tbl.h: Likewise.
1018
1019 For older changes see ChangeLog-2011
1020 \f
1021 Local Variables:
1022 mode: change-log
1023 left-margin: 8
1024 fill-column: 74
1025 version-control: never
1026 End: