1 2015-03-24 Terry Guo <terry.guo@arm.com>
3 * arm-dis.c (opcode32): Updated to use new arm feature struct.
5 (coprocessor_opcodes): Replace bit with feature struct.
6 (neon_opcodes): Likewise.
7 (arm_opcodes): Likewise.
8 (thumb_opcodes): Likewise.
9 (thumb32_opcodes): Likewise.
10 (print_insn_coprocessor): Likewise.
11 (print_insn_arm): Likewise.
12 (select_arm_features): Follow new feature struct.
14 2015-03-17 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
16 * i386-dis.c (rm_table): Add clzero.
17 * i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS.
19 (cpu_flags): Add CpuCLZERO.
20 * i386-opc.h: Add CpuCLZERO.
21 * i386-opc.tbl: Add clzero.
22 * i386-init.h: Re-generated.
23 * i386-tbl.h: Re-generated.
25 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
27 * mips-opc.c (decode_mips_operand): Fix constraint issues
28 with u and y operands.
30 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
32 * mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
34 2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
36 * s390-opc.c: Add new IBM z13 instructions.
37 * s390-opc.txt: Likewise.
39 2015-03-10 Renlin Li <renlin.li@arm.com>
41 * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
42 stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
44 * aarch64-asm-2.c: Regenerate.
45 * aarch64-dis-2.c: Likewise.
46 * aarch64-opc-2.c: Likewise.
48 2015-03-03 Jiong Wang <jiong.wang@arm.com>
50 * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
52 2015-02-25 Oleg Endo <olegendo@gcc.gnu.org>
54 * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
56 (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
57 arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
59 2015-02-23 Vinay <Vinay.G@kpit.com>
61 * rl78-decode.opc (MOV): Added space between two operands for
62 'mov' instruction in index addressing mode.
63 * rl78-decode.c: Regenerate.
65 2015-02-19 Pedro Alves <palves@redhat.com>
67 * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
69 2015-02-10 Pedro Alves <palves@redhat.com>
70 Tom Tromey <tromey@redhat.com>
72 * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
73 microblaze_and, microblaze_xor.
74 * microblaze-opc.h (opcodes): Adjust.
76 2015-01-28 James Bowman <james.bowman@ftdichip.com>
78 * Makefile.am: Add FT32 files.
79 * configure.ac: Handle FT32.
80 * disassemble.c (disassembler): Call print_insn_ft32.
81 * ft32-dis.c: New file.
82 * ft32-opc.c: New file.
83 * Makefile.in: Regenerate.
84 * configure: Regenerate.
85 * po/POTFILES.in: Regenerate.
87 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
89 * nds32-asm.c (keyword_sr): Add new system registers.
91 2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
93 * s390-dis.c (s390_extract_operand): Support vector register
95 (s390_print_insn_with_opcode): Support new operands types and add
96 new handling of optional operands.
97 * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
98 and include opcode/s390.h instead.
99 (struct op_struct): New field `flags'.
100 (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
101 (dumpTable): Dump flags.
102 (main): Parse flags from the s390-opc.txt file. Add z13 as cpu
104 * s390-opc.c: Add new operands types, instruction formats, and
106 (s390_opformats): Add new formats for .insn.
107 * s390-opc.txt: Add new instructions.
109 2015-01-01 Alan Modra <amodra@gmail.com>
111 Update year range in copyright notice of all files.
113 For older changes see ChangeLog-2014
115 Copyright (C) 2015 Free Software Foundation, Inc.
117 Copying and distribution of this file, with or without modification,
118 are permitted in any medium without royalty provided the copyright
119 notice and this notice are preserved.
125 version-control: never