opcodes/ChangeLog

   1 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * a29k-dis.c: Delete.
   4         * Makefile.am: Remove a29k support.
   5         * configure.in: Likewise.
   6         * disassemble.c: Likewise.
   7         * Makefile.in: Regenerate.
   8         * configure: Regenerate.
   9         * po/POTFILES.in: Regenerate.
  10
  11 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
  12
  13         * ppc-dis.c (powerpc_dialect): Handle e300.
  14         (print_ppc_disassembler_options): Likewise.
  15         * ppc-opc.c (PPCE300): Define.
  16         (powerpc_opcodes): Mark icbt as available for the e300.
  17
  18 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
  19
  20         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
  21         Use "rp" instead of "%r2" in "b,l" insns.
  22
  23 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
  24
  25         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
  26         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
  27         (main): Likewise.
  28         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
  29         and 4 bit optional masks.
  30         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
  31         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
  32         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
  33         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
  34         (s390_opformats): Likewise.
  35         * s390-opc.txt: Add new instructions for cpu type z9-109.
  36
  37 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
  38
  39         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
  40
  41 2005-07-29  Paul Brook  <paul@codesourcery.com>
  42
  43         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
  44
  45 2005-07-29  Paul Brook  <paul@codesourcery.com>
  46
  47         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
  48         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
  49
  50 2005-07-25  DJ Delorie  <dj@redhat.com>
  51
  52         * m32c-asm.c Regenerate.
  53         * m32c-dis.c Regenerate.
  54
  55 2005-07-20  DJ Delorie  <dj@redhat.com>
  56
  57         * disassemble.c (disassemble_init_for_target): M32C ISAs are
  58         enums, so convert them to bit masks, which attributes are.
  59
  60 2005-07-18  Nick Clifton  <nickc@redhat.com>
  61
  62         * configure.in: Restore alpha ordering to list of arches.
  63         * configure: Regenerate.
  64         * disassemble.c: Restore alpha ordering to list of arches.
  65
  66 2005-07-18  Nick Clifton  <nickc@redhat.com>
  67
  68         * m32c-asm.c: Regenerate.
  69         * m32c-desc.c: Regenerate.
  70         * m32c-desc.h: Regenerate.
  71         * m32c-dis.c: Regenerate.
  72         * m32c-ibld.h: Regenerate.
  73         * m32c-opc.c: Regenerate.
  74         * m32c-opc.h: Regenerate.
  75
  76 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
  77
  78         * i386-dis.c (PNI_Fixup): Update comment.
  79         (VMX_Fixup): Properly handle the suffix check.
  80
  81 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
  82
  83         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
  84         mfctl disassembly.
  85
  86 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
  87
  88         * Makefile.am: Run "make dep-am".
  89         (stamp-m32c): Fix cpu dependencies.
  90         * Makefile.in: Regenerate.
  91         * ip2k-dis.c: Regenerate.
  92
  93 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
  94
  95         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
  96         (VMX_Fixup): New. Fix up Intel VMX Instructions.
  97         (Em): New.
  98         (Gm): New.
  99         (VM): New.
 100         (dis386_twobyte): Updated entries 0x78 and 0x79.
 101         (twobyte_has_modrm): Likewise.
 102         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 103         (OP_G): Handle m_mode.
 104
 105 2005-07-14  Jim Blandy  <jimb@redhat.com>
 106
 107         Add support for the Renesas M32C and M16C.
 108         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 109         * m32c-desc.h, m32c-opc.h: New.
 110         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 111         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 112         m32c-opc.c.
 113         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 114         m32c-ibld.lo, m32c-opc.lo.
 115         (CLEANFILES): List stamp-m32c.
 116         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 117         (CGEN_CPUS): Add m32c.
 118         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 119         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 120         (m32c_opc_h): New variable.
 121         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 122         (m32c-opc.lo): New rules.
 123         * Makefile.in: Regenerated.
 124         * configure.in: Add case for bfd_m32c_arch.
 125         * configure: Regenerated.
 126         * disassemble.c (ARCH_m32c): New.
 127         [ARCH_m32c]: #include "m32c-desc.h".
 128         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 129         (disassemble_init_for_target) [ARCH_m32c]: Same.
 130
 131         * cgen-ops.h, cgen-types.h: New files.
 132         * Makefile.am (HFILES): List them.
 133         * Makefile.in: Regenerated.
 134
 135 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 136
 137         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 138         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 139         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 140         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 141         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 142         v850-dis.c: Fix format bugs.
 143         * ia64-gen.c (fail, warn): Add format attribute.
 144         * or32-opc.c (debug): Likewise.
 145
 146 2005-07-07  Khem Raj  <kraj@mvista.com>
 147
 148         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 149         disassembly pattern.
 150
 151 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 152
 153         * Makefile.am (stamp-m32r): Fix path to cpu files.
 154         (stamp-m32r, stamp-iq2000): Likewise.
 155         * Makefile.in: Regenerate.
 156         * m32r-asm.c: Regenerate.
 157         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 158         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 159
 160 2005-07-05  Nick Clifton  <nickc@redhat.com>
 161
 162         * iq2000-asm.c: Regenerate.
 163         * ms1-asm.c: Regenerate.
 164
 165 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 166
 167         * i386-dis.c (SVME_Fixup): New.
 168         (grps): Use it for the lidt entry.
 169         (PNI_Fixup): Call OP_M rather than OP_E.
 170         (INVLPG_Fixup): Likewise.
 171
 172 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 173
 174         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 175
 176 2005-07-01  Nick Clifton  <nickc@redhat.com>
 177
 178         * a29k-dis.c: Update to ISO C90 style function declarations and
 179         fix formatting.
 180         * alpha-opc.c: Likewise.
 181         * arc-dis.c: Likewise.
 182         * arc-opc.c: Likewise.
 183         * avr-dis.c: Likewise.
 184         * cgen-asm.in: Likewise.
 185         * cgen-dis.in: Likewise.
 186         * cgen-ibld.in: Likewise.
 187         * cgen-opc.c: Likewise.
 188         * cris-dis.c: Likewise.
 189         * d10v-dis.c: Likewise.
 190         * d30v-dis.c: Likewise.
 191         * d30v-opc.c: Likewise.
 192         * dis-buf.c: Likewise.
 193         * dlx-dis.c: Likewise.
 194         * h8300-dis.c: Likewise.
 195         * h8500-dis.c: Likewise.
 196         * hppa-dis.c: Likewise.
 197         * i370-dis.c: Likewise.
 198         * i370-opc.c: Likewise.
 199         * m10200-dis.c: Likewise.
 200         * m10300-dis.c: Likewise.
 201         * m68k-dis.c: Likewise.
 202         * m88k-dis.c: Likewise.
 203         * mips-dis.c: Likewise.
 204         * mmix-dis.c: Likewise.
 205         * msp430-dis.c: Likewise.
 206         * ns32k-dis.c: Likewise.
 207         * or32-dis.c: Likewise.
 208         * or32-opc.c: Likewise.
 209         * pdp11-dis.c: Likewise.
 210         * pj-dis.c: Likewise.
 211         * s390-dis.c: Likewise.
 212         * sh-dis.c: Likewise.
 213         * sh64-dis.c: Likewise.
 214         * sparc-dis.c: Likewise.
 215         * sparc-opc.c: Likewise.
 216         * sysdep.h: Likewise.
 217         * tic30-dis.c: Likewise.
 218         * tic4x-dis.c: Likewise.
 219         * tic80-dis.c: Likewise.
 220         * v850-dis.c: Likewise.
 221         * v850-opc.c: Likewise.
 222         * vax-dis.c: Likewise.
 223         * w65-dis.c: Likewise.
 224         * z8kgen.c: Likewise.
 225
 226         * fr30-*: Regenerate.
 227         * frv-*: Regenerate.
 228         * ip2k-*: Regenerate.
 229         * iq2000-*: Regenerate.
 230         * m32r-*: Regenerate.
 231         * ms1-*: Regenerate.
 232         * openrisc-*: Regenerate.
 233         * xstormy16-*: Regenerate.
 234
 235 2005-06-23  Ben Elliston  <bje@gnu.org>
 236
 237         * m68k-dis.c: Use ISC C90.
 238         * m68k-opc.c: Formatting fixes.
 239
 240 2005-06-16  David Ung  <davidu@mips.com>
 241
 242         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 243         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 244
 245 2005-06-15  Dave Brolley  <brolley@redhat.com>
 246
 247         Contribute Morpho ms1 on behalf of Red Hat
 248         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 249         ms1-opc.h: New files, Morpho ms1 target.
 250
 251         2004-05-14  Stan Cox  <scox@redhat.com>
 252
 253         * disassemble.c (ARCH_ms1): Define.
 254         (disassembler): Handle bfd_arch_ms1
 255
 256         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 257
 258         * Makefile.am, Makefile.in: Add ms1 target.
 259         * configure.in: Ditto.
 260
 261 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 262
 263         * arm-opc.h: Delete; fold contents into ...
 264         * arm-dis.c: ... here.  Move includes of internal COFF headers
 265         next to includes of internal ELF headers.
 266         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 267         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 268         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 269         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 270         (iwmmxt_wwnames, iwmmxt_wwssnames):
 271         Make const.
 272         (regnames): Remove iWMMXt coprocessor register sets.
 273         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 274         (get_arm_regnames): Adjust fourth argument to match above changes.
 275         (set_iwmmxt_regnames): Delete.
 276         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 277         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 278         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 279         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 280         ISO syntax for function pointer calls.
 281
 282 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 283
 284         * arm-dis.c: Split up the comments describing the format codes, so
 285         that the ARM and 16-bit Thumb opcode tables each have comments
 286         preceding them that describe all the codes, and only the codes,
 287         valid in those tables.  (32-bit Thumb table is already like this.)
 288         Reorder the lists in all three comments to match the order in
 289         which the codes are implemented.
 290         Remove all forward declarations of static functions.  Convert all
 291         function definitions to ISO C format.
 292         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 293         Return nothing.
 294         (print_insn_thumb16): Remove unused case 'I'.
 295         (print_insn): Update for changed calling convention of subroutines.
 296
 297 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 298
 299         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 300         hex (but retain it being displayed as signed). Remove redundant
 301         checks. Add handling of displacements for 16-bit addressing in Intel
 302         mode.
 303
 304 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 305
 306         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 307         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 308         masking of 'rm' in 16-bit memory address handling.
 309
 310 2005-05-19  Anton Blanchard  <anton@samba.org>
 311
 312         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 313         (print_ppc_disassembler_options): Document it.
 314         * ppc-opc.c (SVC_LEV): Define.
 315         (LEV): Allow optional operand.
 316         (POWER5): Define.
 317         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 318         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 319
 320 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 321
 322         * Makefile.in:  Regenerate.
 323
 324 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 325
 326         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 327         instructions.  Adjust disassembly of some opcodes to match
 328         unified syntax.
 329         (thumb32_opcodes): New table.
 330         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 331         two-halfword branches here.
 332         (print_insn_thumb32): New function.
 333         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 334         and print_insn_thumb32.  Be consistent about order of
 335         halfwords when printing 32-bit instructions.
 336
 337 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 338
 339         PR 843
 340         * i386-dis.c (branch_v_mode): New.
 341         (indirEv): Use branch_v_mode instead of v_mode.
 342         (OP_E): Handle branch_v_mode.
 343
 344 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 345
 346         * d10v-dis.c (dis_2_short): Support 64bit host.
 347
 348 2005-05-07  Nick Clifton  <nickc@redhat.com>
 349
 350         * po/nl.po: Updated translation.
 351
 352 2005-05-07  Nick Clifton  <nickc@redhat.com>
 353
 354         * Update the address and phone number of the FSF organization in
 355         the GPL notices in the following files:
 356         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 357         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 358         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 359         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 360         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 361         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 362         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 363         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 364         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 365         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 366         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 367         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 368         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 369         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 370         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 371         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 372         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 373         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 374         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 375         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 376         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 377         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 378         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 379         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 380         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 381         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 382         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 383         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 384         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 385         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 386         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 387         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 388         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 389
 390 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 391
 392         * ia64-opc.c: Include sysdep.h before libiberty.h.
 393
 394 2005-05-05  Nick Clifton  <nickc@redhat.com>
 395
 396         * configure.in (ALL_LINGUAS): Add vi.
 397         * configure: Regenerate.
 398         * po/vi.po: New.
 399
 400 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 401
 402         * configure.in: Fix the check for basename declaration.
 403         * configure: Regenerate.
 404
 405 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 406
 407         * ppc-opc.c (RTO): Define.
 408         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 409         entries to suit PPC440.
 410
 411 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 412
 413         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 414         Add xcrypt-ctr.
 415
 416 2005-04-14  Nick Clifton  <nickc@redhat.com>
 417
 418         * po/fi.po: New translation: Finnish.
 419         * configure.in (ALL_LINGUAS): Add fi.
 420         * configure: Regenerate.
 421
 422 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 423
 424         * Makefile.am (NO_WERROR): Define.
 425         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 426         * Makefile.in: Regenerate.
 427         * aclocal.m4: Regenerate.
 428         * configure: Regenerate.
 429
 430 2005-04-04  Nick Clifton  <nickc@redhat.com>
 431
 432         * fr30-asm.c: Regenerate.
 433         * frv-asm.c: Regenerate.
 434         * iq2000-asm.c: Regenerate.
 435         * m32r-asm.c: Regenerate.
 436         * openrisc-asm.c: Regenerate.
 437
 438 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 439
 440         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 441         visible operands in Intel mode. The first operand of monitor is
 442         %rax in 64-bit mode.
 443
 444 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 445
 446         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 447         easier future additions.
 448
 449 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 450
 451         * configure.in: Check for basename.
 452         * configure: Regenerate.
 453         * config.in: Ditto.
 454
 455 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 456
 457         * i386-dis.c (SEG_Fixup): New.
 458         (Sv): New.
 459         (dis386): Use "Sv" for 0x8c and 0x8e.
 460
 461 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 462             Nick Clifton  <nickc@redhat.com>
 463
 464         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 465         function entry mask addresses.
 466         (entry_addr_occupied_slots): New variable: The number of occupied
 467         elements in entry_addr.
 468         (entry_addr_total_slots): New variable: The total number of
 469         elements in entry_addr.
 470         (parse_disassembler_options): New function.  Fills in the entry_addr
 471         array.
 472         (free_entry_array): New function.  Release the memory used by the
 473         entry addr array.  Suppressed because there is no way to call it.
 474         (is_function_entry): Check if a given address is a function's
 475         start address by looking at supplied entry mask addresses and
 476         symbol information, if available.
 477         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 478
 479 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 480
 481         * cris-dis.c (print_with_operands): Use ~31L for long instead
 482         of ~31.
 483
 484 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 485
 486         * mmix-opc.c (O): Revert the last change.
 487         (Z): Likewise.
 488
 489 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 490
 491         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 492         (Z): Likewise.
 493
 494 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 495
 496         * mmix-opc.c (O, Z): Force expression as unsigned long.
 497
 498 2005-03-18  Nick Clifton  <nickc@redhat.com>
 499
 500         * ip2k-asm.c: Regenerate.
 501         * op/opcodes.pot: Regenerate.
 502
 503 2005-03-16  Nick Clifton  <nickc@redhat.com>
 504             Ben Elliston  <bje@au.ibm.com>
 505
 506         * configure.in (werror): New switch: Add -Werror to the
 507         compiler command line.  Enabled by default.  Disable via
 508         --disable-werror.
 509         * configure: Regenerate.
 510
 511 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 512
 513         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 514         BOOKE.
 515
 516 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 517
 518         * po/es.po: Commit new Spanish translation.
 519
 520         * po/fr.po: Commit new French translation.
 521
 522 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 523
 524         * vax-dis.c: Fix spelling error
 525         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 526         of just "Entry mask: < r1 ... >"
 527
 528 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 529
 530         * arm-dis.c (arm_opcodes): Document %E and %V.
 531         Add entries for v6T2 ARM instructions:
 532         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 533         (print_insn_arm): Add support for %E and %V.
 534         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 535
 536 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 537             Alan Modra  <amodra@bigpond.net.au>
 538
 539         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 540         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 541         (SPRG_MASK): Delete.
 542         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 543         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 544         mfsprg4..7 after msprg and consolidate.
 545
 546 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 547
 548         * vax-dis.c (entry_mask_bit): New array.
 549         (print_insn_vax): Decode function entry mask.
 550
 551 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 552
 553         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 554
 555 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 556
 557         * po/opcodes.pot: Regenerate.
 558
 559 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 560
 561         * arc-dis.c (a4_decoding_class): New enum.
 562         (dsmOneArcInst): Use the enum values for the decoding class.
 563         Remove redundant case in the switch for decodingClass value 11.
 564
 565 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 566
 567         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 568         accesses.
 569         (OP_C): Consider lock prefix in non-64-bit modes.
 570
 571 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 572
 573         * cris-dis.c (format_hex): Remove ineffective warning fix.
 574         * crx-dis.c (make_instruction): Warning fix.
 575         * frv-asm.c: Regenerate.
 576
 577 2005-02-23  Nick Clifton  <nickc@redhat.com>
 578
 579         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 580         read_memory.
 581
 582         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 583
 584         * crx-dis.c (make_instruction): Move argument structure into inner
 585         scope and ensure that all of its fields are initialised before
 586         they are used.
 587
 588         * fr30-asm.c: Regenerate.
 589         * fr30-dis.c: Regenerate.
 590         * frv-asm.c: Regenerate.
 591         * frv-dis.c: Regenerate.
 592         * ip2k-asm.c: Regenerate.
 593         * ip2k-dis.c: Regenerate.
 594         * iq2000-asm.c: Regenerate.
 595         * iq2000-dis.c: Regenerate.
 596         * m32r-asm.c: Regenerate.
 597         * m32r-dis.c: Regenerate.
 598         * openrisc-asm.c: Regenerate.
 599         * openrisc-dis.c: Regenerate.
 600         * xstormy16-asm.c: Regenerate.
 601         * xstormy16-dis.c: Regenerate.
 602
 603 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 604
 605         * arc-ext.c: Warning fixes.
 606         * arc-ext.h: Likewise.
 607         * cgen-opc.c: Likewise.
 608         * ia64-gen.c: Likewise.
 609         * maxq-dis.c: Likewise.
 610         * ns32k-dis.c: Likewise.
 611         * w65-dis.c: Likewise.
 612         * ia64-asmtab.c: Regenerate.
 613
 614 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 615
 616         * fr30-desc.c: Regenerate.
 617         * fr30-desc.h: Regenerate.
 618         * fr30-opc.c: Regenerate.
 619         * fr30-opc.h: Regenerate.
 620         * frv-desc.c: Regenerate.
 621         * frv-desc.h: Regenerate.
 622         * frv-opc.c: Regenerate.
 623         * frv-opc.h: Regenerate.
 624         * ip2k-desc.c: Regenerate.
 625         * ip2k-desc.h: Regenerate.
 626         * ip2k-opc.c: Regenerate.
 627         * ip2k-opc.h: Regenerate.
 628         * iq2000-desc.c: Regenerate.
 629         * iq2000-desc.h: Regenerate.
 630         * iq2000-opc.c: Regenerate.
 631         * iq2000-opc.h: Regenerate.
 632         * m32r-desc.c: Regenerate.
 633         * m32r-desc.h: Regenerate.
 634         * m32r-opc.c: Regenerate.
 635         * m32r-opc.h: Regenerate.
 636         * m32r-opinst.c: Regenerate.
 637         * openrisc-desc.c: Regenerate.
 638         * openrisc-desc.h: Regenerate.
 639         * openrisc-opc.c: Regenerate.
 640         * openrisc-opc.h: Regenerate.
 641         * xstormy16-desc.c: Regenerate.
 642         * xstormy16-desc.h: Regenerate.
 643         * xstormy16-opc.c: Regenerate.
 644         * xstormy16-opc.h: Regenerate.
 645
 646 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 647
 648         * Makefile.am: Run "make dep-am"
 649         * Makefile.in: Regenerate.
 650
 651 2005-02-15  Nick Clifton  <nickc@redhat.com>
 652
 653         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 654         compile time warnings.
 655         (print_keyword): Likewise.
 656         (default_print_insn): Likewise.
 657
 658         * fr30-desc.c: Regenerated.
 659         * fr30-desc.h: Regenerated.
 660         * fr30-dis.c: Regenerated.
 661         * fr30-opc.c: Regenerated.
 662         * fr30-opc.h: Regenerated.
 663         * frv-desc.c: Regenerated.
 664         * frv-dis.c: Regenerated.
 665         * frv-opc.c: Regenerated.
 666         * ip2k-asm.c: Regenerated.
 667         * ip2k-desc.c: Regenerated.
 668         * ip2k-desc.h: Regenerated.
 669         * ip2k-dis.c: Regenerated.
 670         * ip2k-opc.c: Regenerated.
 671         * ip2k-opc.h: Regenerated.
 672         * iq2000-desc.c: Regenerated.
 673         * iq2000-dis.c: Regenerated.
 674         * iq2000-opc.c: Regenerated.
 675         * m32r-asm.c: Regenerated.
 676         * m32r-desc.c: Regenerated.
 677         * m32r-desc.h: Regenerated.
 678         * m32r-dis.c: Regenerated.
 679         * m32r-opc.c: Regenerated.
 680         * m32r-opc.h: Regenerated.
 681         * m32r-opinst.c: Regenerated.
 682         * openrisc-desc.c: Regenerated.
 683         * openrisc-desc.h: Regenerated.
 684         * openrisc-dis.c: Regenerated.
 685         * openrisc-opc.c: Regenerated.
 686         * openrisc-opc.h: Regenerated.
 687         * xstormy16-desc.c: Regenerated.
 688         * xstormy16-desc.h: Regenerated.
 689         * xstormy16-dis.c: Regenerated.
 690         * xstormy16-opc.c: Regenerated.
 691         * xstormy16-opc.h: Regenerated.
 692
 693 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 694
 695         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 696         address.
 697
 698 2005-02-11  Nick Clifton  <nickc@redhat.com>
 699
 700         * iq2000-asm.c: Regenerate.
 701
 702         * frv-dis.c: Regenerate.
 703
 704 2005-02-07  Jim Blandy  <jimb@redhat.com>
 705
 706         * Makefile.am (CGEN): Load guile.scm before calling the main
 707         application script.
 708         * Makefile.in: Regenerated.
 709         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 710         Simply pass the cgen-opc.scm path to ${cgen} as its first
 711         argument; ${cgen} itself now contains the '-s', or whatever is
 712         appropriate for the Scheme being used.
 713
 714 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 715
 716         * configure: Regenerate to track ../gettext.m4.
 717
 718 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 719
 720         * ia64-gen.c (NELEMS): Define.
 721         (shrink): Generate alias with missing second predicate register when
 722         opcode has two outputs and these are both predicates.
 723         * ia64-opc-i.c (FULL17): Define.
 724         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 725         here to generate output template.
 726         (TBITCM, TNATCM): Undefine after use.
 727         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 728         first input. Add ld16 aliases without ar.csd as second output. Add
 729         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 730         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 731         ar.ccv as third/fourth inputs. Consolidate through...
 732         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 733         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 734         * ia64-asmtab.c: Regenerate.
 735
 736 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 737
 738         * configure: Regenerate to track ../gettext.m4 change.
 739
 740 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 741
 742         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 743         * frv-asm.c: Rebuilt.
 744         * frv-desc.c: Rebuilt.
 745         * frv-desc.h: Rebuilt.
 746         * frv-dis.c: Rebuilt.
 747         * frv-ibld.c: Rebuilt.
 748         * frv-opc.c: Rebuilt.
 749         * frv-opc.h: Rebuilt.
 750
 751 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 752
 753         * configure: Regenerate, ../gettext.m4 was updated.
 754
 755 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 756
 757         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 758         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 759         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 760         * mips-dis.c: Ditto.
 761
 762 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 763
 764         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 765
 766 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 767
 768         * mips-dis.c (no_aliases): New disassembly option flag.
 769         (set_default_mips_dis_options): Init no_aliases to zero.
 770         (parse_mips_dis_option): Handle no-aliases option.
 771         (print_insn_mips): Ignore table entries that are aliases
 772         if no_aliases is set.
 773         (print_insn_mips16): Ditto.
 774         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 775         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 776         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 777         * mips16-opc.c (mips16_opcodes): Ditto.
 778
 779 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 780
 781         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 782         (inheritance diagram): Add missing edge.
 783         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 784         easier for the testsuite.
 785         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 786         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 787         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 788         arch_sh2a_or_sh4_up child.
 789         (sh_table): Do renaming as above.
 790         Correct comment for ldc.l for gas testsuite to read.
 791         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 792         Correct comments for movy.w and movy.l for gas testsuite to read.
 793         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 794
 795 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 796
 797         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 798
 799 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 800
 801         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 802
 803 2005-01-10  Andreas Schwab  <schwab@suse.de>
 804
 805         * disassemble.c (disassemble_init_for_target) <case
 806         bfd_arch_ia64>: Set skip_zeroes to 16.
 807         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 808
 809 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 810
 811         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 812
 813 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 814
 815         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 816         memory references. Convert avr_operand() to C90 formatting.
 817
 818 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 819
 820         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 821
 822 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 823
 824         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 825         (no_op_insn): Initialize array with instructions that have no
 826         operands.
 827         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 828
 829 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 830
 831         * arm-dis.c: Correct top-level comment.
 832
 833 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 834
 835         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 836         architecuture defining the insn.
 837         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 838         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 839         field.
 840         Also include opcode/arm.h.
 841         * Makefile.am (arm-dis.lo): Update dependency list.
 842         * Makefile.in: Regenerate.
 843
 844 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 845
 846         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 847         reflect the change to the short immediate syntax.
 848
 849 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 850
 851         * or32-opc.c (debug): Warning fix.
 852         * po/POTFILES.in: Regenerate.
 853
 854         * maxq-dis.c: Formatting.
 855         (print_insn): Warning fix.
 856
 857 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 858
 859         * arm-dis.c (WORD_ADDRESS): Define.
 860         (print_insn): Use it.  Correct big-endian end-of-section handling.
 861
 862 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 863             Vineet Sharma      <vineets@noida.hcltech.com>
 864
 865         * maxq-dis.c: New file.
 866         * disassemble.c (ARCH_maxq): Define.
 867         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 868         instructions..
 869         * configure.in: Add case for bfd_maxq_arch.
 870         * configure: Regenerate.
 871         * Makefile.am: Add support for maxq-dis.c
 872         * Makefile.in: Regenerate.
 873         * aclocal.m4: Regenerate.
 874
 875 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 876
 877         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 878         mode.
 879         * crx-dis.c: Likewise.
 880
 881 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 882
 883         Generally, handle CRISv32.
 884         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 885         (struct cris_disasm_data): New type.
 886         (format_reg, format_hex, cris_constraint, print_flags)
 887         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 888         callers changed.
 889         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 890         (print_insn_crisv32_without_register_prefix)
 891         (print_insn_crisv10_v32_with_register_prefix)
 892         (print_insn_crisv10_v32_without_register_prefix)
 893         (cris_parse_disassembler_options): New functions.
 894         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 895         parameter.  All callers changed.
 896         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 897         failure.
 898         (cris_constraint) <case 'Y', 'U'>: New cases.
 899         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 900         for constraint 'n'.
 901         (print_with_operands) <case 'Y'>: New case.
 902         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 903         <case 'N', 'Y', 'Q'>: New cases.
 904         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 905         (print_insn_cris_with_register_prefix)
 906         (print_insn_cris_without_register_prefix): Call
 907         cris_parse_disassembler_options.
 908         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 909         for CRISv32 and the size of immediate operands.  New v32-only
 910         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 911         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 912         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 913         Change brp to be v3..v10.
 914         (cris_support_regs): New vector.
 915         (cris_opcodes): Update head comment.  New format characters '[',
 916         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 917         Add new opcodes for v32 and adjust existing opcodes to accommodate
 918         differences to earlier variants.
 919         (cris_cond15s): New vector.
 920
 921 2004-11-04 Jan Beulich <jbeulich@novell.com>
 922
 923         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 924         (indirEb): Remove.
 925         (Mp): Use f_mode rather than none at all.
 926         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 927         replaces what previously was x_mode; x_mode now means 128-bit SSE
 928         operands.
 929         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 930         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 931         pinsrw's second operand is Edqw.
 932         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 933         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 934         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 935         mode when an operand size override is present or always suffixing.
 936         More instructions will need to be added to this group.
 937         (putop): Handle new macro chars 'C' (short/long suffix selector),
 938         'I' (Intel mode override for following macro char), and 'J' (for
 939         adding the 'l' prefix to far branches in AT&T mode). When an
 940         alternative was specified in the template, honor macro character when
 941         specified for Intel mode.
 942         (OP_E): Handle new *_mode values. Correct pointer specifications for
 943         memory operands. Consolidate output of index register.
 944         (OP_G): Handle new *_mode values.
 945         (OP_I): Handle const_1_mode.
 946         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 947         respective opcode prefix bits have been consumed.
 948         (OP_EM, OP_EX): Provide some default handling for generating pointer
 949         specifications.
 950
 951 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 952
 953         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 954         COP_INST macro.
 955
 956 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 957
 958         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 959         (getregliststring): Support HI/LO and user registers.
 960         * crx-opc.c (crx_instruction): Update data structure according to the
 961         rearrangement done in CRX opcode header file.
 962         (crx_regtab):  Likewise.
 963         (crx_optab):  Likewise.
 964         (crx_instruction): Reorder load/stor instructions, remove unsupported
 965         formats.
 966         support new Co-Processor instruction 'cpi'.
 967
 968 2004-10-27  Nick Clifton  <nickc@redhat.com>
 969
 970         * opcodes/iq2000-asm.c: Regenerate.
 971         * opcodes/iq2000-desc.c: Regenerate.
 972         * opcodes/iq2000-desc.h: Regenerate.
 973         * opcodes/iq2000-dis.c: Regenerate.
 974         * opcodes/iq2000-ibld.c: Regenerate.
 975         * opcodes/iq2000-opc.c: Regenerate.
 976         * opcodes/iq2000-opc.h: Regenerate.
 977
 978 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 979
 980         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 981         us4, us5 (respectively).
 982         Remove unsupported 'popa' instruction.
 983         Reverse operands order in store co-processor instructions.
 984
 985 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 986
 987         * Makefile.am: Run "make dep-am"
 988         * Makefile.in: Regenerate.
 989
 990 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 991
 992         * xtensa-dis.c: Use ISO C90 formatting.
 993
 994 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 995
 996         * ppc-opc.c: Revert 2004-09-09 change.
 997
 998 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 999
1000         * xtensa-dis.c (state_names): Delete.
1001         (fetch_data): Use xtensa_isa_maxlength.
1002         (print_xtensa_operand): Replace operand parameter with opcode/operand
1003         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1004         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1005         instruction bundles.  Use xmalloc instead of malloc.
1006
1007 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1008
1009         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1010         initializers.
1011
1012 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1013
1014         * crx-opc.c (crx_instruction): Support Co-processor insns.
1015         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1016         (getregliststring): Change function to use the above enum.
1017         (print_arg): Handle CO-Processor insns.
1018         (crx_cinvs): Add 'b' option to invalidate the branch-target
1019         cache.
1020
1021 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1022
1023         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1024         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1025         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1026         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1027         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1028
1029 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1030
1031         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1032         rather than add it.
1033
1034 2004-09-30  Paul Brook  <paul@codesourcery.com>
1035
1036         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1037         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1038
1039 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1040
1041         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1042         (CONFIG_STATUS_DEPENDENCIES): New.
1043         (Makefile): Removed.
1044         (config.status): Likewise.
1045         * Makefile.in: Regenerated.
1046
1047 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1048
1049         * Makefile.am: Run "make dep-am".
1050         * Makefile.in: Regenerate.
1051         * aclocal.m4: Regenerate.
1052         * configure: Regenerate.
1053         * po/POTFILES.in: Regenerate.
1054         * po/opcodes.pot: Regenerate.
1055
1056 2004-09-11  Andreas Schwab  <schwab@suse.de>
1057
1058         * configure: Rebuild.
1059
1060 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1061
1062         * ppc-opc.c (L): Make this field not optional.
1063
1064 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1065
1066         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1067         Fix parameter to 'm[t|f]csr' insns.
1068
1069 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1070
1071         * configure.in: Autoupdate to autoconf 2.59.
1072         * aclocal.m4: Rebuild with aclocal 1.4p6.
1073         * configure: Rebuild with autoconf 2.59.
1074         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1075         bfd changes for autoconf 2.59 on the way).
1076         * config.in: Rebuild with autoheader 2.59.
1077
1078 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1079
1080         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1081
1082 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1083
1084         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1085         (GRPPADLCK2): New define.
1086         (twobyte_has_modrm): True for 0xA6.
1087         (grps): GRPPADLCK2 for opcode 0xA6.
1088
1089 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1090
1091         Introduce SH2a support.
1092         * sh-opc.h (arch_sh2a_base): Renumber.
1093         (arch_sh2a_nofpu_base): Remove.
1094         (arch_sh_base_mask): Adjust.
1095         (arch_opann_mask): New.
1096         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1097         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1098         (sh_table): Adjust whitespace.
1099         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1100         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1101         instruction list throughout.
1102         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1103         of arch_sh2a in instruction list throughout.
1104         (arch_sh2e_up): Accomodate above changes.
1105         (arch_sh2_up): Ditto.
1106         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1107         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1108         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1109         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1110         * sh-opc.h (arch_sh2a_nofpu): New.
1111         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1112         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1113         instruction.
1114         2004-01-20  DJ Delorie  <dj@redhat.com>
1115         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1116         2003-12-29  DJ Delorie  <dj@redhat.com>
1117         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1118         sh_opcode_info, sh_table): Add sh2a support.
1119         (arch_op32): New, to tag 32-bit opcodes.
1120         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1121         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1122         * sh-opc.h (arch_sh2a): Add.
1123         * sh-dis.c (arch_sh2a): Handle.
1124         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1125
1126 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1127
1128         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1129
1130 2004-07-22  Nick Clifton  <nickc@redhat.com>
1131
1132         PR/280
1133         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1134         insns - this is done by objdump itself.
1135         * h8500-dis.c (print_insn_h8500): Likewise.
1136
1137 2004-07-21  Jan Beulich <jbeulich@novell.com>
1138
1139         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1140         regardless of address size prefix in effect.
1141         (ptr_reg): Size or address registers does not depend on rex64, but
1142         on the presence of an address size override.
1143         (OP_MMX): Use rex.x only for xmm registers.
1144         (OP_EM): Use rex.z only for xmm registers.
1145
1146 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1147
1148         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1149         move/branch operations to the bottom so that VR5400 multimedia
1150         instructions take precedence in disassembly.
1151
1152 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1153
1154         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1155         ISA-specific "break" encoding.
1156
1157 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1158
1159         * arm-opc.h: Fix typo in comment.
1160
1161 2004-07-11  Andreas Schwab  <schwab@suse.de>
1162
1163         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1164
1165 2004-07-09  Andreas Schwab  <schwab@suse.de>
1166
1167         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1168
1169 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1170
1171         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1172         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1173         (crx-dis.lo): New target.
1174         (crx-opc.lo): Likewise.
1175         * Makefile.in: Regenerate.
1176         * configure.in: Handle bfd_crx_arch.
1177         * configure: Regenerate.
1178         * crx-dis.c: New file.
1179         * crx-opc.c: New file.
1180         * disassemble.c (ARCH_crx): Define.
1181         (disassembler): Handle ARCH_crx.
1182
1183 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1184
1185         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1186         * ia64-asmtab.c: Regnerate.
1187
1188 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1189
1190         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1191         (extract_fxm): Don't test dialect.
1192         (XFXFXM_MASK): Include the power4 bit.
1193         (XFXM): Add p4 param.
1194         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1195
1196 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1197
1198         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1199         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1200
1201 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1202
1203         * ppc-opc.c (BH, XLBH_MASK): Define.
1204         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1205
1206 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1207
1208         * i386-dis.c (x_mode): Comment.
1209         (two_source_ops): File scope.
1210         (float_mem): Correct fisttpll and fistpll.
1211         (float_mem_mode): New table.
1212         (dofloat): Use it.
1213         (OP_E): Correct intel mode PTR output.
1214         (ptr_reg): Use open_char and close_char.
1215         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1216         operands.  Set two_source_ops.
1217
1218 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1219
1220         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1221         instead of _raw_size.
1222
1223 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1224
1225         * ia64-gen.c (in_iclass): Handle more postinc st
1226         and ld variants.
1227         * ia64-asmtab.c: Rebuilt.
1228
1229 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1230
1231         * s390-opc.txt: Correct architecture mask for some opcodes.
1232         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1233         in the esa mode as well.
1234
1235 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1236
1237         * sh-dis.c (target_arch): Make unsigned.
1238         (print_insn_sh): Replace (most of) switch with a call to
1239         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1240         * sh-opc.h: Redefine architecture flags values.
1241         Add sh3-nommu architecture.
1242         Reorganise <arch>_up macros so they make more visual sense.
1243         (SH_MERGE_ARCH_SET): Define new macro.
1244         (SH_VALID_BASE_ARCH_SET): Likewise.
1245         (SH_VALID_MMU_ARCH_SET): Likewise.
1246         (SH_VALID_CO_ARCH_SET): Likewise.
1247         (SH_VALID_ARCH_SET): Likewise.
1248         (SH_MERGE_ARCH_SET_VALID): Likewise.
1249         (SH_ARCH_SET_HAS_FPU): Likewise.
1250         (SH_ARCH_SET_HAS_DSP): Likewise.
1251         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1252         (sh_get_arch_from_bfd_mach): Add prototype.
1253         (sh_get_arch_up_from_bfd_mach): Likewise.
1254         (sh_get_bfd_mach_from_arch_set): Likewise.
1255         (sh_merge_bfd_arc): Likewise.
1256
1257 2004-05-24  Peter Barada  <peter@the-baradas.com>
1258
1259         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1260         into new match_insn_m68k function.  Loop over canidate
1261         matches and select first that completely matches.
1262         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1263         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1264         to verify addressing for MAC/EMAC.
1265         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1266         reigster halves since 'fpu' and 'spl' look misleading.
1267         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1268         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1269         first, tighten up match masks.
1270         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1271         'size' from special case code in print_insn_m68k to
1272         determine decode size of insns.
1273
1274 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1275
1276         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1277         well as when -mpower4.
1278
1279 2004-05-13  Nick Clifton  <nickc@redhat.com>
1280
1281         * po/fr.po: Updated French translation.
1282
1283 2004-05-05  Peter Barada  <peter@the-baradas.com>
1284
1285         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1286         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1287         * m68k-op.c: Switch from ColdFire chips to core variants.
1288
1289 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1290
1291         PR 147.
1292         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1293
1294 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1295
1296         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1297         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1298
1299 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1300
1301         * sh-dis.c (print_insn_sh): Print the value in constant pool
1302         as a symbol if it looks like a symbol.
1303
1304 2004-04-22  Peter Barada <peter@the-baradas.com>
1305
1306         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1307         appropriate ColdFire architectures.
1308         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1309         mask addressing.
1310         Add EMAC instructions, fix MAC instructions. Remove
1311         macmw/macml/msacmw/msacml instructions since mask addressing now
1312         supported.
1313
1314 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1315
1316         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1317         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1318         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1319         macro.  Adjust all users.
1320
1321 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1322
1323         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1324         separately.
1325
1326 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1327
1328         * m32r-asm.c: Regenerate.
1329
1330 2004-03-29  Stan Shebs  <shebs@apple.com>
1331
1332         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1333         used.
1334
1335 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1336
1337         * aclocal.m4: Regenerate.
1338         * config.in: Regenerate.
1339         * configure: Regenerate.
1340         * po/POTFILES.in: Regenerate.
1341         * po/opcodes.pot: Regenerate.
1342
1343 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1344
1345         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1346         PPC_OPERANDS_GPR_0.
1347         * ppc-opc.c (RA0): Define.
1348         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1349         (RAOPT): Rename from RAO.  Update all uses.
1350         (powerpc_opcodes): Use RA0 as appropriate.
1351
1352 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1353
1354         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1355
1356 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1357
1358         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1359
1360 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1361
1362         * i386-dis.c (GRPPLOCK): Delete.
1363         (grps): Delete GRPPLOCK entry.
1364
1365 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1366
1367         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1368         (M, Mp): Use OP_M.
1369         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1370         (GRPPADLCK): Define.
1371         (dis386): Use NOP_Fixup on "nop".
1372         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1373         (twobyte_has_modrm): Set for 0xa7.
1374         (padlock_table): Delete.  Move to..
1375         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1376         and clflush.
1377         (print_insn): Revert PADLOCK_SPECIAL code.
1378         (OP_E): Delete sfence, lfence, mfence checks.
1379
1380 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1381
1382         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1383         (INVLPG_Fixup): New function.
1384         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1385
1386 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1387
1388         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1389         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1390         (padlock_table): New struct with PadLock instructions.
1391         (print_insn): Handle PADLOCK_SPECIAL.
1392
1393 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1394
1395         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1396         (OP_E): Twiddle clflush to sfence here.
1397
1398 2004-03-08  Nick Clifton  <nickc@redhat.com>
1399
1400         * po/de.po: Updated German translation.
1401
1402 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1403
1404         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1405         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1406         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1407         accordingly.
1408
1409 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1410
1411         * frv-asm.c: Regenerate.
1412         * frv-desc.c: Regenerate.
1413         * frv-desc.h: Regenerate.
1414         * frv-dis.c: Regenerate.
1415         * frv-ibld.c: Regenerate.
1416         * frv-opc.c: Regenerate.
1417         * frv-opc.h: Regenerate.
1418
1419 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1420
1421         * frv-desc.c, frv-opc.c: Regenerate.
1422
1423 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1424
1425         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1426
1427 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1428
1429         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1430         Also correct mistake in the comment.
1431
1432 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1433
1434         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1435         ensure that double registers have even numbers.
1436         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1437         that reserved instruction 0xfffd does not decode the same
1438         as 0xfdfd (ftrv).
1439         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1440         REG_N refers to a double register.
1441         Add REG_N_B01 nibble type and use it instead of REG_NM
1442         in ftrv.
1443         Adjust the bit patterns in a few comments.
1444
1445 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1446
1447         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1448
1449 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1450
1451         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1452
1453 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1454
1455         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1456
1457 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1458
1459         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1460         mtivor32, mtivor33, mtivor34.
1461
1462 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1463
1464         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1465
1466 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1467
1468         * arm-opc.h Maverick accumulator register opcode fixes.
1469
1470 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1471
1472         * m32r-dis.c: Regenerate.
1473
1474 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1475
1476         * sh-opc.h (sh_table): "fsrra", not "fssra".
1477
1478 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1479
1480         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1481         contraints.
1482
1483 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1484
1485         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1486
1487 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1488
1489         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1490         1.  Don't print scale factor on AT&T mode when index missing.
1491
1492 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1493
1494         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1495         when loaded into XR registers.
1496
1497 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1498
1499         * frv-desc.h: Regenerate.
1500         * frv-desc.c: Regenerate.
1501         * frv-opc.c: Regenerate.
1502
1503 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1504
1505         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1506
1507 2004-01-09  Paul Brook  <paul@codesourcery.com>
1508
1509         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1510         specific opcodes.
1511
1512 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1513
1514         * Makefile.am (libopcodes_la_DEPENDENCIES)
1515         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1516         comment about the problem.
1517         * Makefile.in: Regenerate.
1518
1519 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1520
1521         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1522         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1523         cut&paste errors in shifting/truncating numerical operands.
1524         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1525         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1526         (parse_uslo16): Likewise.
1527         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1528         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1529         (parse_s12): Likewise.
1530         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1531         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1532         (parse_uslo16): Likewise.
1533         (parse_uhi16): Parse gothi and gotfuncdeschi.
1534         (parse_d12): Parse got12 and gotfuncdesc12.
1535         (parse_s12): Likewise.
1536
1537 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1538
1539         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1540         instruction which looks similar to an 'rla' instruction.
1541
1542 For older changes see ChangeLog-0203
1543 \f
1544 Local Variables:
1545 mode: change-log
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1547 fill-column: 74
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