opcodes/ChangeLog

   1 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
   2
   3         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
   4         RBX for the third operand.
   5         <"lswi">: Use RAX for second and NBI for the third operand.
   6
   7 2012-08-15  DJ Delorie  <dj@redhat.com>
   8
   9         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
  10         operands, so that data addresses can be corrected when not
  11         ES-overridden.
  12         * rl78-decode.c: Regenerate.
  13         * rl78-dis.c (print_insn_rl78): Make order of modifiers
  14         irrelevent.  When the 'e' specifier is used on an operand and no
  15         ES prefix is provided, adjust address to make it absolute.
  16
  17 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
  18
  19         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
  20
  21 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
  22
  23         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
  24
  25 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
  26
  27         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
  28         macros, use local variables for info struct member accesses,
  29         update the type of the variable used to hold the instruction
  30         word.
  31         (print_insn_mips, print_mips16_insn_arg): Likewise.
  32         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
  33         local variables for info struct member accesses.
  34         (print_insn_micromips): Add GET_OP_S local macro.
  35         (_print_insn_mips): Update the type of the variable used to hold
  36         the instruction word.
  37
  38 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
  39             Laurent Desnogues  <laurent.desnogues@arm.com>
  40             Jim MacArthur  <jim.macarthur@arm.com>
  41             Marcus Shawcroft  <marcus.shawcroft@arm.com>
  42             Nigel Stephens  <nigel.stephens@arm.com>
  43             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
  44             Richard Earnshaw  <rearnsha@arm.com>
  45             Sofiane Naci  <sofiane.naci@arm.com>
  46             Tejas Belagod  <tejas.belagod@arm.com>
  47             Yufeng Zhang  <yufeng.zhang@arm.com>
  48
  49         * Makefile.am: Add AArch64.
  50         * Makefile.in: Regenerate.
  51         * aarch64-asm.c: New file.
  52         * aarch64-asm.h: New file.
  53         * aarch64-dis.c: New file.
  54         * aarch64-dis.h: New file.
  55         * aarch64-gen.c: New file.
  56         * aarch64-opc.c: New file.
  57         * aarch64-opc.h: New file.
  58         * aarch64-tbl.h: New file.
  59         * configure.in: Add AArch64.
  60         * configure: Regenerate.
  61         * disassemble.c: Add AArch64.
  62         * aarch64-asm-2.c: New file (automatically generated).
  63         * aarch64-dis-2.c: New file (automatically generated).
  64         * aarch64-opc-2.c: New file (automatically generated).
  65         * po/POTFILES.in: Regenerate.
  66
  67 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
  68
  69         * micromips-opc.c (micromips_opcodes): Update comment.
  70         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
  71         instructions for IOCT as appropriate.
  72         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
  73         opcode_is_member.
  74         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
  75         the result of a check for the -Wno-missing-field-initializers
  76         GCC option.
  77         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
  78         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
  79         compilation.
  80         (mips16-opc.lo): Likewise.
  81         (micromips-opc.lo): Likewise.
  82         * aclocal.m4: Regenerate.
  83         * configure: Regenerate.
  84         * Makefile.in: Regenerate.
  85
  86 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
  87
  88         PR gas/14423
  89         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
  90         * i386-init.h: Regenerated.
  91
  92 2012-08-09  Nick Clifton  <nickc@redhat.com>
  93
  94         * po/vi.po: Updated Vietnamese translation.
  95
  96 2012-08-07  Roland McGrath  <mcgrathr@google.com>
  97
  98         * i386-dis.c (reg_table): Fill out REG_0F0D table with
  99         AMD-reserved cases as "prefetch".
 100         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 101         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 102         (reg_table): Use those under REG_0F18.
 103         (mod_table): Add those cases as "nop/reserved".
 104
 105 2012-08-07  Jan Beulich <jbeulich@suse.com>
 106
 107         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 108
 109 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 110
 111         * i386-dis.c (print_insn): Print spaces between multiple excess
 112         prefixes.  Return actual number of excess prefixes consumed,
 113         not always one.
 114
 115         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 116
 117 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 118             Victor Khimenko  <khim@google.com>
 119             H.J. Lu  <hongjiu.lu@intel.com>
 120
 121         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 122         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 123         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 124         (OP_E_register): Likewise.
 125         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 126
 127 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 128
 129         * configure.in: Formatting.
 130         * configure: Regenerate.
 131
 132 2012-08-01  Alan Modra  <amodra@gmail.com>
 133
 134         * h8300-dis.c: Fix printf arg warnings.
 135         * i960-dis.c: Likewise.
 136         * mips-dis.c: Likewise.
 137         * pdp11-dis.c: Likewise.
 138         * sh-dis.c: Likewise.
 139         * v850-dis.c: Likewise.
 140         * configure.in: Formatting.
 141         * configure: Regenerate.
 142         * rl78-decode.c: Regenerate.
 143         * po/POTFILES.in: Regenerate.
 144
 145 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 146             Catherine Moore  <clm@codesourcery.com>
 147             Maciej W. Rozycki  <macro@codesourcery.com>
 148
 149         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 150         (DSP_VOLA): Likewise.
 151         (D32, D33): Likewise.
 152         (micromips_opcodes): Add DSP ASE instructions.
 153         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 154         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 155
 156 2012-07-31  Jan Beulich <jbeulich@suse.com>
 157
 158         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 159         instruction group. Mark as requiring AVX2.
 160         * i386-tbl.h: Re-generate.
 161
 162 2012-07-30  Nick Clifton  <nickc@redhat.com>
 163
 164         * po/opcodes.pot: Updated template.
 165         * po/es.po: Updated Spanish translation.
 166         * po/fi.po: Updated Finnish translation.
 167
 168 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 169
 170         * configure.in (BFD_VERSION): Run bfd/configure --version and
 171         parse the output of that.
 172         * configure: Regenerate.
 173
 174 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 175
 176         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 177
 178 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 179             Dr David Alan Gilbert  <dave@treblig.org>
 180
 181         PR binutils/13135
 182         * arm-dis.c: Add necessary casts for printing integer values.
 183         Use %s when printing string values.
 184         * hppa-dis.c: Likewise.
 185         * m68k-dis.c: Likewise.
 186         * microblaze-dis.c: Likewise.
 187         * mips-dis.c: Likewise.
 188         * sparc-dis.c: Likewise.
 189
 190 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 191
 192         PR binutils/14355
 193         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 194         (VEX_LEN_0FXOP_08_CD): Likewise.
 195         (VEX_LEN_0FXOP_08_CE): Likewise.
 196         (VEX_LEN_0FXOP_08_CF): Likewise.
 197         (VEX_LEN_0FXOP_08_EC): Likewise.
 198         (VEX_LEN_0FXOP_08_ED): Likewise.
 199         (VEX_LEN_0FXOP_08_EE): Likewise.
 200         (VEX_LEN_0FXOP_08_EF): Likewise.
 201         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 202         vpcomub, vpcomuw, vpcomud, vpcomuq.
 203         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 204         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 205         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 206         VEX_LEN_0FXOP_08_EF.
 207
 208 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 209
 210         * i386-dis.c (PREFIX_0F38F6): New.
 211         (prefix_table): Add adcx, adox instructions.
 212         (three_byte_table): Use PREFIX_0F38F6.
 213         (mod_table): Add rdseed instruction.
 214         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 215         (cpu_flags): Likewise.
 216         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 217         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 218         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 219         prefetchw.
 220         * i386-tbl.h: Regenerate.
 221         * i386-init.h: Likewise.
 222
 223 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 224
 225         * mips-dis.c: Remove gratuitous newline.
 226
 227 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 228
 229         * xgate-dis.c: Removed an IF statement that will
 230         always be false due to overlapping operand masks.
 231         * xgate-opc.c: Corrected 'com' opcode entry and
 232         fixed spacing.
 233
 234 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 235
 236         * i386-opc.tbl: Add RepPrefixOk to nop.
 237         * i386-tbl.h: Regenerate.
 238
 239 2012-06-28  Nick Clifton  <nickc@redhat.com>
 240
 241         * po/vi.po: Updated Vietnamese translation.
 242
 243 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 244
 245         * i386-opc.tbl: Add RepPrefixOk to ret.
 246         * i386-tbl.h: Regenerate.
 247
 248         * i386-opc.h (RepPrefixOk): New enum constant.
 249         (i386_opcode_modifier): New bitfield 'repprefixok'.
 250         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 251         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 252         instructions that have IsString.
 253         * i386-tbl.h: Regenerate.
 254
 255 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 256
 257         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 258         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 259         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 260         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 261         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 262         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 263         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 264         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 265         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 266
 267 2012-05-19  Alan Modra  <amodra@gmail.com>
 268
 269         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 270         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 271
 272 2012-05-18  Alan Modra  <amodra@gmail.com>
 273
 274         * ia64-opc.c: Remove #include "ansidecl.h".
 275         * z8kgen.c: Include sysdep.h first.
 276
 277         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 278         * bfin-dis.c: Likewise.
 279         * i860-dis.c: Likewise.
 280         * ia64-dis.c: Likewise.
 281         * ia64-gen.c: Likewise.
 282         * m68hc11-dis.c: Likewise.
 283         * mmix-dis.c: Likewise.
 284         * msp430-dis.c: Likewise.
 285         * or32-dis.c: Likewise.
 286         * rl78-dis.c: Likewise.
 287         * rx-dis.c: Likewise.
 288         * tic4x-dis.c: Likewise.
 289         * tilegx-opc.c: Likewise.
 290         * tilepro-opc.c: Likewise.
 291         * rx-decode.c: Regenerate.
 292
 293 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 294
 295         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 296
 297 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 298
 299         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 300
 301 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 302             Nick Clifton  <nickc@redhat.com>
 303
 304         PR 14072
 305         * configure.in: Add check that sysdep.h has been included before
 306         any system header files.
 307         * configure: Regenerate.
 308         * config.in: Regenerate.
 309         * sysdep.h: Generate an error if included before config.h.
 310         * alpha-opc.c: Include sysdep.h before any other header file.
 311         * alpha-dis.c: Likewise.
 312         * avr-dis.c: Likewise.
 313         * cgen-opc.c: Likewise.
 314         * cr16-dis.c: Likewise.
 315         * cris-dis.c: Likewise.
 316         * crx-dis.c: Likewise.
 317         * d10v-dis.c: Likewise.
 318         * d10v-opc.c: Likewise.
 319         * d30v-dis.c: Likewise.
 320         * d30v-opc.c: Likewise.
 321         * h8500-dis.c: Likewise.
 322         * i370-dis.c: Likewise.
 323         * i370-opc.c: Likewise.
 324         * m10200-dis.c: Likewise.
 325         * m10300-dis.c: Likewise.
 326         * micromips-opc.c: Likewise.
 327         * mips-opc.c: Likewise.
 328         * mips61-opc.c: Likewise.
 329         * moxie-dis.c: Likewise.
 330         * or32-opc.c: Likewise.
 331         * pj-dis.c: Likewise.
 332         * ppc-dis.c: Likewise.
 333         * ppc-opc.c: Likewise.
 334         * s390-dis.c: Likewise.
 335         * sh-dis.c: Likewise.
 336         * sh64-dis.c: Likewise.
 337         * sparc-dis.c: Likewise.
 338         * sparc-opc.c: Likewise.
 339         * spu-dis.c: Likewise.
 340         * tic30-dis.c: Likewise.
 341         * tic54x-dis.c: Likewise.
 342         * tic80-dis.c: Likewise.
 343         * tic80-opc.c: Likewise.
 344         * tilegx-dis.c: Likewise.
 345         * tilepro-dis.c: Likewise.
 346         * v850-dis.c: Likewise.
 347         * v850-opc.c: Likewise.
 348         * vax-dis.c: Likewise.
 349         * w65-dis.c: Likewise.
 350         * xgate-dis.c: Likewise.
 351         * xtensa-dis.c: Likewise.
 352         * rl78-decode.opc: Likewise.
 353         * rl78-decode.c: Regenerate.
 354         * rx-decode.opc: Likewise.
 355         * rx-decode.c: Regenerate.
 356
 357 2012-05-17  Alan Modra  <amodra@gmail.com>
 358
 359         * ppc_dis.c: Don't include elf/ppc.h.
 360
 361 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 362
 363         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 364         to PUSH/POP {reg}.
 365
 366 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 367             Stephane Carrez <stcarrez@nerim.fr>
 368
 369         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 370         target.
 371         * disassemble.c: Likewise.
 372         * configure: Regenerate.
 373         * m68hc11-dis.c: Make objdump output more consistent, use hex
 374         instead of decimal and use 0x prefix for hex.
 375         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 376
 377 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 378
 379         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 380         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 381         (vle_opcd_indices): New array.
 382         (lookup_vle): New function.
 383         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 384         (print_insn_powerpc): Likewise.
 385         * ppc-opc.c: Likewise.
 386
 387 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 388             Maciej W. Rozycki  <macro@codesourcery.com>
 389             Rhonda Wittels  <rhonda@codesourcery.com>
 390             Nathan Froyd <froydnj@codesourcery.com>
 391
 392         * ppc-opc.c (insert_arx, extract_arx): New functions.
 393         (insert_ary, extract_ary): New functions.
 394         (insert_li20, extract_li20): New functions.
 395         (insert_rx, extract_rx): New functions.
 396         (insert_ry, extract_ry): New functions.
 397         (insert_sci8, extract_sci8): New functions.
 398         (insert_sci8n, extract_sci8n): New functions.
 399         (insert_sd4h, extract_sd4h): New functions.
 400         (insert_sd4w, extract_sd4w): New functions.
 401         (insert_vlesi, extract_vlesi): New functions.
 402         (insert_vlensi, extract_vlensi): New functions.
 403         (insert_vleui, extract_vleui): New functions.
 404         (insert_vleil, extract_vleil): New functions.
 405         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 406         (BI16, BI32, BO32, B8): New.
 407         (B15, B24, CRD32, CRS): New.
 408         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 409         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 410         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 411         (SH6_MASK): Use PPC_OPSHIFT_INV.
 412         (SI8, UI5, OIMM5, UI7, BO16): New.
 413         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 414         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 415         (ALLOW8_SPRG): New.
 416         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 417         (OPVUP, OPVUP_MASK OPVUP): New
 418         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 419         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 420         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 421         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 422         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 423         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 424         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 425         (SE_IM5, SE_IM5_MASK): New.
 426         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 427         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 428         (BO32DNZ, BO32DZ): New.
 429         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 430         (PPCVLE): New.
 431         (powerpc_opcodes): Add new VLE instructions.  Update existing
 432         instruction to include PPCVLE if supported.
 433         * ppc-dis.c (ppc_opts): Add vle entry.
 434         (get_powerpc_dialect): New function.
 435         (powerpc_init_dialect): VLE support.
 436         (print_insn_big_powerpc): Call get_powerpc_dialect.
 437         (print_insn_little_powerpc): Likewise.
 438         (operand_value_powerpc): Handle negative shift counts.
 439         (print_insn_powerpc): Handle 2-byte instruction lengths.
 440
 441 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 442
 443         PR binutils/14028
 444         * configure.in: Invoke ACX_HEADER_STRING.
 445         * configure: Regenerate.
 446         * config.in: Regenerate.
 447         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 448         string.h and strings.h.
 449
 450 2012-05-11  Nick Clifton  <nickc@redhat.com>
 451
 452         PR binutils/14006
 453         * arm-dis.c (print_insn): Fix detection of instruction mode in
 454         files containing multiple executable sections.
 455
 456 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 457
 458         * Makefile.in, configure: regenerate
 459         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 460         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 461         New functions.
 462         * configure.in: Recognize xgate.
 463         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 464         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 465         and opcode generation for xgate.
 466
 467 2012-04-30  DJ Delorie  <dj@redhat.com>
 468
 469         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 470         already the maximum bit size.
 471         * rx-decode.c: Regenerate.
 472
 473 2012-04-27  David S. Miller  <davem@davemloft.net>
 474
 475         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 476         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 477
 478         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 479         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 480
 481         * sparc-opc.c (CBCOND): New define.
 482         (CBCOND_XCC): Likewise.
 483         (cbcond): New helper macro.
 484         (sparc_opcodes): Add compare-and-branch instructions.
 485
 486         * sparc-dis.c (print_insn_sparc): Handle ')'.
 487         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 488
 489         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 490         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 491
 492 2012-04-12  David S. Miller  <davem@davemloft.net>
 493
 494         * sparc-dis.c (X_DISP10): Define.
 495         (print_insn_sparc): Handle '='.
 496
 497 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 498
 499         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 500         sprintf call and the '*' field width.
 501
 502 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 503
 504         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 505
 506 2012-03-16  Alan Modra  <amodra@gmail.com>
 507
 508         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 509         (powerpc_opcd_indices): Bump array size.
 510         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 511         corresponding to unused opcodes to following entry.
 512         (lookup_powerpc): New function, extracted and optimised from..
 513         (print_insn_powerpc): ..here.
 514
 515 2012-03-15  Alan Modra  <amodra@gmail.com>
 516             James Lemke  <jwlemke@codesourcery.com>
 517
 518         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 519         * ppc-dis.c (private): New var.
 520         (powerpc_init_dialect): Don't return calloc failure, instead use
 521         private.
 522         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 523         (powerpc_opcd_indices): New array.
 524         (disassemble_init_powerpc): New function.
 525         (print_insn_big_powerpc): Don't init dialect here.
 526         (print_insn_little_powerpc): Likewise.
 527         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 528
 529 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 530
 531         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 532         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 533         (PPCVEC2, PPCTMR, E6500): New short names.
 534         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 535         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 536         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 537         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 538         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 539         optional operands on sync instruction for E6500 target.
 540
 541 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 542
 543         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 544
 545 2012-02-27  Alan Modra  <amodra@gmail.com>
 546
 547         * mt-dis.c: Regenerate.
 548
 549 2012-02-27  Alan Modra  <amodra@gmail.com>
 550
 551         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 552         is the inverse of corresponding insert function.
 553         (extract_d22, extract_u9, extract_r4): Likewise.
 554         (extract_d9): Correct sign extension.
 555         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 556         rely on implementation defined behaviour for shift right of
 557         signed types.
 558         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 559         (extract_d23): Likewise, and correct mask.
 560
 561 2012-02-27  Alan Modra  <amodra@gmail.com>
 562
 563         * crx-dis.c (print_arg): Mask constant to 32 bits.
 564         * crx-opc.c (cst4_map): Use int array.
 565
 566 2012-02-27  Alan Modra  <amodra@gmail.com>
 567
 568         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 569         (FIELDD): Sign extend with xor,sub.
 570
 571 2012-02-25  Walter Lee  <walt@tilera.com>
 572
 573         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 574         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 575         TILEPRO_OPC_LW_TLS_SN.
 576
 577 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 578
 579         * i386-opc.h (HLEPrefixNone): New.
 580         (HLEPrefixLock): Likewise.
 581         (HLEPrefixAny): Likewise.
 582         (HLEPrefixRelease): Likewise.
 583
 584 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 585
 586         * i386-dis.c (HLE_Fixup1): New.
 587         (HLE_Fixup2): Likewise.
 588         (HLE_Fixup3): Likewise.
 589         (Ebh1): Likewise.
 590         (Evh1): Likewise.
 591         (Ebh2): Likewise.
 592         (Evh2): Likewise.
 593         (Ebh3): Likewise.
 594         (Evh3): Likewise.
 595         (MOD_C6_REG_7): Likewise.
 596         (MOD_C7_REG_7): Likewise.
 597         (RM_C6_REG_7): Likewise.
 598         (RM_C7_REG_7): Likewise.
 599         (XACQUIRE_PREFIX): Likewise.
 600         (XRELEASE_PREFIX): Likewise.
 601         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 602         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 603         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 604         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 605         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 606         MOD_C6_REG_7 and MOD_C7_REG_7.
 607         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 608         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 609         xtest.
 610         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 611         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 612
 613         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 614         CPU_RTM_FLAGS.
 615         (cpu_flags): Add CpuHLE and CpuRTM.
 616         (opcode_modifiers): Add HLEPrefixOk.
 617
 618         * i386-opc.h (CpuHLE): New.
 619         (CpuRTM): Likewise.
 620         (HLEPrefixOk): Likewise.
 621         (i386_cpu_flags): Add cpuhle and cpurtm.
 622         (i386_opcode_modifier): Add hleprefixok.
 623
 624         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 625         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 626         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 627         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 628         xtest.
 629         * i386-init.h: Regenerated.
 630         * i386-tbl.h: Likewise.
 631
 632 2012-01-24  DJ Delorie  <dj@redhat.com>
 633
 634         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 635         * rl78-decode.c: Regenerate.
 636
 637 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 638
 639         PR binutils/10173
 640         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 641
 642 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 643
 644         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 645         register and move them after pmove with PSR/PCSR register.
 646
 647 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 648
 649         * i386-dis.c (mod_table): Add vmfunc.
 650
 651         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 652         (cpu_flags): CpuVMFUNC.
 653
 654         * i386-opc.h (CpuVMFUNC): New.
 655         (i386_cpu_flags): Add cpuvmfunc.
 656
 657         * i386-opc.tbl: Add vmfunc.
 658         * i386-init.h: Regenerated.
 659         * i386-tbl.h: Likewise.
 660
 661 For older changes see ChangeLog-2011
 662 \f
 663 Local Variables:
 664 mode: change-log
 665 left-margin: 8
 666 fill-column: 74
 667 version-control: never
 668 End: