1 2020-09-01 Alan Modra <amodra@gmail.com>
3 * mep-ibld.c: Regenerate.
5 2020-08-31 Cooper Qu <cooper.qu@linux.alibaba.com>
7 * csky-dis.c (csky_output_operand): Assign dis_info.value for
10 2020-08-30 Alan Modra <amodra@gmail.com>
12 * cr16-dis.c: Formatting.
13 (parameter): Delete struct typedef. Use dwordU instead
15 (make_argument <arg_idxr>): Simplify detection of cbitb, sbitb
17 (make_argument <arg_cr>): Extract 20-bit field not 16-bit.
19 2020-08-29 Alan Modra <amodra@gmail.com>
22 * csky-opc.h (MAX_OPRND_NUM): Define to 5.
23 (union csky_operand): Use MAX_OPRND_NUM to size oprnds array.
25 2020-08-28 Alan Modra <amodra@gmail.com>
29 * cgen-ibld.in (insert_1): Use 1UL in forming mask.
30 (extract_normal): Likewise.
31 (insert_normal): Likewise, and move past zero length test.
32 (put_insn_int_value): Handle mask for zero length, use 1UL.
33 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
34 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
35 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
36 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
38 2020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com>
40 * csky-dis.c (CSKY_DEFAULT_ISA): Define.
41 (csky_dis_info): Add member isa.
42 (csky_find_inst_info): Skip instructions that do not belong to
44 (csky_get_disassembler): Get infomation from attribute section.
45 (print_insn_csky): Set defualt ISA flag.
46 * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
47 * csky-opc.h (struct csky_opcode): Change isa_flag16 and
48 isa_flag32'type to unsigned 64 bits.
50 2020-08-26 Jose E. Marchesi <jemarch@gnu.org>
52 * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX.
54 2020-08-26 David Faust <david.faust@oracle.com>
56 * bpf-desc.c: Regenerate.
57 * bpf-desc.h: Likewise.
58 * bpf-opc.c: Likewise.
59 * bpf-opc.h: Likewise.
60 * disassemble.c (disassemble_init_for_target): Set bits for xBPF
63 2020-08-25 Alan Modra <amodra@gmail.com>
66 * vax-dis.c (parse_disassembler_options): Always add at least one
67 to entry_addr_total_slots.
69 2020-08-24 Cooper Qu <cooper.qu@linux.alibaba.com>
71 * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
72 in other CPUs to speed up disassembling.
73 * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
74 Change plsli.u16 to plsli.16, change sync's operand format.
76 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
78 * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
80 2020-08-21 Nick Clifton <nickc@redhat.com>
82 * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
85 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
87 * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
89 2020-08-19 Alan Modra <amodra@gmail.com>
91 * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
94 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
96 * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
97 <xvcvbf16spn>: ...to this.
99 2020-08-12 Alex Coplan <alex.coplan@arm.com>
101 * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
103 2020-08-12 Nick Clifton <nickc@redhat.com>
105 * po/sr.po: Updated Serbian translation.
107 2020-08-11 Alan Modra <amodra@gmail.com>
109 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
111 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
113 * aarch64-opc.c (aarch64_print_operand):
114 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
115 (aarch64_sys_reg_supported_p): Function removed.
116 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
117 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
120 2020-08-10 Alan Modra <amodra@gmail.com>
122 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
125 2020-08-10 Alan Modra <amodra@gmail.com>
127 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
128 Enable icbt for power5, miso for power8.
130 2020-08-10 Alan Modra <amodra@gmail.com>
132 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
133 mtvsrd, and similarly for mfvsrd.
135 2020-08-04 Christian Groessler <chris@groessler.org>
136 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
138 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
139 opcodes (special "out" to absolute address).
140 * z8k-opc.h: Regenerate.
142 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
145 * i386-opc.h (Prefix_Disp8): New.
146 (Prefix_Disp16): Likewise.
147 (Prefix_Disp32): Likewise.
148 (Prefix_Load): Likewise.
149 (Prefix_Store): Likewise.
150 (Prefix_VEX): Likewise.
151 (Prefix_VEX3): Likewise.
152 (Prefix_EVEX): Likewise.
153 (Prefix_REX): Likewise.
154 (Prefix_NoOptimize): Likewise.
155 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
156 * i386-tbl.h: Regenerated.
158 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
160 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
161 default case with abort() instead of printing an error message and
162 continuing, to avoid a maybe-uninitialized warning.
164 2020-07-24 Nick Clifton <nickc@redhat.com>
166 * po/de.po: Updated German translation.
168 2020-07-21 Jan Beulich <jbeulich@suse.com>
170 * i386-dis.c (OP_E_memory): Revert previous change.
172 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
175 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
176 without base nor index registers.
178 2020-07-15 Jan Beulich <jbeulich@suse.com>
180 * i386-dis.c (putop): Move 'V' and 'W' handling.
182 2020-07-15 Jan Beulich <jbeulich@suse.com>
184 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
185 construct for push/pop of register.
186 (putop): Honor cond when handling 'P'. Drop handling of plain
189 2020-07-15 Jan Beulich <jbeulich@suse.com>
191 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
192 description. Drop '&' description. Use P for push of immediate,
193 pushf/popf, enter, and leave. Use %LP for lret/retf.
194 (dis386_twobyte): Use P for push/pop of fs/gs.
195 (reg_table): Use P for push/pop. Use @ for near call/jmp.
196 (x86_64_table): Use P for far call/jmp.
197 (putop): Drop handling of 'U' and '&'. Move and adjust handling
198 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
200 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
201 and dqw_mode (unconditional).
203 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
206 * i386-dis.c (OP_E_memory): Without base nor index registers,
207 32-bit displacement to 64 bits.
209 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
211 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
212 faulty double register pair is detected.
214 2020-07-14 Jan Beulich <jbeulich@suse.com>
216 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
218 2020-07-14 Jan Beulich <jbeulich@suse.com>
220 * i386-dis.c (OP_R, Rm): Delete.
221 (MOD_0F24, MOD_0F26): Rename to ...
222 (X86_64_0F24, X86_64_0F26): ... respectively.
223 (dis386): Update 'L' and 'Z' comments.
224 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
226 (mod_table): Move opcode 0F24 and 0F26 entries ...
227 (x86_64_table): ... here.
228 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
231 2020-07-14 Jan Beulich <jbeulich@suse.com>
233 * i386-dis.c (Rd, Rdq, MaskR): Delete.
234 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
235 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
236 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
237 MOD_EVEX_0F387C): New enumerators.
238 (reg_table): Use Edq for rdssp.
239 (prefix_table): Use Edq for incssp.
240 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
241 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
242 ktest*, and kshift*. Use Edq / MaskE for kmov*.
243 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
244 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
245 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
246 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
247 0F3828_P_1 and 0F3838_P_1.
248 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
249 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
251 2020-07-14 Jan Beulich <jbeulich@suse.com>
253 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
254 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
255 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
256 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
257 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
258 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
259 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
260 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
261 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
262 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
263 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
264 (reg_table, prefix_table, three_byte_table, vex_table,
265 vex_len_table, mod_table, rm_table): Replace / remove respective
267 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
268 of PREFIX_DATA in used_prefixes.
270 2020-07-14 Jan Beulich <jbeulich@suse.com>
272 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
273 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
274 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
275 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
276 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
277 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
278 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
279 VEX_W_0F3A33_L_0): Delete.
280 (dis386): Adjust "BW" description.
281 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
282 0F3A31, 0F3A32, and 0F3A33.
283 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
285 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
288 2020-07-14 Jan Beulich <jbeulich@suse.com>
290 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
291 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
292 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
293 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
294 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
295 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
296 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
297 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
298 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
299 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
300 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
301 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
302 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
303 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
304 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
305 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
306 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
307 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
308 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
309 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
310 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
311 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
312 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
313 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
314 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
315 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
316 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
317 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
318 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
319 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
320 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
321 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
322 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
323 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
324 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
325 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
326 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
327 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
328 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
329 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
330 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
331 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
332 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
333 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
334 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
335 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
336 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
337 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
338 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
339 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
340 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
341 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
342 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
343 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
344 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
345 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
346 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
347 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
348 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
349 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
350 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
351 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
352 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
353 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
354 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
355 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
356 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
357 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
358 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
359 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
360 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
361 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
362 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
363 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
364 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
365 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
366 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
367 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
368 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
369 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
370 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
371 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
372 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
373 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
374 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
375 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
376 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
377 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
378 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
379 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
380 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
381 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
382 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
383 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
384 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
385 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
386 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
387 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
388 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
389 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
390 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
391 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
392 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
393 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
394 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
395 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
396 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
397 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
398 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
399 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
400 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
401 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
402 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
403 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
404 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
405 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
406 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
407 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
408 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
409 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
410 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
411 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
412 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
413 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
414 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
415 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
416 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
417 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
418 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
419 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
420 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
421 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
422 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
423 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
424 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
425 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
426 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
427 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
428 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
429 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
430 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
431 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
432 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
433 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
434 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
435 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
436 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
437 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
438 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
439 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
440 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
441 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
442 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
443 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
444 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
445 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
446 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
447 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
448 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
449 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
450 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
451 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
452 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
453 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
454 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
455 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
456 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
457 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
458 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
459 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
460 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
461 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
462 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
463 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
464 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
465 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
466 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
467 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
468 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
469 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
470 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
471 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
472 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
473 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
474 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
475 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
476 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
477 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
478 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
479 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
480 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
481 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
482 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
483 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
484 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
485 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
486 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
487 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
488 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
489 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
490 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
491 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
492 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
493 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
494 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
495 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
496 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
497 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
498 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
499 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
500 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
501 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
502 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
503 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
504 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
505 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
506 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
507 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
508 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
509 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
510 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
511 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
512 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
513 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
514 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
515 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
516 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
517 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
518 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
519 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
520 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
521 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
522 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
523 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
524 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
525 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
526 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
527 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
528 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
529 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
530 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
531 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
532 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
533 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
534 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
535 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
536 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
537 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
538 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
539 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
540 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
541 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
542 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
543 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
544 EVEX_W_0F3A72_P_2): Rename to ...
545 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
546 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
547 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
548 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
549 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
550 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
551 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
552 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
553 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
554 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
555 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
556 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
557 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
558 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
559 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
560 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
561 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
562 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
563 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
564 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
565 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
566 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
567 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
568 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
569 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
570 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
571 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
572 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
573 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
574 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
575 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
576 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
577 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
578 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
579 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
580 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
581 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
582 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
583 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
584 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
585 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
586 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
587 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
588 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
589 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
590 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
591 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
592 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
593 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
594 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
595 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
596 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
597 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
598 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
599 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
600 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
601 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
602 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
603 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
604 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
605 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
606 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
607 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
608 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
609 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
610 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
611 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
612 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
613 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
614 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
615 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
616 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
618 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
619 vex_w_table, mod_table): Replace / remove respective entries.
620 (print_insn): Move up dp->prefix_requirement handling. Handle
622 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
623 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
624 Replace / remove respective entries.
626 2020-07-14 Jan Beulich <jbeulich@suse.com>
628 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
629 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
630 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
631 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
632 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
634 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
635 0F2C, 0F2D, 0F2E, and 0F2F.
636 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
639 2020-07-14 Jan Beulich <jbeulich@suse.com>
641 * i386-dis.c (OP_VexR, VexScalarR): New.
642 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
643 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
644 need_vex_reg): Delete.
645 (prefix_table): Replace VexScalar by VexScalarR and
646 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
647 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
648 (vex_len_table): Replace EXqVexScalarS by EXqS.
649 (get_valid_dis386): Don't set need_vex_reg.
650 (print_insn): Don't initialize need_vex_reg.
651 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
652 q_scalar_swap_mode cases.
653 (OP_EX): Don't check for d_scalar_swap_mode and
655 (OP_VEX): Done check need_vex_reg.
656 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
657 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
658 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
660 2020-07-14 Jan Beulich <jbeulich@suse.com>
662 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
663 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
664 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
665 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
666 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
667 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
668 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
669 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
670 (vex_table): Replace Vex128 by Vex.
671 (vex_len_table): Likewise. Adjust referenced enum names.
672 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
673 referenced enum names.
674 (OP_VEX): Drop vex128_mode and vex256_mode cases.
675 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
677 2020-07-14 Jan Beulich <jbeulich@suse.com>
679 * i386-dis.c (dis386): "LW" description now applies to "DQ".
680 (putop): Handle "DQ". Don't handle "LW" anymore.
681 (prefix_table, mod_table): Replace %LW by %DQ.
682 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
684 2020-07-14 Jan Beulich <jbeulich@suse.com>
686 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
687 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
688 d_scalar_swap_mode case handling. Move shift adjsutment into
689 the case its applicable to.
691 2020-07-14 Jan Beulich <jbeulich@suse.com>
693 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
694 (EXbScalar, EXwScalar): Fold to ...
695 (EXbwUnit): ... this.
696 (b_scalar_mode, w_scalar_mode): Fold to ...
697 (bw_unit_mode): ... this.
698 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
699 w_scalar_mode handling by bw_unit_mode one.
700 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
702 * i386-dis-evex-prefix.h: ... here.
704 2020-07-14 Jan Beulich <jbeulich@suse.com>
706 * i386-dis.c (PCMPESTR_Fixup): Delete.
707 (dis386): Adjust "LQ" description.
708 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
709 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
710 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
711 vpcmpestrm, and vpcmpestri.
712 (putop): Honor "cond" when handling LQ.
713 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
714 vcvtsi2ss and vcvtusi2ss.
715 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
716 vcvtsi2sd and vcvtusi2sd.
718 2020-07-14 Jan Beulich <jbeulich@suse.com>
720 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
721 (simd_cmp_op): Add const.
722 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
723 (CMP_Fixup): Handle VEX case.
724 (prefix_table): Replace VCMP by CMP.
725 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
727 2020-07-14 Jan Beulich <jbeulich@suse.com>
729 * i386-dis.c (MOVBE_Fixup): Delete.
731 (prefix_table): Use Mv for movbe entries.
733 2020-07-14 Jan Beulich <jbeulich@suse.com>
735 * i386-dis.c (CRC32_Fixup): Delete.
736 (prefix_table): Use Eb/Ev for crc32 entries.
738 2020-07-14 Jan Beulich <jbeulich@suse.com>
740 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
741 Conditionalize invocations of "USED_REX (0)".
743 2020-07-14 Jan Beulich <jbeulich@suse.com>
745 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
746 CH, DH, BH, AX, DX): Delete.
747 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
748 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
749 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
751 2020-07-10 Lili Cui <lili.cui@intel.com>
753 * i386-dis.c (TMM): New.
756 (MVexSIBMEM): Likewise.
757 (tmm_mode): Likewise.
758 (vex_sibmem_mode): Likewise.
759 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
760 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
761 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
762 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
763 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
764 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
765 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
766 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
767 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
768 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
769 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
770 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
771 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
772 (PREFIX_VEX_0F3849_X86_64): Likewise.
773 (PREFIX_VEX_0F384B_X86_64): Likewise.
774 (PREFIX_VEX_0F385C_X86_64): Likewise.
775 (PREFIX_VEX_0F385E_X86_64): Likewise.
776 (X86_64_VEX_0F3849): Likewise.
777 (X86_64_VEX_0F384B): Likewise.
778 (X86_64_VEX_0F385C): Likewise.
779 (X86_64_VEX_0F385E): Likewise.
780 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
781 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
782 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
783 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
784 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
785 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
786 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
787 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
788 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
789 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
790 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
791 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
792 (VEX_W_0F3849_X86_64_P_0): Likewise.
793 (VEX_W_0F3849_X86_64_P_2): Likewise.
794 (VEX_W_0F3849_X86_64_P_3): Likewise.
795 (VEX_W_0F384B_X86_64_P_1): Likewise.
796 (VEX_W_0F384B_X86_64_P_2): Likewise.
797 (VEX_W_0F384B_X86_64_P_3): Likewise.
798 (VEX_W_0F385C_X86_64_P_1): Likewise.
799 (VEX_W_0F385E_X86_64_P_0): Likewise.
800 (VEX_W_0F385E_X86_64_P_1): Likewise.
801 (VEX_W_0F385E_X86_64_P_2): Likewise.
802 (VEX_W_0F385E_X86_64_P_3): Likewise.
803 (names_tmm): Likewise.
804 (att_names_tmm): Likewise.
805 (intel_operand_size): Handle void_mode.
806 (OP_XMM): Handle tmm_mode.
809 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
810 CpuAMX_BF16 and CpuAMX_TILE.
811 (operand_type_shorthands): Add RegTMM.
812 (operand_type_init): Likewise.
813 (operand_types): Add Tmmword.
814 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
815 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
816 * i386-opc.h (CpuAMX_INT8): New.
817 (CpuAMX_BF16): Likewise.
818 (CpuAMX_TILE): Likewise.
821 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
822 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
823 (i386_operand_type): Add tmmword.
824 * i386-opc.tbl: Add AMX instructions.
825 * i386-reg.tbl: Add AMX registers.
826 * i386-init.h: Regenerated.
827 * i386-tbl.h: Likewise.
829 2020-07-08 Jan Beulich <jbeulich@suse.com>
831 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
832 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
834 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
835 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
837 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
838 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
839 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
840 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
841 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
842 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
843 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
844 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
845 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
846 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
847 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
848 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
849 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
850 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
851 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
852 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
853 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
854 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
855 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
856 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
857 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
858 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
859 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
860 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
861 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
862 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
863 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
864 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
865 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
866 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
867 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
868 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
869 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
870 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
871 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
872 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
873 (reg_table): Re-order XOP entries. Adjust their operands.
874 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
875 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
876 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
877 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
878 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
879 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
880 entries by references ...
881 (vex_len_table): ... to resepctive new entries here. For several
882 new and existing entries reference ...
883 (vex_w_table): ... new entries here.
884 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
886 2020-07-08 Jan Beulich <jbeulich@suse.com>
888 * i386-dis.c (XMVexScalarI4): Define.
889 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
890 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
891 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
892 (vex_len_table): Move scalar FMA4 entries ...
893 (prefix_table): ... here.
894 (OP_REG_VexI4): Handle scalar_mode.
895 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
896 * i386-tbl.h: Re-generate.
898 2020-07-08 Jan Beulich <jbeulich@suse.com>
900 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
902 (OP_VexW, VexW): New.
903 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
904 for shifts and rotates by register.
906 2020-07-08 Jan Beulich <jbeulich@suse.com>
908 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
909 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
910 OP_EX_VexReg): Delete.
911 (OP_VexI4, VexI4): New.
912 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
913 (prefix_table): ... here.
914 (print_insn): Drop setting of vex_w_done.
916 2020-07-08 Jan Beulich <jbeulich@suse.com>
918 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
919 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
920 (xop_table): Replace operands of 4-operand insns.
921 (OP_REG_VexI4): Move VEX.W based operand swaping here.
923 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
925 * arc-opc.c (insert_rbd): New function.
928 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
931 2020-07-07 Jan Beulich <jbeulich@suse.com>
933 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
934 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
935 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
936 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
938 (putop): Handle "BW".
939 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
940 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
942 * i386-dis-evex-prefix.h: ... here.
944 2020-07-06 Jan Beulich <jbeulich@suse.com>
946 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
947 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
948 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
949 VEX_W_0FXOP_09_83): New enumerators.
950 (xop_table): Reference the above.
951 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
952 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
953 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
954 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
956 2020-07-06 Jan Beulich <jbeulich@suse.com>
958 * i386-dis.c (EVEX_W_0F3838_P_1,
959 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
960 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
961 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
962 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
963 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
964 (putop): Centralize management of last[]. Delete SAVE_LAST.
965 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
966 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
967 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
968 * i386-dis-evex-prefix.h: here.
970 2020-07-06 Jan Beulich <jbeulich@suse.com>
972 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
973 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
974 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
975 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
977 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
978 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
979 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
980 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
981 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
982 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
983 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
984 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
986 * i386-dis-evex-len.h: Adjust comments.
987 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
988 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
989 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
990 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
991 MOD_EVEX_0F385B_P_2_W_1 table entries.
992 * i386-dis-evex-w.h: Reference mod_table[] for
993 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
996 2020-07-06 Jan Beulich <jbeulich@suse.com>
998 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
999 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
1001 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
1002 Likewise. Mark 256-bit entries invalid.
1004 2020-07-06 Jan Beulich <jbeulich@suse.com>
1006 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1007 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1008 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1009 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1010 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1011 PREFIX_EVEX_0F382B): Delete.
1012 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
1013 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
1014 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
1015 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
1016 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
1018 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
1019 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
1020 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
1021 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
1023 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
1024 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
1025 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1026 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1027 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1028 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1029 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1030 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1031 PREFIX_EVEX_0F382B): Remove table entries.
1032 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
1033 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
1034 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1036 2020-07-06 Jan Beulich <jbeulich@suse.com>
1038 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
1039 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
1041 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
1042 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
1043 EVEX_LEN_0F3A01_P_2_W_1 table entries.
1044 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1047 2020-07-06 Jan Beulich <jbeulich@suse.com>
1049 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
1050 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1051 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1052 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
1053 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
1054 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
1055 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1056 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
1057 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1060 2020-07-06 Jan Beulich <jbeulich@suse.com>
1062 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
1063 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
1064 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
1066 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
1068 * i386-dis-evex.h (evex_table): Reference VEX table entry for
1070 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1072 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1074 2020-07-06 Jan Beulich <jbeulich@suse.com>
1076 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1077 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1078 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1079 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1080 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1081 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1082 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1083 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1084 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1085 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1086 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1087 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1088 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1089 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1090 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1091 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1092 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1093 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1094 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1095 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1096 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1097 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1098 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1099 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1100 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1101 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1102 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1103 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1104 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1105 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1106 (prefix_table): Add EXxEVexR to FMA table entries.
1107 (OP_Rounding): Move abort() invocation.
1108 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1109 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1110 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1111 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1112 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1113 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1114 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1115 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1116 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1117 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1119 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1120 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1121 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1122 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1123 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1124 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1125 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1126 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1127 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1128 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1129 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1130 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1131 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1132 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1133 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1134 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1135 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1136 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1137 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1138 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1139 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1140 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1141 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1142 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1143 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1144 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1145 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1146 Delete table entries.
1147 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1148 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1149 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1152 2020-07-06 Jan Beulich <jbeulich@suse.com>
1154 * i386-dis.c (EXqScalarS): Delete.
1155 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1156 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1158 2020-07-06 Jan Beulich <jbeulich@suse.com>
1160 * i386-dis.c (safe-ctype.h): Include.
1161 (EXdScalar, EXqScalar): Delete.
1162 (d_scalar_mode, q_scalar_mode): Delete.
1163 (prefix_table, vex_len_table): Use EXxmm_md in place of
1164 EXdScalar and EXxmm_mq in place of EXqScalar.
1165 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1166 d_scalar_mode and q_scalar_mode.
1167 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1168 (vmovsd): Use EXxmm_mq.
1170 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1173 * arc-dis.c: Fix spelling mistake.
1174 * po/opcodes.pot: Regenerate.
1176 2020-07-06 Nick Clifton <nickc@redhat.com>
1178 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1179 * po/uk.po: Updated Ukranian translation.
1181 2020-07-04 Nick Clifton <nickc@redhat.com>
1183 * configure: Regenerate.
1184 * po/opcodes.pot: Regenerate.
1186 2020-07-04 Nick Clifton <nickc@redhat.com>
1188 Binutils 2.35 branch created.
1190 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1192 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1193 * i386-opc.h (VexSwapSources): New.
1194 (i386_opcode_modifier): Add vexswapsources.
1195 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1196 with two source operands swapped.
1197 * i386-tbl.h: Regenerated.
1199 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1201 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1202 unprivileged CSR can also be initialized.
1204 2020-06-29 Alan Modra <amodra@gmail.com>
1206 * arm-dis.c: Use C style comments.
1207 * cr16-opc.c: Likewise.
1208 * ft32-dis.c: Likewise.
1209 * moxie-opc.c: Likewise.
1210 * tic54x-dis.c: Likewise.
1211 * s12z-opc.c: Remove useless comment.
1212 * xgate-dis.c: Likewise.
1214 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1216 * i386-opc.tbl: Add a blank line.
1218 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1220 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1221 (VecSIB128): Renamed to ...
1223 (VecSIB256): Renamed to ...
1225 (VecSIB512): Renamed to ...
1227 (VecSIB): Renamed to ...
1229 (i386_opcode_modifier): Replace vecsib with sib.
1230 * i386-opc.tbl (VecSIB128): New.
1231 (VecSIB256): Likewise.
1232 (VecSIB512): Likewise.
1233 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1234 and VecSIB512, respectively.
1236 2020-06-26 Jan Beulich <jbeulich@suse.com>
1238 * i386-dis.c: Adjust description of I macro.
1239 (x86_64_table): Drop use of I.
1240 (float_mem): Replace use of I.
1241 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1243 2020-06-26 Jan Beulich <jbeulich@suse.com>
1245 * i386-dis.c: (print_insn): Avoid straight assignment to
1246 priv.orig_sizeflag when processing -M sub-options.
1248 2020-06-25 Jan Beulich <jbeulich@suse.com>
1250 * i386-dis.c: Adjust description of J macro.
1251 (dis386, x86_64_table, mod_table): Replace J.
1252 (putop): Remove handling of J.
1254 2020-06-25 Jan Beulich <jbeulich@suse.com>
1256 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1258 2020-06-25 Jan Beulich <jbeulich@suse.com>
1260 * i386-dis.c: Adjust description of "LQ" macro.
1261 (dis386_twobyte): Use LQ for sysret.
1262 (putop): Adjust handling of LQ.
1264 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1266 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1267 * riscv-dis.c: Include elfxx-riscv.h.
1269 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1271 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1273 2020-06-17 Lili Cui <lili.cui@intel.com>
1275 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1277 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1280 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1281 * i386-opc.tbl: Likewise.
1282 * i386-tbl.h: Regenerated.
1284 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1286 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1288 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1290 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1291 (SR_CORE): Likewise.
1292 (SR_FEAT): Likewise.
1294 (SR_V8_1): Likewise.
1295 (SR_V8_2): Likewise.
1296 (SR_V8_3): Likewise.
1297 (SR_V8_4): Likewise.
1300 (SR_SSBS): Likewise.
1302 (SR_ID_PFR2): Likewise.
1303 (SR_PROFILE): Likewise.
1304 (SR_MEMTAG): Likewise.
1305 (SR_SCXTNUM): Likewise.
1306 (aarch64_sys_regs): Refactor to store feature information in the table.
1307 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1308 that now describe their own features.
1309 (aarch64_pstatefield_supported_p): Likewise.
1311 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1313 * i386-dis.c (prefix_table): Fix a typo in comments.
1315 2020-06-09 Jan Beulich <jbeulich@suse.com>
1317 * i386-dis.c (rex_ignored): Delete.
1318 (ckprefix): Drop rex_ignored initialization.
1319 (get_valid_dis386): Drop setting of rex_ignored.
1320 (print_insn): Drop checking of rex_ignored. Don't record data
1321 size prefix as used with VEX-and-alike encodings.
1323 2020-06-09 Jan Beulich <jbeulich@suse.com>
1325 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1326 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1327 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1328 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1329 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1330 VEX_0F12, and VEX_0F16.
1331 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1332 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1333 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1334 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1335 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1336 MOD_VEX_0F16_PREFIX_2 entries.
1338 2020-06-09 Jan Beulich <jbeulich@suse.com>
1340 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1341 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1342 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1343 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1344 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1345 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1346 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1347 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1348 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1349 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1350 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1351 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1352 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1353 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1354 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1355 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1356 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1357 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1358 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1359 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1360 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1361 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1362 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1363 EVEX_W_0FC6_P_2): Delete.
1364 (print_insn): Add EVEX.W vs embedded prefix consistency check
1365 to prefix validation.
1366 * i386-dis-evex.h (evex_table): Don't further descend for
1367 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1368 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1370 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1371 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1372 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1373 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1374 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1375 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1376 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1377 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1378 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1379 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1380 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1381 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1382 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1383 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1384 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1385 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1386 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1387 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1388 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1389 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1390 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1391 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1392 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1393 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1394 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1395 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1396 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1398 2020-06-09 Jan Beulich <jbeulich@suse.com>
1400 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1401 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1402 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1404 (print_insn): Drop pointless check against bad_opcode. Split
1405 prefix validation into legacy and VEX-and-alike parts.
1406 (putop): Re-work 'X' macro handling.
1408 2020-06-09 Jan Beulich <jbeulich@suse.com>
1410 * i386-dis.c (MOD_0F51): Rename to ...
1411 (MOD_0F50): ... this.
1413 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1415 * arm-dis.c (arm_opcodes): Add dfb.
1416 (thumb32_opcodes): Add dfb.
1418 2020-06-08 Jan Beulich <jbeulich@suse.com>
1420 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1422 2020-06-06 Alan Modra <amodra@gmail.com>
1424 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1426 2020-06-05 Alan Modra <amodra@gmail.com>
1428 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1429 size is large enough.
1431 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1433 * disassemble.c (disassemble_init_for_target): Set endian_code for
1435 * bpf-desc.c: Regenerate.
1436 * bpf-opc.c: Likewise.
1437 * bpf-dis.c: Likewise.
1439 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1441 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1442 (cgen_put_insn_value): Likewise.
1443 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1444 * cgen-dis.in (print_insn): Likewise.
1445 * cgen-ibld.in (insert_1): Likewise.
1446 (insert_1): Likewise.
1447 (insert_insn_normal): Likewise.
1448 (extract_1): Likewise.
1449 * bpf-dis.c: Regenerate.
1450 * bpf-ibld.c: Likewise.
1451 * bpf-ibld.c: Likewise.
1452 * cgen-dis.in: Likewise.
1453 * cgen-ibld.in: Likewise.
1454 * cgen-opc.c: Likewise.
1455 * epiphany-dis.c: Likewise.
1456 * epiphany-ibld.c: Likewise.
1457 * fr30-dis.c: Likewise.
1458 * fr30-ibld.c: Likewise.
1459 * frv-dis.c: Likewise.
1460 * frv-ibld.c: Likewise.
1461 * ip2k-dis.c: Likewise.
1462 * ip2k-ibld.c: Likewise.
1463 * iq2000-dis.c: Likewise.
1464 * iq2000-ibld.c: Likewise.
1465 * lm32-dis.c: Likewise.
1466 * lm32-ibld.c: Likewise.
1467 * m32c-dis.c: Likewise.
1468 * m32c-ibld.c: Likewise.
1469 * m32r-dis.c: Likewise.
1470 * m32r-ibld.c: Likewise.
1471 * mep-dis.c: Likewise.
1472 * mep-ibld.c: Likewise.
1473 * mt-dis.c: Likewise.
1474 * mt-ibld.c: Likewise.
1475 * or1k-dis.c: Likewise.
1476 * or1k-ibld.c: Likewise.
1477 * xc16x-dis.c: Likewise.
1478 * xc16x-ibld.c: Likewise.
1479 * xstormy16-dis.c: Likewise.
1480 * xstormy16-ibld.c: Likewise.
1482 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1484 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1485 (print_insn_): Handle instruction endian.
1486 * bpf-dis.c: Regenerate.
1487 * bpf-desc.c: Regenerate.
1488 * epiphany-dis.c: Likewise.
1489 * epiphany-desc.c: Likewise.
1490 * fr30-dis.c: Likewise.
1491 * fr30-desc.c: Likewise.
1492 * frv-dis.c: Likewise.
1493 * frv-desc.c: Likewise.
1494 * ip2k-dis.c: Likewise.
1495 * ip2k-desc.c: Likewise.
1496 * iq2000-dis.c: Likewise.
1497 * iq2000-desc.c: Likewise.
1498 * lm32-dis.c: Likewise.
1499 * lm32-desc.c: Likewise.
1500 * m32c-dis.c: Likewise.
1501 * m32c-desc.c: Likewise.
1502 * m32r-dis.c: Likewise.
1503 * m32r-desc.c: Likewise.
1504 * mep-dis.c: Likewise.
1505 * mep-desc.c: Likewise.
1506 * mt-dis.c: Likewise.
1507 * mt-desc.c: Likewise.
1508 * or1k-dis.c: Likewise.
1509 * or1k-desc.c: Likewise.
1510 * xc16x-dis.c: Likewise.
1511 * xc16x-desc.c: Likewise.
1512 * xstormy16-dis.c: Likewise.
1513 * xstormy16-desc.c: Likewise.
1515 2020-06-03 Nick Clifton <nickc@redhat.com>
1517 * po/sr.po: Updated Serbian translation.
1519 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1521 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1522 (riscv_get_priv_spec_class): Likewise.
1524 2020-06-01 Alan Modra <amodra@gmail.com>
1526 * bpf-desc.c: Regenerate.
1528 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1529 David Faust <david.faust@oracle.com>
1531 * bpf-desc.c: Regenerate.
1532 * bpf-opc.h: Likewise.
1533 * bpf-opc.c: Likewise.
1534 * bpf-dis.c: Likewise.
1536 2020-05-28 Alan Modra <amodra@gmail.com>
1538 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1541 2020-05-28 Alan Modra <amodra@gmail.com>
1543 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1545 (print_insn_ns32k): Revert last change.
1547 2020-05-28 Nick Clifton <nickc@redhat.com>
1549 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1552 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1554 Fix extraction of signed constants in nios2 disassembler (again).
1556 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1557 extractions of signed fields.
1559 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1561 * s390-opc.txt: Relocate vector load/store instructions with
1562 additional alignment parameter and change architecture level
1563 constraint from z14 to z13.
1565 2020-05-21 Alan Modra <amodra@gmail.com>
1567 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1568 * sparc-dis.c: Likewise.
1569 * tic4x-dis.c: Likewise.
1570 * xtensa-dis.c: Likewise.
1571 * bpf-desc.c: Regenerate.
1572 * epiphany-desc.c: Regenerate.
1573 * fr30-desc.c: Regenerate.
1574 * frv-desc.c: Regenerate.
1575 * ip2k-desc.c: Regenerate.
1576 * iq2000-desc.c: Regenerate.
1577 * lm32-desc.c: Regenerate.
1578 * m32c-desc.c: Regenerate.
1579 * m32r-desc.c: Regenerate.
1580 * mep-asm.c: Regenerate.
1581 * mep-desc.c: Regenerate.
1582 * mt-desc.c: Regenerate.
1583 * or1k-desc.c: Regenerate.
1584 * xc16x-desc.c: Regenerate.
1585 * xstormy16-desc.c: Regenerate.
1587 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1589 * riscv-opc.c (riscv_ext_version_table): The table used to store
1590 all information about the supported spec and the corresponding ISA
1591 versions. Currently, only Zicsr is supported to verify the
1592 correctness of Z sub extension settings. Others will be supported
1593 in the future patches.
1594 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1595 classes and the corresponding strings.
1596 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1597 spec class by giving a ISA spec string.
1598 * riscv-opc.c (struct priv_spec_t): New structure.
1599 (struct priv_spec_t priv_specs): List for all supported privilege spec
1600 classes and the corresponding strings.
1601 (riscv_get_priv_spec_class): New function. Get the corresponding
1602 privilege spec class by giving a spec string.
1603 (riscv_get_priv_spec_name): New function. Get the corresponding
1604 privilege spec string by giving a CSR version class.
1605 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1606 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1607 according to the chosen version. Build a hash table riscv_csr_hash to
1608 store the valid CSR for the chosen pirv verison. Dump the direct
1609 CSR address rather than it's name if it is invalid.
1610 (parse_riscv_dis_option_without_args): New function. Parse the options
1612 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1613 parse the options without arguments first, and then handle the options
1614 with arguments. Add the new option -Mpriv-spec, which has argument.
1615 * riscv-dis.c (print_riscv_disassembler_options): Add description
1616 about the new OBJDUMP option.
1618 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1620 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1621 WC values on POWER10 sync, dcbf and wait instructions.
1622 (insert_pl, extract_pl): New functions.
1623 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1624 (LS3): New , 3-bit L for sync.
1625 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1626 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1627 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1628 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1629 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1630 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1631 <wait>: Enable PL operand on POWER10.
1632 <dcbf>: Enable L3OPT operand on POWER10.
1633 <sync>: Enable SC2 operand on POWER10.
1635 2020-05-19 Stafford Horne <shorne@gmail.com>
1638 * or1k-asm.c: Regenerate.
1639 * or1k-desc.c: Regenerate.
1640 * or1k-desc.h: Regenerate.
1641 * or1k-dis.c: Regenerate.
1642 * or1k-ibld.c: Regenerate.
1643 * or1k-opc.c: Regenerate.
1644 * or1k-opc.h: Regenerate.
1645 * or1k-opinst.c: Regenerate.
1647 2020-05-11 Alan Modra <amodra@gmail.com>
1649 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1652 2020-05-11 Alan Modra <amodra@gmail.com>
1654 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1655 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1657 2020-05-11 Alan Modra <amodra@gmail.com>
1659 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1661 2020-05-11 Alan Modra <amodra@gmail.com>
1663 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1664 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1666 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1668 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1671 2020-05-11 Alan Modra <amodra@gmail.com>
1673 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1674 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1675 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1676 (prefix_opcodes): Add xxeval.
1678 2020-05-11 Alan Modra <amodra@gmail.com>
1680 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1681 xxgenpcvwm, xxgenpcvdm.
1683 2020-05-11 Alan Modra <amodra@gmail.com>
1685 * ppc-opc.c (MP, VXVAM_MASK): Define.
1686 (VXVAPS_MASK): Use VXVA_MASK.
1687 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1688 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1689 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1690 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1692 2020-05-11 Alan Modra <amodra@gmail.com>
1693 Peter Bergner <bergner@linux.ibm.com>
1695 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1697 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1698 YMSK2, XA6a, XA6ap, XB6a entries.
1699 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1700 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1702 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1703 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1704 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1705 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1706 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1707 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1708 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1709 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1710 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1711 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1712 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1713 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1714 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1715 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1717 2020-05-11 Alan Modra <amodra@gmail.com>
1719 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1720 (insert_xts, extract_xts): New functions.
1721 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1722 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1723 (VXRC_MASK, VXSH_MASK): Define.
1724 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1725 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1726 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1727 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1728 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1729 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1730 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1732 2020-05-11 Alan Modra <amodra@gmail.com>
1734 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1735 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1736 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1737 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1738 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1740 2020-05-11 Alan Modra <amodra@gmail.com>
1742 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1743 (XTP, DQXP, DQXP_MASK): Define.
1744 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1745 (prefix_opcodes): Add plxvp and pstxvp.
1747 2020-05-11 Alan Modra <amodra@gmail.com>
1749 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1750 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1751 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1753 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1755 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1757 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1759 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1761 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1763 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1765 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1767 2020-05-11 Alan Modra <amodra@gmail.com>
1769 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1771 2020-05-11 Alan Modra <amodra@gmail.com>
1773 * ppc-dis.c (ppc_opts): Add "power10" entry.
1774 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1775 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1777 2020-05-11 Nick Clifton <nickc@redhat.com>
1779 * po/fr.po: Updated French translation.
1781 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1783 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1784 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1785 (operand_general_constraint_met_p): validate
1786 AARCH64_OPND_UNDEFINED.
1787 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1789 * aarch64-asm-2.c: Regenerated.
1790 * aarch64-dis-2.c: Regenerated.
1791 * aarch64-opc-2.c: Regenerated.
1793 2020-04-29 Nick Clifton <nickc@redhat.com>
1796 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1799 2020-04-29 Nick Clifton <nickc@redhat.com>
1801 * po/sv.po: Updated Swedish translation.
1803 2020-04-29 Nick Clifton <nickc@redhat.com>
1806 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1807 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1808 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1811 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1814 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1815 cmpi only on m68020up and cpu32.
1817 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1819 * aarch64-asm.c (aarch64_ins_none): New.
1820 * aarch64-asm.h (ins_none): New declaration.
1821 * aarch64-dis.c (aarch64_ext_none): New.
1822 * aarch64-dis.h (ext_none): New declaration.
1823 * aarch64-opc.c (aarch64_print_operand): Update case for
1824 AARCH64_OPND_BARRIER_PSB.
1825 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1826 (AARCH64_OPERANDS): Update inserter/extracter for
1827 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1828 * aarch64-asm-2.c: Regenerated.
1829 * aarch64-dis-2.c: Regenerated.
1830 * aarch64-opc-2.c: Regenerated.
1832 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1834 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1835 (aarch64_feature_ras, RAS): Likewise.
1836 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1837 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1838 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1839 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1840 * aarch64-asm-2.c: Regenerated.
1841 * aarch64-dis-2.c: Regenerated.
1842 * aarch64-opc-2.c: Regenerated.
1844 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1846 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1847 (print_insn_neon): Support disassembly of conditional
1850 2020-02-16 David Faust <david.faust@oracle.com>
1852 * bpf-desc.c: Regenerate.
1853 * bpf-desc.h: Likewise.
1854 * bpf-opc.c: Regenerate.
1855 * bpf-opc.h: Likewise.
1857 2020-04-07 Lili Cui <lili.cui@intel.com>
1859 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1860 (prefix_table): New instructions (see prefixes above).
1861 (rm_table): Likewise
1862 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1863 CPU_ANY_TSXLDTRK_FLAGS.
1864 (cpu_flags): Add CpuTSXLDTRK.
1865 * i386-opc.h (enum): Add CpuTSXLDTRK.
1866 (i386_cpu_flags): Add cputsxldtrk.
1867 * i386-opc.tbl: Add XSUSPLDTRK insns.
1868 * i386-init.h: Regenerate.
1869 * i386-tbl.h: Likewise.
1871 2020-04-02 Lili Cui <lili.cui@intel.com>
1873 * i386-dis.c (prefix_table): New instructions serialize.
1874 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1875 CPU_ANY_SERIALIZE_FLAGS.
1876 (cpu_flags): Add CpuSERIALIZE.
1877 * i386-opc.h (enum): Add CpuSERIALIZE.
1878 (i386_cpu_flags): Add cpuserialize.
1879 * i386-opc.tbl: Add SERIALIZE insns.
1880 * i386-init.h: Regenerate.
1881 * i386-tbl.h: Likewise.
1883 2020-03-26 Alan Modra <amodra@gmail.com>
1885 * disassemble.h (opcodes_assert): Declare.
1886 (OPCODES_ASSERT): Define.
1887 * disassemble.c: Don't include assert.h. Include opintl.h.
1888 (opcodes_assert): New function.
1889 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1890 (bfd_h8_disassemble): Reduce size of data array. Correctly
1891 calculate maxlen. Omit insn decoding when insn length exceeds
1892 maxlen. Exit from nibble loop when looking for E, before
1893 accessing next data byte. Move processing of E outside loop.
1894 Replace tests of maxlen in loop with assertions.
1896 2020-03-26 Alan Modra <amodra@gmail.com>
1898 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1900 2020-03-25 Alan Modra <amodra@gmail.com>
1902 * z80-dis.c (suffix): Init mybuf.
1904 2020-03-22 Alan Modra <amodra@gmail.com>
1906 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1907 successflly read from section.
1909 2020-03-22 Alan Modra <amodra@gmail.com>
1911 * arc-dis.c (find_format): Use ISO C string concatenation rather
1912 than line continuation within a string. Don't access needs_limm
1913 before testing opcode != NULL.
1915 2020-03-22 Alan Modra <amodra@gmail.com>
1917 * ns32k-dis.c (print_insn_arg): Update comment.
1918 (print_insn_ns32k): Reduce size of index_offset array, and
1919 initialize, passing -1 to print_insn_arg for args that are not
1920 an index. Don't exit arg loop early. Abort on bad arg number.
1922 2020-03-22 Alan Modra <amodra@gmail.com>
1924 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1925 * s12z-opc.c: Formatting.
1926 (operands_f): Return an int.
1927 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1928 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1929 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1930 (exg_sex_discrim): Likewise.
1931 (create_immediate_operand, create_bitfield_operand),
1932 (create_register_operand_with_size, create_register_all_operand),
1933 (create_register_all16_operand, create_simple_memory_operand),
1934 (create_memory_operand, create_memory_auto_operand): Don't
1935 segfault on malloc failure.
1936 (z_ext24_decode): Return an int status, negative on fail, zero
1938 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1939 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1940 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1941 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1942 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1943 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1944 (loop_primitive_decode, shift_decode, psh_pul_decode),
1945 (bit_field_decode): Similarly.
1946 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1947 to return value, update callers.
1948 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1949 Don't segfault on NULL operand.
1950 (decode_operation): Return OP_INVALID on first fail.
1951 (decode_s12z): Check all reads, returning -1 on fail.
1953 2020-03-20 Alan Modra <amodra@gmail.com>
1955 * metag-dis.c (print_insn_metag): Don't ignore status from
1958 2020-03-20 Alan Modra <amodra@gmail.com>
1960 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1961 Initialize parts of buffer not written when handling a possible
1962 2-byte insn at end of section. Don't attempt decoding of such
1963 an insn by the 4-byte machinery.
1965 2020-03-20 Alan Modra <amodra@gmail.com>
1967 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1968 partially filled buffer. Prevent lookup of 4-byte insns when
1969 only VLE 2-byte insns are possible due to section size. Print
1970 ".word" rather than ".long" for 2-byte leftovers.
1972 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1975 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1977 2020-03-13 Jan Beulich <jbeulich@suse.com>
1979 * i386-dis.c (X86_64_0D): Rename to ...
1980 (X86_64_0E): ... this.
1982 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1984 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1985 * Makefile.in: Regenerated.
1987 2020-03-09 Jan Beulich <jbeulich@suse.com>
1989 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1991 * i386-tbl.h: Re-generate.
1993 2020-03-09 Jan Beulich <jbeulich@suse.com>
1995 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1996 vprot*, vpsha*, and vpshl*.
1997 * i386-tbl.h: Re-generate.
1999 2020-03-09 Jan Beulich <jbeulich@suse.com>
2001 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
2002 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
2003 * i386-tbl.h: Re-generate.
2005 2020-03-09 Jan Beulich <jbeulich@suse.com>
2007 * i386-gen.c (set_bitfield): Ignore zero-length field names.
2008 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
2009 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
2010 * i386-tbl.h: Re-generate.
2012 2020-03-09 Jan Beulich <jbeulich@suse.com>
2014 * i386-gen.c (struct template_arg, struct template_instance,
2015 struct template_param, struct template, templates,
2016 parse_template, expand_templates): New.
2017 (process_i386_opcodes): Various local variables moved to
2018 expand_templates. Call parse_template and expand_templates.
2019 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
2020 * i386-tbl.h: Re-generate.
2022 2020-03-06 Jan Beulich <jbeulich@suse.com>
2024 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
2025 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
2026 register and memory source templates. Replace VexW= by VexW*
2028 * i386-tbl.h: Re-generate.
2030 2020-03-06 Jan Beulich <jbeulich@suse.com>
2032 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
2033 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
2034 * i386-tbl.h: Re-generate.
2036 2020-03-06 Jan Beulich <jbeulich@suse.com>
2038 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
2039 * i386-tbl.h: Re-generate.
2041 2020-03-06 Jan Beulich <jbeulich@suse.com>
2043 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
2044 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
2045 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
2046 VexW0 on SSE2AVX variants.
2047 (vmovq): Drop NoRex64 from XMM/XMM variants.
2048 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
2049 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
2050 applicable use VexW0.
2051 * i386-tbl.h: Re-generate.
2053 2020-03-06 Jan Beulich <jbeulich@suse.com>
2055 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
2056 * i386-opc.h (Rex64): Delete.
2057 (struct i386_opcode_modifier): Remove rex64 field.
2058 * i386-opc.tbl (crc32): Drop Rex64.
2059 Replace Rex64 with Size64 everywhere else.
2060 * i386-tbl.h: Re-generate.
2062 2020-03-06 Jan Beulich <jbeulich@suse.com>
2064 * i386-dis.c (OP_E_memory): Exclude recording of used address
2065 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
2066 addressed memory operands for MPX insns.
2068 2020-03-06 Jan Beulich <jbeulich@suse.com>
2070 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2071 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2072 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2073 (ptwrite): Split into non-64-bit and 64-bit forms.
2074 * i386-tbl.h: Re-generate.
2076 2020-03-06 Jan Beulich <jbeulich@suse.com>
2078 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2080 * i386-tbl.h: Re-generate.
2082 2020-03-04 Jan Beulich <jbeulich@suse.com>
2084 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2085 (prefix_table): Move vmmcall here. Add vmgexit.
2086 (rm_table): Replace vmmcall entry by prefix_table[] escape.
2087 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2088 (cpu_flags): Add CpuSEV_ES entry.
2089 * i386-opc.h (CpuSEV_ES): New.
2090 (union i386_cpu_flags): Add cpusev_es field.
2091 * i386-opc.tbl (vmgexit): New.
2092 * i386-init.h, i386-tbl.h: Re-generate.
2094 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2096 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2098 * i386-opc.h (IGNORESIZE): New.
2099 (DEFAULTSIZE): Likewise.
2100 (IgnoreSize): Removed.
2101 (DefaultSize): Likewise.
2102 (MnemonicSize): New.
2103 (i386_opcode_modifier): Replace ignoresize/defaultsize with
2105 * i386-opc.tbl (IgnoreSize): New.
2106 (DefaultSize): Likewise.
2107 * i386-tbl.h: Regenerated.
2109 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2112 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2115 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2118 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2119 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2120 * i386-tbl.h: Regenerated.
2122 2020-02-26 Alan Modra <amodra@gmail.com>
2124 * aarch64-asm.c: Indent labels correctly.
2125 * aarch64-dis.c: Likewise.
2126 * aarch64-gen.c: Likewise.
2127 * aarch64-opc.c: Likewise.
2128 * alpha-dis.c: Likewise.
2129 * i386-dis.c: Likewise.
2130 * nds32-asm.c: Likewise.
2131 * nfp-dis.c: Likewise.
2132 * visium-dis.c: Likewise.
2134 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2136 * arc-regs.h (int_vector_base): Make it available for all ARC
2139 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2141 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2144 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2146 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2147 c.mv/c.li if rs1 is zero.
2149 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2151 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2152 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2154 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2155 * i386-opc.h (CpuABM): Removed.
2157 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2158 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2159 popcnt. Remove CpuABM from lzcnt.
2160 * i386-init.h: Regenerated.
2161 * i386-tbl.h: Likewise.
2163 2020-02-17 Jan Beulich <jbeulich@suse.com>
2165 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2166 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2167 VexW1 instead of open-coding them.
2168 * i386-tbl.h: Re-generate.
2170 2020-02-17 Jan Beulich <jbeulich@suse.com>
2172 * i386-opc.tbl (AddrPrefixOpReg): Define.
2173 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2174 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2175 templates. Drop NoRex64.
2176 * i386-tbl.h: Re-generate.
2178 2020-02-17 Jan Beulich <jbeulich@suse.com>
2181 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2182 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2183 into Intel syntax instance (with Unpsecified) and AT&T one
2185 (vcvtneps2bf16): Likewise, along with folding the two so far
2187 * i386-tbl.h: Re-generate.
2189 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2191 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2192 CPU_ANY_SSE4A_FLAGS.
2194 2020-02-17 Alan Modra <amodra@gmail.com>
2196 * i386-gen.c (cpu_flag_init): Correct last change.
2198 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2200 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2203 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2205 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2208 2020-02-14 Jan Beulich <jbeulich@suse.com>
2211 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2212 destination for Cpu64-only variant.
2213 (movzx): Fold patterns.
2214 * i386-tbl.h: Re-generate.
2216 2020-02-13 Jan Beulich <jbeulich@suse.com>
2218 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2219 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2220 CPU_ANY_SSE4_FLAGS entry.
2221 * i386-init.h: Re-generate.
2223 2020-02-12 Jan Beulich <jbeulich@suse.com>
2225 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2226 with Unspecified, making the present one AT&T syntax only.
2227 * i386-tbl.h: Re-generate.
2229 2020-02-12 Jan Beulich <jbeulich@suse.com>
2231 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2232 * i386-tbl.h: Re-generate.
2234 2020-02-12 Jan Beulich <jbeulich@suse.com>
2237 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2238 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2239 Amd64 and Intel64 templates.
2240 (call, jmp): Likewise for far indirect variants. Dro
2242 * i386-tbl.h: Re-generate.
2244 2020-02-11 Jan Beulich <jbeulich@suse.com>
2246 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2247 * i386-opc.h (ShortForm): Delete.
2248 (struct i386_opcode_modifier): Remove shortform field.
2249 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2250 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2251 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2252 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2254 * i386-tbl.h: Re-generate.
2256 2020-02-11 Jan Beulich <jbeulich@suse.com>
2258 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2259 fucompi): Drop ShortForm from operand-less templates.
2260 * i386-tbl.h: Re-generate.
2262 2020-02-11 Alan Modra <amodra@gmail.com>
2264 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2265 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2266 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2267 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2268 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2270 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2272 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2273 (cde_opcodes): Add VCX* instructions.
2275 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2276 Matthew Malcomson <matthew.malcomson@arm.com>
2278 * arm-dis.c (struct cdeopcode32): New.
2279 (CDE_OPCODE): New macro.
2280 (cde_opcodes): New disassembly table.
2281 (regnames): New option to table.
2282 (cde_coprocs): New global variable.
2283 (print_insn_cde): New
2284 (print_insn_thumb32): Use print_insn_cde.
2285 (parse_arm_disassembler_options): Parse coprocN args.
2287 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2290 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2292 * i386-opc.h (AMD64): Removed.
2293 (Intel64): Likewose.
2295 (INTEL64): Likewise.
2296 (INTEL64ONLY): Likewise.
2297 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2298 * i386-opc.tbl (Amd64): New.
2299 (Intel64): Likewise.
2300 (Intel64Only): Likewise.
2301 Replace AMD64 with Amd64. Update sysenter/sysenter with
2302 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2303 * i386-tbl.h: Regenerated.
2305 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2308 * z80-dis.c: Add support for GBZ80 opcodes.
2310 2020-02-04 Alan Modra <amodra@gmail.com>
2312 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2314 2020-02-03 Alan Modra <amodra@gmail.com>
2316 * m32c-ibld.c: Regenerate.
2318 2020-02-01 Alan Modra <amodra@gmail.com>
2320 * frv-ibld.c: Regenerate.
2322 2020-01-31 Jan Beulich <jbeulich@suse.com>
2324 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2325 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2326 (OP_E_memory): Replace xmm_mdq_mode case label by
2327 vex_scalar_w_dq_mode one.
2328 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2330 2020-01-31 Jan Beulich <jbeulich@suse.com>
2332 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2333 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2334 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2335 (intel_operand_size): Drop vex_w_dq_mode case label.
2337 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2339 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2340 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2342 2020-01-30 Alan Modra <amodra@gmail.com>
2344 * m32c-ibld.c: Regenerate.
2346 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2348 * bpf-opc.c: Regenerate.
2350 2020-01-30 Jan Beulich <jbeulich@suse.com>
2352 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2353 (dis386): Use them to replace C2/C3 table entries.
2354 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2355 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2356 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2357 * i386-tbl.h: Re-generate.
2359 2020-01-30 Jan Beulich <jbeulich@suse.com>
2361 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2363 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2365 * i386-tbl.h: Re-generate.
2367 2020-01-30 Alan Modra <amodra@gmail.com>
2369 * tic4x-dis.c (tic4x_dp): Make unsigned.
2371 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2372 Jan Beulich <jbeulich@suse.com>
2375 * i386-dis.c (MOVSXD_Fixup): New function.
2376 (movsxd_mode): New enum.
2377 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2378 (intel_operand_size): Handle movsxd_mode.
2379 (OP_E_register): Likewise.
2381 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2382 register on movsxd. Add movsxd with 16-bit destination register
2383 for AMD64 and Intel64 ISAs.
2384 * i386-tbl.h: Regenerated.
2386 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2389 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2390 * aarch64-asm-2.c: Regenerate
2391 * aarch64-dis-2.c: Likewise.
2392 * aarch64-opc-2.c: Likewise.
2394 2020-01-21 Jan Beulich <jbeulich@suse.com>
2396 * i386-opc.tbl (sysret): Drop DefaultSize.
2397 * i386-tbl.h: Re-generate.
2399 2020-01-21 Jan Beulich <jbeulich@suse.com>
2401 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2403 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2404 * i386-tbl.h: Re-generate.
2406 2020-01-20 Nick Clifton <nickc@redhat.com>
2408 * po/de.po: Updated German translation.
2409 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2410 * po/uk.po: Updated Ukranian translation.
2412 2020-01-20 Alan Modra <amodra@gmail.com>
2414 * hppa-dis.c (fput_const): Remove useless cast.
2416 2020-01-20 Alan Modra <amodra@gmail.com>
2418 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2420 2020-01-18 Nick Clifton <nickc@redhat.com>
2422 * configure: Regenerate.
2423 * po/opcodes.pot: Regenerate.
2425 2020-01-18 Nick Clifton <nickc@redhat.com>
2427 Binutils 2.34 branch created.
2429 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2431 * opintl.h: Fix spelling error (seperate).
2433 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2435 * i386-opc.tbl: Add {vex} pseudo prefix.
2436 * i386-tbl.h: Regenerated.
2438 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2441 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2442 (neon_opcodes): Likewise.
2443 (select_arm_features): Make sure we enable MVE bits when selecting
2444 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2447 2020-01-16 Jan Beulich <jbeulich@suse.com>
2449 * i386-opc.tbl: Drop stale comment from XOP section.
2451 2020-01-16 Jan Beulich <jbeulich@suse.com>
2453 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2454 (extractps): Add VexWIG to SSE2AVX forms.
2455 * i386-tbl.h: Re-generate.
2457 2020-01-16 Jan Beulich <jbeulich@suse.com>
2459 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2460 Size64 from and use VexW1 on SSE2AVX forms.
2461 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2462 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2463 * i386-tbl.h: Re-generate.
2465 2020-01-15 Alan Modra <amodra@gmail.com>
2467 * tic4x-dis.c (tic4x_version): Make unsigned long.
2468 (optab, optab_special, registernames): New file scope vars.
2469 (tic4x_print_register): Set up registernames rather than
2470 malloc'd registertable.
2471 (tic4x_disassemble): Delete optable and optable_special. Use
2472 optab and optab_special instead. Throw away old optab,
2473 optab_special and registernames when info->mach changes.
2475 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2478 * z80-dis.c (suffix): Use .db instruction to generate double
2481 2020-01-14 Alan Modra <amodra@gmail.com>
2483 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2484 values to unsigned before shifting.
2486 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2488 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2490 (print_insn_thumb16, print_insn_thumb32): Likewise.
2491 (print_insn): Initialize the insn info.
2492 * i386-dis.c (print_insn): Initialize the insn info fields, and
2495 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2497 * arc-opc.c (C_NE): Make it required.
2499 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2501 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2502 reserved register name.
2504 2020-01-13 Alan Modra <amodra@gmail.com>
2506 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2507 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2509 2020-01-13 Alan Modra <amodra@gmail.com>
2511 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2512 result of wasm_read_leb128 in a uint64_t and check that bits
2513 are not lost when copying to other locals. Use uint32_t for
2514 most locals. Use PRId64 when printing int64_t.
2516 2020-01-13 Alan Modra <amodra@gmail.com>
2518 * score-dis.c: Formatting.
2519 * score7-dis.c: Formatting.
2521 2020-01-13 Alan Modra <amodra@gmail.com>
2523 * score-dis.c (print_insn_score48): Use unsigned variables for
2524 unsigned values. Don't left shift negative values.
2525 (print_insn_score32): Likewise.
2526 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2528 2020-01-13 Alan Modra <amodra@gmail.com>
2530 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2532 2020-01-13 Alan Modra <amodra@gmail.com>
2534 * fr30-ibld.c: Regenerate.
2536 2020-01-13 Alan Modra <amodra@gmail.com>
2538 * xgate-dis.c (print_insn): Don't left shift signed value.
2539 (ripBits): Formatting, use 1u.
2541 2020-01-10 Alan Modra <amodra@gmail.com>
2543 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2544 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2546 2020-01-10 Alan Modra <amodra@gmail.com>
2548 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2549 and XRREG value earlier to avoid a shift with negative exponent.
2550 * m10200-dis.c (disassemble): Similarly.
2552 2020-01-09 Nick Clifton <nickc@redhat.com>
2555 * z80-dis.c (ld_ii_ii): Use correct cast.
2557 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2560 * z80-dis.c (ld_ii_ii): Use character constant when checking
2563 2020-01-09 Jan Beulich <jbeulich@suse.com>
2565 * i386-dis.c (SEP_Fixup): New.
2567 (dis386_twobyte): Use it for sysenter/sysexit.
2568 (enum x86_64_isa): Change amd64 enumerator to value 1.
2569 (OP_J): Compare isa64 against intel64 instead of amd64.
2570 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2572 * i386-tbl.h: Re-generate.
2574 2020-01-08 Alan Modra <amodra@gmail.com>
2576 * z8k-dis.c: Include libiberty.h
2577 (instr_data_s): Make max_fetched unsigned.
2578 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2579 Don't exceed byte_info bounds.
2580 (output_instr): Make num_bytes unsigned.
2581 (unpack_instr): Likewise for nibl_count and loop.
2582 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2584 * z8k-opc.h: Regenerate.
2586 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2588 * arc-tbl.h (llock): Use 'LLOCK' as class.
2590 (scond): Use 'SCOND' as class.
2592 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2595 2020-01-06 Alan Modra <amodra@gmail.com>
2597 * m32c-ibld.c: Regenerate.
2599 2020-01-06 Alan Modra <amodra@gmail.com>
2602 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2603 Peek at next byte to prevent recursion on repeated prefix bytes.
2604 Ensure uninitialised "mybuf" is not accessed.
2605 (print_insn_z80): Don't zero n_fetch and n_used here,..
2606 (print_insn_z80_buf): ..do it here instead.
2608 2020-01-04 Alan Modra <amodra@gmail.com>
2610 * m32r-ibld.c: Regenerate.
2612 2020-01-04 Alan Modra <amodra@gmail.com>
2614 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2616 2020-01-04 Alan Modra <amodra@gmail.com>
2618 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2620 2020-01-04 Alan Modra <amodra@gmail.com>
2622 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2624 2020-01-03 Jan Beulich <jbeulich@suse.com>
2626 * aarch64-tbl.h (aarch64_opcode_table): Use
2627 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2629 2020-01-03 Jan Beulich <jbeulich@suse.com>
2631 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2632 forms of SUDOT and USDOT.
2634 2020-01-03 Jan Beulich <jbeulich@suse.com>
2636 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2638 * opcodes/aarch64-dis-2.c: Re-generate.
2640 2020-01-03 Jan Beulich <jbeulich@suse.com>
2642 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2644 * opcodes/aarch64-dis-2.c: Re-generate.
2646 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2648 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2650 2020-01-01 Alan Modra <amodra@gmail.com>
2652 Update year range in copyright notice of all files.
2654 For older changes see ChangeLog-2019
2656 Copyright (C) 2020 Free Software Foundation, Inc.
2658 Copying and distribution of this file, with or without modification,
2659 are permitted in any medium without royalty provided the copyright
2660 notice and this notice are preserved.
2666 version-control: never
projects / deliverable / binutils-gdb.git / blob