opcodes/ChangeLog

   1 2005-07-07  Khem Raj  <kraj@mvista.com>
   2
   3         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
   4         disassembly pattern.
   5
   6 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
   7
   8         * Makefile.am (stamp-m32r): Fix path to cpu files.
   9         (stamp-m32r, stamp-iq2000): Likewise.
  10         * Makefile.in: Regenerate.
  11         * m32r-asm.c: Regenerate.
  12         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
  13         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
  14
  15 2005-07-05  Nick Clifton  <nickc@redhat.com>
  16
  17         * iq2000-asm.c: Regenerate.
  18         * ms1-asm.c: Regenerate.
  19
  20 2005-07-05  Jan Beulich  <jbeulich@novell.com>
  21
  22         * i386-dis.c (SVME_Fixup): New.
  23         (grps): Use it for the lidt entry.
  24         (PNI_Fixup): Call OP_M rather than OP_E.
  25         (INVLPG_Fixup): Likewise.
  26
  27 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
  28
  29         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
  30
  31 2005-07-01  Nick Clifton  <nickc@redhat.com>
  32
  33         * a29k-dis.c: Update to ISO C90 style function declarations and
  34         fix formatting.
  35         * alpha-opc.c: Likewise.
  36         * arc-dis.c: Likewise.
  37         * arc-opc.c: Likewise.
  38         * avr-dis.c: Likewise.
  39         * cgen-asm.in: Likewise.
  40         * cgen-dis.in: Likewise.
  41         * cgen-ibld.in: Likewise.
  42         * cgen-opc.c: Likewise.
  43         * cris-dis.c: Likewise.
  44         * d10v-dis.c: Likewise.
  45         * d30v-dis.c: Likewise.
  46         * d30v-opc.c: Likewise.
  47         * dis-buf.c: Likewise.
  48         * dlx-dis.c: Likewise.
  49         * h8300-dis.c: Likewise.
  50         * h8500-dis.c: Likewise.
  51         * hppa-dis.c: Likewise.
  52         * i370-dis.c: Likewise.
  53         * i370-opc.c: Likewise.
  54         * m10200-dis.c: Likewise.
  55         * m10300-dis.c: Likewise.
  56         * m68k-dis.c: Likewise.
  57         * m88k-dis.c: Likewise.
  58         * mips-dis.c: Likewise.
  59         * mmix-dis.c: Likewise.
  60         * msp430-dis.c: Likewise.
  61         * ns32k-dis.c: Likewise.
  62         * or32-dis.c: Likewise.
  63         * or32-opc.c: Likewise.
  64         * pdp11-dis.c: Likewise.
  65         * pj-dis.c: Likewise.
  66         * s390-dis.c: Likewise.
  67         * sh-dis.c: Likewise.
  68         * sh64-dis.c: Likewise.
  69         * sparc-dis.c: Likewise.
  70         * sparc-opc.c: Likewise.
  71         * sysdep.h: Likewise.
  72         * tic30-dis.c: Likewise.
  73         * tic4x-dis.c: Likewise.
  74         * tic80-dis.c: Likewise.
  75         * v850-dis.c: Likewise.
  76         * v850-opc.c: Likewise.
  77         * vax-dis.c: Likewise.
  78         * w65-dis.c: Likewise.
  79         * z8kgen.c: Likewise.
  80
  81         * fr30-*: Regenerate.
  82         * frv-*: Regenerate.
  83         * ip2k-*: Regenerate.
  84         * iq2000-*: Regenerate.
  85         * m32r-*: Regenerate.
  86         * ms1-*: Regenerate.
  87         * openrisc-*: Regenerate.
  88         * xstormy16-*: Regenerate.
  89
  90 2005-06-23  Ben Elliston  <bje@gnu.org>
  91
  92         * m68k-dis.c: Use ISC C90.
  93         * m68k-opc.c: Formatting fixes.
  94
  95 2005-06-16  David Ung  <davidu@mips.com>
  96
  97         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
  98         instructions to the table; seb/seh/sew/zeb/zeh/zew.
  99
 100 2005-06-15  Dave Brolley  <brolley@redhat.com>
 101
 102         Contribute Morpho ms1 on behalf of Red Hat
 103         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 104         ms1-opc.h: New files, Morpho ms1 target.
 105
 106         2004-05-14  Stan Cox  <scox@redhat.com>
 107
 108         * disassemble.c (ARCH_ms1): Define.
 109         (disassembler): Handle bfd_arch_ms1
 110
 111         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 112
 113         * Makefile.am, Makefile.in: Add ms1 target.
 114         * configure.in: Ditto.
 115
 116 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 117
 118         * arm-opc.h: Delete; fold contents into ...
 119         * arm-dis.c: ... here.  Move includes of internal COFF headers
 120         next to includes of internal ELF headers.
 121         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 122         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 123         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 124         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 125         (iwmmxt_wwnames, iwmmxt_wwssnames):
 126         Make const.
 127         (regnames): Remove iWMMXt coprocessor register sets.
 128         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 129         (get_arm_regnames): Adjust fourth argument to match above changes.
 130         (set_iwmmxt_regnames): Delete.
 131         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 132         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 133         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 134         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 135         ISO syntax for function pointer calls.
 136
 137 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 138
 139         * arm-dis.c: Split up the comments describing the format codes, so
 140         that the ARM and 16-bit Thumb opcode tables each have comments
 141         preceding them that describe all the codes, and only the codes,
 142         valid in those tables.  (32-bit Thumb table is already like this.)
 143         Reorder the lists in all three comments to match the order in
 144         which the codes are implemented.
 145         Remove all forward declarations of static functions.  Convert all
 146         function definitions to ISO C format.
 147         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 148         Return nothing.
 149         (print_insn_thumb16): Remove unused case 'I'.
 150         (print_insn): Update for changed calling convention of subroutines.
 151
 152 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 153
 154         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 155         hex (but retain it being displayed as signed). Remove redundant
 156         checks. Add handling of displacements for 16-bit addressing in Intel
 157         mode.
 158
 159 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 160
 161         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 162         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 163         masking of 'rm' in 16-bit memory address handling.
 164
 165 2005-05-19  Anton Blanchard  <anton@samba.org>
 166
 167         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 168         (print_ppc_disassembler_options): Document it.
 169         * ppc-opc.c (SVC_LEV): Define.
 170         (LEV): Allow optional operand.
 171         (POWER5): Define.
 172         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 173         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 174
 175 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 176
 177         * Makefile.in:  Regenerate.
 178
 179 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 180
 181         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 182         instructions.  Adjust disassembly of some opcodes to match
 183         unified syntax.
 184         (thumb32_opcodes): New table.
 185         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 186         two-halfword branches here.
 187         (print_insn_thumb32): New function.
 188         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 189         and print_insn_thumb32.  Be consistent about order of
 190         halfwords when printing 32-bit instructions.
 191
 192 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 193
 194         PR 843
 195         * i386-dis.c (branch_v_mode): New.
 196         (indirEv): Use branch_v_mode instead of v_mode.
 197         (OP_E): Handle branch_v_mode.
 198
 199 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 200
 201         * d10v-dis.c (dis_2_short): Support 64bit host.
 202
 203 2005-05-07  Nick Clifton  <nickc@redhat.com>
 204
 205         * po/nl.po: Updated translation.
 206
 207 2005-05-07  Nick Clifton  <nickc@redhat.com>
 208
 209         * Update the address and phone number of the FSF organization in
 210         the GPL notices in the following files:
 211         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 212         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 213         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 214         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 215         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 216         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 217         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 218         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 219         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 220         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 221         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 222         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 223         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 224         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 225         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 226         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 227         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 228         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 229         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 230         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 231         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 232         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 233         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 234         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 235         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 236         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 237         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 238         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 239         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 240         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 241         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 242         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 243         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 244
 245 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 246
 247         * ia64-opc.c: Include sysdep.h before libiberty.h.
 248
 249 2005-05-05  Nick Clifton  <nickc@redhat.com>
 250
 251         * configure.in (ALL_LINGUAS): Add vi.
 252         * configure: Regenerate.
 253         * po/vi.po: New.
 254
 255 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 256
 257         * configure.in: Fix the check for basename declaration.
 258         * configure: Regenerate.
 259
 260 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 261
 262         * ppc-opc.c (RTO): Define.
 263         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 264         entries to suit PPC440.
 265
 266 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 267
 268         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 269         Add xcrypt-ctr.
 270
 271 2005-04-14  Nick Clifton  <nickc@redhat.com>
 272
 273         * po/fi.po: New translation: Finnish.
 274         * configure.in (ALL_LINGUAS): Add fi.
 275         * configure: Regenerate.
 276
 277 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 278
 279         * Makefile.am (NO_WERROR): Define.
 280         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 281         * Makefile.in: Regenerate.
 282         * aclocal.m4: Regenerate.
 283         * configure: Regenerate.
 284
 285 2005-04-04  Nick Clifton  <nickc@redhat.com>
 286
 287         * fr30-asm.c: Regenerate.
 288         * frv-asm.c: Regenerate.
 289         * iq2000-asm.c: Regenerate.
 290         * m32r-asm.c: Regenerate.
 291         * openrisc-asm.c: Regenerate.
 292
 293 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 294
 295         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 296         visible operands in Intel mode. The first operand of monitor is
 297         %rax in 64-bit mode.
 298
 299 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 300
 301         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 302         easier future additions.
 303
 304 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 305
 306         * configure.in: Check for basename.
 307         * configure: Regenerate.
 308         * config.in: Ditto.
 309
 310 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 311
 312         * i386-dis.c (SEG_Fixup): New.
 313         (Sv): New.
 314         (dis386): Use "Sv" for 0x8c and 0x8e.
 315
 316 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 317             Nick Clifton  <nickc@redhat.com>
 318
 319         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 320         function entry mask addresses.
 321         (entry_addr_occupied_slots): New variable: The number of occupied
 322         elements in entry_addr.
 323         (entry_addr_total_slots): New variable: The total number of
 324         elements in entry_addr.
 325         (parse_disassembler_options): New function.  Fills in the entry_addr
 326         array.
 327         (free_entry_array): New function.  Release the memory used by the
 328         entry addr array.  Suppressed because there is no way to call it.
 329         (is_function_entry): Check if a given address is a function's
 330         start address by looking at supplied entry mask addresses and
 331         symbol information, if available.
 332         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 333
 334 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 335
 336         * cris-dis.c (print_with_operands): Use ~31L for long instead
 337         of ~31.
 338
 339 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 340
 341         * mmix-opc.c (O): Revert the last change.
 342         (Z): Likewise.
 343
 344 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 345
 346         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 347         (Z): Likewise.
 348
 349 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 350
 351         * mmix-opc.c (O, Z): Force expression as unsigned long.
 352
 353 2005-03-18  Nick Clifton  <nickc@redhat.com>
 354
 355         * ip2k-asm.c: Regenerate.
 356         * op/opcodes.pot: Regenerate.
 357
 358 2005-03-16  Nick Clifton  <nickc@redhat.com>
 359             Ben Elliston  <bje@au.ibm.com>
 360
 361         * configure.in (werror): New switch: Add -Werror to the
 362         compiler command line.  Enabled by default.  Disable via
 363         --disable-werror.
 364         * configure: Regenerate.
 365
 366 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 367
 368         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 369         BOOKE.
 370
 371 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 372
 373         * po/es.po: Commit new Spanish translation.
 374
 375         * po/fr.po: Commit new French translation.
 376
 377 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 378
 379         * vax-dis.c: Fix spelling error
 380         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 381         of just "Entry mask: < r1 ... >"
 382
 383 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 384
 385         * arm-dis.c (arm_opcodes): Document %E and %V.
 386         Add entries for v6T2 ARM instructions:
 387         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 388         (print_insn_arm): Add support for %E and %V.
 389         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 390
 391 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 392             Alan Modra  <amodra@bigpond.net.au>
 393
 394         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 395         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 396         (SPRG_MASK): Delete.
 397         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 398         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 399         mfsprg4..7 after msprg and consolidate.
 400
 401 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 402
 403         * vax-dis.c (entry_mask_bit): New array.
 404         (print_insn_vax): Decode function entry mask.
 405
 406 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 407
 408         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 409
 410 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 411
 412         * po/opcodes.pot: Regenerate.
 413
 414 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 415
 416         * arc-dis.c (a4_decoding_class): New enum.
 417         (dsmOneArcInst): Use the enum values for the decoding class.
 418         Remove redundant case in the switch for decodingClass value 11.
 419
 420 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 421
 422         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 423         accesses.
 424         (OP_C): Consider lock prefix in non-64-bit modes.
 425
 426 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 427
 428         * cris-dis.c (format_hex): Remove ineffective warning fix.
 429         * crx-dis.c (make_instruction): Warning fix.
 430         * frv-asm.c: Regenerate.
 431
 432 2005-02-23  Nick Clifton  <nickc@redhat.com>
 433
 434         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 435         read_memory.
 436
 437         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 438
 439         * crx-dis.c (make_instruction): Move argument structure into inner
 440         scope and ensure that all of its fields are initialised before
 441         they are used.
 442
 443         * fr30-asm.c: Regenerate.
 444         * fr30-dis.c: Regenerate.
 445         * frv-asm.c: Regenerate.
 446         * frv-dis.c: Regenerate.
 447         * ip2k-asm.c: Regenerate.
 448         * ip2k-dis.c: Regenerate.
 449         * iq2000-asm.c: Regenerate.
 450         * iq2000-dis.c: Regenerate.
 451         * m32r-asm.c: Regenerate.
 452         * m32r-dis.c: Regenerate.
 453         * openrisc-asm.c: Regenerate.
 454         * openrisc-dis.c: Regenerate.
 455         * xstormy16-asm.c: Regenerate.
 456         * xstormy16-dis.c: Regenerate.
 457
 458 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 459
 460         * arc-ext.c: Warning fixes.
 461         * arc-ext.h: Likewise.
 462         * cgen-opc.c: Likewise.
 463         * ia64-gen.c: Likewise.
 464         * maxq-dis.c: Likewise.
 465         * ns32k-dis.c: Likewise.
 466         * w65-dis.c: Likewise.
 467         * ia64-asmtab.c: Regenerate.
 468
 469 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 470
 471         * fr30-desc.c: Regenerate.
 472         * fr30-desc.h: Regenerate.
 473         * fr30-opc.c: Regenerate.
 474         * fr30-opc.h: Regenerate.
 475         * frv-desc.c: Regenerate.
 476         * frv-desc.h: Regenerate.
 477         * frv-opc.c: Regenerate.
 478         * frv-opc.h: Regenerate.
 479         * ip2k-desc.c: Regenerate.
 480         * ip2k-desc.h: Regenerate.
 481         * ip2k-opc.c: Regenerate.
 482         * ip2k-opc.h: Regenerate.
 483         * iq2000-desc.c: Regenerate.
 484         * iq2000-desc.h: Regenerate.
 485         * iq2000-opc.c: Regenerate.
 486         * iq2000-opc.h: Regenerate.
 487         * m32r-desc.c: Regenerate.
 488         * m32r-desc.h: Regenerate.
 489         * m32r-opc.c: Regenerate.
 490         * m32r-opc.h: Regenerate.
 491         * m32r-opinst.c: Regenerate.
 492         * openrisc-desc.c: Regenerate.
 493         * openrisc-desc.h: Regenerate.
 494         * openrisc-opc.c: Regenerate.
 495         * openrisc-opc.h: Regenerate.
 496         * xstormy16-desc.c: Regenerate.
 497         * xstormy16-desc.h: Regenerate.
 498         * xstormy16-opc.c: Regenerate.
 499         * xstormy16-opc.h: Regenerate.
 500
 501 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 502
 503         * Makefile.am: Run "make dep-am"
 504         * Makefile.in: Regenerate.
 505
 506 2005-02-15  Nick Clifton  <nickc@redhat.com>
 507
 508         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 509         compile time warnings.
 510         (print_keyword): Likewise.
 511         (default_print_insn): Likewise.
 512
 513         * fr30-desc.c: Regenerated.
 514         * fr30-desc.h: Regenerated.
 515         * fr30-dis.c: Regenerated.
 516         * fr30-opc.c: Regenerated.
 517         * fr30-opc.h: Regenerated.
 518         * frv-desc.c: Regenerated.
 519         * frv-dis.c: Regenerated.
 520         * frv-opc.c: Regenerated.
 521         * ip2k-asm.c: Regenerated.
 522         * ip2k-desc.c: Regenerated.
 523         * ip2k-desc.h: Regenerated.
 524         * ip2k-dis.c: Regenerated.
 525         * ip2k-opc.c: Regenerated.
 526         * ip2k-opc.h: Regenerated.
 527         * iq2000-desc.c: Regenerated.
 528         * iq2000-dis.c: Regenerated.
 529         * iq2000-opc.c: Regenerated.
 530         * m32r-asm.c: Regenerated.
 531         * m32r-desc.c: Regenerated.
 532         * m32r-desc.h: Regenerated.
 533         * m32r-dis.c: Regenerated.
 534         * m32r-opc.c: Regenerated.
 535         * m32r-opc.h: Regenerated.
 536         * m32r-opinst.c: Regenerated.
 537         * openrisc-desc.c: Regenerated.
 538         * openrisc-desc.h: Regenerated.
 539         * openrisc-dis.c: Regenerated.
 540         * openrisc-opc.c: Regenerated.
 541         * openrisc-opc.h: Regenerated.
 542         * xstormy16-desc.c: Regenerated.
 543         * xstormy16-desc.h: Regenerated.
 544         * xstormy16-dis.c: Regenerated.
 545         * xstormy16-opc.c: Regenerated.
 546         * xstormy16-opc.h: Regenerated.
 547
 548 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 549
 550         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 551         address.
 552
 553 2005-02-11  Nick Clifton  <nickc@redhat.com>
 554
 555         * iq2000-asm.c: Regenerate.
 556
 557         * frv-dis.c: Regenerate.
 558
 559 2005-02-07  Jim Blandy  <jimb@redhat.com>
 560
 561         * Makefile.am (CGEN): Load guile.scm before calling the main
 562         application script.
 563         * Makefile.in: Regenerated.
 564         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 565         Simply pass the cgen-opc.scm path to ${cgen} as its first
 566         argument; ${cgen} itself now contains the '-s', or whatever is
 567         appropriate for the Scheme being used.
 568
 569 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 570
 571         * configure: Regenerate to track ../gettext.m4.
 572
 573 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 574
 575         * ia64-gen.c (NELEMS): Define.
 576         (shrink): Generate alias with missing second predicate register when
 577         opcode has two outputs and these are both predicates.
 578         * ia64-opc-i.c (FULL17): Define.
 579         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 580         here to generate output template.
 581         (TBITCM, TNATCM): Undefine after use.
 582         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 583         first input. Add ld16 aliases without ar.csd as second output. Add
 584         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 585         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 586         ar.ccv as third/fourth inputs. Consolidate through...
 587         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 588         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 589         * ia64-asmtab.c: Regenerate.
 590
 591 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 592
 593         * configure: Regenerate to track ../gettext.m4 change.
 594
 595 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 596
 597         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 598         * frv-asm.c: Rebuilt.
 599         * frv-desc.c: Rebuilt.
 600         * frv-desc.h: Rebuilt.
 601         * frv-dis.c: Rebuilt.
 602         * frv-ibld.c: Rebuilt.
 603         * frv-opc.c: Rebuilt.
 604         * frv-opc.h: Rebuilt.
 605
 606 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 607
 608         * configure: Regenerate, ../gettext.m4 was updated.
 609
 610 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 611
 612         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 613         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 614         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 615         * mips-dis.c: Ditto.
 616
 617 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 618
 619         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 620
 621 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 622
 623         * mips-dis.c (no_aliases): New disassembly option flag.
 624         (set_default_mips_dis_options): Init no_aliases to zero.
 625         (parse_mips_dis_option): Handle no-aliases option.
 626         (print_insn_mips): Ignore table entries that are aliases
 627         if no_aliases is set.
 628         (print_insn_mips16): Ditto.
 629         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 630         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 631         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 632         * mips16-opc.c (mips16_opcodes): Ditto.
 633
 634 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 635
 636         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 637         (inheritance diagram): Add missing edge.
 638         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 639         easier for the testsuite.
 640         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 641         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 642         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 643         arch_sh2a_or_sh4_up child.
 644         (sh_table): Do renaming as above.
 645         Correct comment for ldc.l for gas testsuite to read.
 646         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 647         Correct comments for movy.w and movy.l for gas testsuite to read.
 648         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 649
 650 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 651
 652         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 653
 654 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 655
 656         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 657
 658 2005-01-10  Andreas Schwab  <schwab@suse.de>
 659
 660         * disassemble.c (disassemble_init_for_target) <case
 661         bfd_arch_ia64>: Set skip_zeroes to 16.
 662         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 663
 664 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 665
 666         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 667
 668 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 669
 670         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 671         memory references. Convert avr_operand() to C90 formatting.
 672
 673 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 674
 675         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 676
 677 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 678
 679         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 680         (no_op_insn): Initialize array with instructions that have no
 681         operands.
 682         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 683
 684 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 685
 686         * arm-dis.c: Correct top-level comment.
 687
 688 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 689
 690         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 691         architecuture defining the insn.
 692         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 693         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 694         field.
 695         Also include opcode/arm.h.
 696         * Makefile.am (arm-dis.lo): Update dependency list.
 697         * Makefile.in: Regenerate.
 698
 699 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 700
 701         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 702         reflect the change to the short immediate syntax.
 703
 704 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 705
 706         * or32-opc.c (debug): Warning fix.
 707         * po/POTFILES.in: Regenerate.
 708
 709         * maxq-dis.c: Formatting.
 710         (print_insn): Warning fix.
 711
 712 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 713
 714         * arm-dis.c (WORD_ADDRESS): Define.
 715         (print_insn): Use it.  Correct big-endian end-of-section handling.
 716
 717 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 718             Vineet Sharma      <vineets@noida.hcltech.com>
 719
 720         * maxq-dis.c: New file.
 721         * disassemble.c (ARCH_maxq): Define.
 722         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 723         instructions..
 724         * configure.in: Add case for bfd_maxq_arch.
 725         * configure: Regenerate.
 726         * Makefile.am: Add support for maxq-dis.c
 727         * Makefile.in: Regenerate.
 728         * aclocal.m4: Regenerate.
 729
 730 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 731
 732         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 733         mode.
 734         * crx-dis.c: Likewise.
 735
 736 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 737
 738         Generally, handle CRISv32.
 739         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 740         (struct cris_disasm_data): New type.
 741         (format_reg, format_hex, cris_constraint, print_flags)
 742         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 743         callers changed.
 744         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 745         (print_insn_crisv32_without_register_prefix)
 746         (print_insn_crisv10_v32_with_register_prefix)
 747         (print_insn_crisv10_v32_without_register_prefix)
 748         (cris_parse_disassembler_options): New functions.
 749         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 750         parameter.  All callers changed.
 751         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 752         failure.
 753         (cris_constraint) <case 'Y', 'U'>: New cases.
 754         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 755         for constraint 'n'.
 756         (print_with_operands) <case 'Y'>: New case.
 757         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 758         <case 'N', 'Y', 'Q'>: New cases.
 759         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 760         (print_insn_cris_with_register_prefix)
 761         (print_insn_cris_without_register_prefix): Call
 762         cris_parse_disassembler_options.
 763         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 764         for CRISv32 and the size of immediate operands.  New v32-only
 765         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 766         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 767         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 768         Change brp to be v3..v10.
 769         (cris_support_regs): New vector.
 770         (cris_opcodes): Update head comment.  New format characters '[',
 771         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 772         Add new opcodes for v32 and adjust existing opcodes to accommodate
 773         differences to earlier variants.
 774         (cris_cond15s): New vector.
 775
 776 2004-11-04 Jan Beulich <jbeulich@novell.com>
 777
 778         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 779         (indirEb): Remove.
 780         (Mp): Use f_mode rather than none at all.
 781         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 782         replaces what previously was x_mode; x_mode now means 128-bit SSE
 783         operands.
 784         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 785         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 786         pinsrw's second operand is Edqw.
 787         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 788         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 789         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 790         mode when an operand size override is present or always suffixing.
 791         More instructions will need to be added to this group.
 792         (putop): Handle new macro chars 'C' (short/long suffix selector),
 793         'I' (Intel mode override for following macro char), and 'J' (for
 794         adding the 'l' prefix to far branches in AT&T mode). When an
 795         alternative was specified in the template, honor macro character when
 796         specified for Intel mode.
 797         (OP_E): Handle new *_mode values. Correct pointer specifications for
 798         memory operands. Consolidate output of index register.
 799         (OP_G): Handle new *_mode values.
 800         (OP_I): Handle const_1_mode.
 801         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 802         respective opcode prefix bits have been consumed.
 803         (OP_EM, OP_EX): Provide some default handling for generating pointer
 804         specifications.
 805
 806 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 807
 808         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 809         COP_INST macro.
 810
 811 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 812
 813         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 814         (getregliststring): Support HI/LO and user registers.
 815         * crx-opc.c (crx_instruction): Update data structure according to the
 816         rearrangement done in CRX opcode header file.
 817         (crx_regtab):  Likewise.
 818         (crx_optab):  Likewise.
 819         (crx_instruction): Reorder load/stor instructions, remove unsupported
 820         formats.
 821         support new Co-Processor instruction 'cpi'.
 822
 823 2004-10-27  Nick Clifton  <nickc@redhat.com>
 824
 825         * opcodes/iq2000-asm.c: Regenerate.
 826         * opcodes/iq2000-desc.c: Regenerate.
 827         * opcodes/iq2000-desc.h: Regenerate.
 828         * opcodes/iq2000-dis.c: Regenerate.
 829         * opcodes/iq2000-ibld.c: Regenerate.
 830         * opcodes/iq2000-opc.c: Regenerate.
 831         * opcodes/iq2000-opc.h: Regenerate.
 832
 833 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 834
 835         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 836         us4, us5 (respectively).
 837         Remove unsupported 'popa' instruction.
 838         Reverse operands order in store co-processor instructions.
 839
 840 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 841
 842         * Makefile.am: Run "make dep-am"
 843         * Makefile.in: Regenerate.
 844
 845 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 846
 847         * xtensa-dis.c: Use ISO C90 formatting.
 848
 849 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 850
 851         * ppc-opc.c: Revert 2004-09-09 change.
 852
 853 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 854
 855         * xtensa-dis.c (state_names): Delete.
 856         (fetch_data): Use xtensa_isa_maxlength.
 857         (print_xtensa_operand): Replace operand parameter with opcode/operand
 858         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 859         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 860         instruction bundles.  Use xmalloc instead of malloc.
 861
 862 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 863
 864         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 865         initializers.
 866
 867 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 868
 869         * crx-opc.c (crx_instruction): Support Co-processor insns.
 870         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 871         (getregliststring): Change function to use the above enum.
 872         (print_arg): Handle CO-Processor insns.
 873         (crx_cinvs): Add 'b' option to invalidate the branch-target
 874         cache.
 875
 876 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 877
 878         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 879         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 880         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 881         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 882         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 883
 884 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 885
 886         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 887         rather than add it.
 888
 889 2004-09-30  Paul Brook  <paul@codesourcery.com>
 890
 891         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 892         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 893
 894 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 895
 896         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 897         (CONFIG_STATUS_DEPENDENCIES): New.
 898         (Makefile): Removed.
 899         (config.status): Likewise.
 900         * Makefile.in: Regenerated.
 901
 902 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 903
 904         * Makefile.am: Run "make dep-am".
 905         * Makefile.in: Regenerate.
 906         * aclocal.m4: Regenerate.
 907         * configure: Regenerate.
 908         * po/POTFILES.in: Regenerate.
 909         * po/opcodes.pot: Regenerate.
 910
 911 2004-09-11  Andreas Schwab  <schwab@suse.de>
 912
 913         * configure: Rebuild.
 914
 915 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 916
 917         * ppc-opc.c (L): Make this field not optional.
 918
 919 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 920
 921         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 922         Fix parameter to 'm[t|f]csr' insns.
 923
 924 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 925
 926         * configure.in: Autoupdate to autoconf 2.59.
 927         * aclocal.m4: Rebuild with aclocal 1.4p6.
 928         * configure: Rebuild with autoconf 2.59.
 929         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 930         bfd changes for autoconf 2.59 on the way).
 931         * config.in: Rebuild with autoheader 2.59.
 932
 933 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 934
 935         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 936
 937 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 938
 939         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 940         (GRPPADLCK2): New define.
 941         (twobyte_has_modrm): True for 0xA6.
 942         (grps): GRPPADLCK2 for opcode 0xA6.
 943
 944 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 945
 946         Introduce SH2a support.
 947         * sh-opc.h (arch_sh2a_base): Renumber.
 948         (arch_sh2a_nofpu_base): Remove.
 949         (arch_sh_base_mask): Adjust.
 950         (arch_opann_mask): New.
 951         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 952         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 953         (sh_table): Adjust whitespace.
 954         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 955         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 956         instruction list throughout.
 957         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 958         of arch_sh2a in instruction list throughout.
 959         (arch_sh2e_up): Accomodate above changes.
 960         (arch_sh2_up): Ditto.
 961         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 962         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 963         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 964         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 965         * sh-opc.h (arch_sh2a_nofpu): New.
 966         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 967         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 968         instruction.
 969         2004-01-20  DJ Delorie  <dj@redhat.com>
 970         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 971         2003-12-29  DJ Delorie  <dj@redhat.com>
 972         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 973         sh_opcode_info, sh_table): Add sh2a support.
 974         (arch_op32): New, to tag 32-bit opcodes.
 975         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 976         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 977         * sh-opc.h (arch_sh2a): Add.
 978         * sh-dis.c (arch_sh2a): Handle.
 979         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 980
 981 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 982
 983         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 984
 985 2004-07-22  Nick Clifton  <nickc@redhat.com>
 986
 987         PR/280
 988         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 989         insns - this is done by objdump itself.
 990         * h8500-dis.c (print_insn_h8500): Likewise.
 991
 992 2004-07-21  Jan Beulich <jbeulich@novell.com>
 993
 994         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 995         regardless of address size prefix in effect.
 996         (ptr_reg): Size or address registers does not depend on rex64, but
 997         on the presence of an address size override.
 998         (OP_MMX): Use rex.x only for xmm registers.
 999         (OP_EM): Use rex.z only for xmm registers.
1000
1001 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1002
1003         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1004         move/branch operations to the bottom so that VR5400 multimedia
1005         instructions take precedence in disassembly.
1006
1007 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1008
1009         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1010         ISA-specific "break" encoding.
1011
1012 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1013
1014         * arm-opc.h: Fix typo in comment.
1015
1016 2004-07-11  Andreas Schwab  <schwab@suse.de>
1017
1018         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1019
1020 2004-07-09  Andreas Schwab  <schwab@suse.de>
1021
1022         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1023
1024 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1025
1026         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1027         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1028         (crx-dis.lo): New target.
1029         (crx-opc.lo): Likewise.
1030         * Makefile.in: Regenerate.
1031         * configure.in: Handle bfd_crx_arch.
1032         * configure: Regenerate.
1033         * crx-dis.c: New file.
1034         * crx-opc.c: New file.
1035         * disassemble.c (ARCH_crx): Define.
1036         (disassembler): Handle ARCH_crx.
1037
1038 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1039
1040         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1041         * ia64-asmtab.c: Regnerate.
1042
1043 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1044
1045         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1046         (extract_fxm): Don't test dialect.
1047         (XFXFXM_MASK): Include the power4 bit.
1048         (XFXM): Add p4 param.
1049         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1050
1051 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1052
1053         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1054         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1055
1056 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1057
1058         * ppc-opc.c (BH, XLBH_MASK): Define.
1059         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1060
1061 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1062
1063         * i386-dis.c (x_mode): Comment.
1064         (two_source_ops): File scope.
1065         (float_mem): Correct fisttpll and fistpll.
1066         (float_mem_mode): New table.
1067         (dofloat): Use it.
1068         (OP_E): Correct intel mode PTR output.
1069         (ptr_reg): Use open_char and close_char.
1070         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1071         operands.  Set two_source_ops.
1072
1073 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1074
1075         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1076         instead of _raw_size.
1077
1078 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1079
1080         * ia64-gen.c (in_iclass): Handle more postinc st
1081         and ld variants.
1082         * ia64-asmtab.c: Rebuilt.
1083
1084 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1085
1086         * s390-opc.txt: Correct architecture mask for some opcodes.
1087         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1088         in the esa mode as well.
1089
1090 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1091
1092         * sh-dis.c (target_arch): Make unsigned.
1093         (print_insn_sh): Replace (most of) switch with a call to
1094         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1095         * sh-opc.h: Redefine architecture flags values.
1096         Add sh3-nommu architecture.
1097         Reorganise <arch>_up macros so they make more visual sense.
1098         (SH_MERGE_ARCH_SET): Define new macro.
1099         (SH_VALID_BASE_ARCH_SET): Likewise.
1100         (SH_VALID_MMU_ARCH_SET): Likewise.
1101         (SH_VALID_CO_ARCH_SET): Likewise.
1102         (SH_VALID_ARCH_SET): Likewise.
1103         (SH_MERGE_ARCH_SET_VALID): Likewise.
1104         (SH_ARCH_SET_HAS_FPU): Likewise.
1105         (SH_ARCH_SET_HAS_DSP): Likewise.
1106         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1107         (sh_get_arch_from_bfd_mach): Add prototype.
1108         (sh_get_arch_up_from_bfd_mach): Likewise.
1109         (sh_get_bfd_mach_from_arch_set): Likewise.
1110         (sh_merge_bfd_arc): Likewise.
1111
1112 2004-05-24  Peter Barada  <peter@the-baradas.com>
1113
1114         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1115         into new match_insn_m68k function.  Loop over canidate
1116         matches and select first that completely matches.
1117         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1118         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1119         to verify addressing for MAC/EMAC.
1120         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1121         reigster halves since 'fpu' and 'spl' look misleading.
1122         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1123         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1124         first, tighten up match masks.
1125         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1126         'size' from special case code in print_insn_m68k to
1127         determine decode size of insns.
1128
1129 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1130
1131         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1132         well as when -mpower4.
1133
1134 2004-05-13  Nick Clifton  <nickc@redhat.com>
1135
1136         * po/fr.po: Updated French translation.
1137
1138 2004-05-05  Peter Barada  <peter@the-baradas.com>
1139
1140         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1141         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1142         * m68k-op.c: Switch from ColdFire chips to core variants.
1143
1144 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1145
1146         PR 147.
1147         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1148
1149 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1150
1151         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1152         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1153
1154 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1155
1156         * sh-dis.c (print_insn_sh): Print the value in constant pool
1157         as a symbol if it looks like a symbol.
1158
1159 2004-04-22  Peter Barada <peter@the-baradas.com>
1160
1161         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1162         appropriate ColdFire architectures.
1163         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1164         mask addressing.
1165         Add EMAC instructions, fix MAC instructions. Remove
1166         macmw/macml/msacmw/msacml instructions since mask addressing now
1167         supported.
1168
1169 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1170
1171         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1172         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1173         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1174         macro.  Adjust all users.
1175
1176 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1177
1178         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1179         separately.
1180
1181 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1182
1183         * m32r-asm.c: Regenerate.
1184
1185 2004-03-29  Stan Shebs  <shebs@apple.com>
1186
1187         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1188         used.
1189
1190 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1191
1192         * aclocal.m4: Regenerate.
1193         * config.in: Regenerate.
1194         * configure: Regenerate.
1195         * po/POTFILES.in: Regenerate.
1196         * po/opcodes.pot: Regenerate.
1197
1198 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1199
1200         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1201         PPC_OPERANDS_GPR_0.
1202         * ppc-opc.c (RA0): Define.
1203         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1204         (RAOPT): Rename from RAO.  Update all uses.
1205         (powerpc_opcodes): Use RA0 as appropriate.
1206
1207 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1208
1209         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1210
1211 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1212
1213         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1214
1215 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1216
1217         * i386-dis.c (GRPPLOCK): Delete.
1218         (grps): Delete GRPPLOCK entry.
1219
1220 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1221
1222         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1223         (M, Mp): Use OP_M.
1224         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1225         (GRPPADLCK): Define.
1226         (dis386): Use NOP_Fixup on "nop".
1227         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1228         (twobyte_has_modrm): Set for 0xa7.
1229         (padlock_table): Delete.  Move to..
1230         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1231         and clflush.
1232         (print_insn): Revert PADLOCK_SPECIAL code.
1233         (OP_E): Delete sfence, lfence, mfence checks.
1234
1235 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1236
1237         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1238         (INVLPG_Fixup): New function.
1239         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1240
1241 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1242
1243         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1244         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1245         (padlock_table): New struct with PadLock instructions.
1246         (print_insn): Handle PADLOCK_SPECIAL.
1247
1248 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1249
1250         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1251         (OP_E): Twiddle clflush to sfence here.
1252
1253 2004-03-08  Nick Clifton  <nickc@redhat.com>
1254
1255         * po/de.po: Updated German translation.
1256
1257 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1258
1259         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1260         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1261         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1262         accordingly.
1263
1264 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1265
1266         * frv-asm.c: Regenerate.
1267         * frv-desc.c: Regenerate.
1268         * frv-desc.h: Regenerate.
1269         * frv-dis.c: Regenerate.
1270         * frv-ibld.c: Regenerate.
1271         * frv-opc.c: Regenerate.
1272         * frv-opc.h: Regenerate.
1273
1274 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1275
1276         * frv-desc.c, frv-opc.c: Regenerate.
1277
1278 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1279
1280         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1281
1282 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1283
1284         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1285         Also correct mistake in the comment.
1286
1287 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1288
1289         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1290         ensure that double registers have even numbers.
1291         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1292         that reserved instruction 0xfffd does not decode the same
1293         as 0xfdfd (ftrv).
1294         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1295         REG_N refers to a double register.
1296         Add REG_N_B01 nibble type and use it instead of REG_NM
1297         in ftrv.
1298         Adjust the bit patterns in a few comments.
1299
1300 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1301
1302         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1303
1304 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1305
1306         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1307
1308 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1309
1310         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1311
1312 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1313
1314         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1315         mtivor32, mtivor33, mtivor34.
1316
1317 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1318
1319         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1320
1321 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1322
1323         * arm-opc.h Maverick accumulator register opcode fixes.
1324
1325 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1326
1327         * m32r-dis.c: Regenerate.
1328
1329 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1330
1331         * sh-opc.h (sh_table): "fsrra", not "fssra".
1332
1333 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1334
1335         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1336         contraints.
1337
1338 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1339
1340         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1341
1342 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1343
1344         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1345         1.  Don't print scale factor on AT&T mode when index missing.
1346
1347 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1348
1349         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1350         when loaded into XR registers.
1351
1352 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1353
1354         * frv-desc.h: Regenerate.
1355         * frv-desc.c: Regenerate.
1356         * frv-opc.c: Regenerate.
1357
1358 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1359
1360         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1361
1362 2004-01-09  Paul Brook  <paul@codesourcery.com>
1363
1364         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1365         specific opcodes.
1366
1367 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1368
1369         * Makefile.am (libopcodes_la_DEPENDENCIES)
1370         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1371         comment about the problem.
1372         * Makefile.in: Regenerate.
1373
1374 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1375
1376         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1377         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1378         cut&paste errors in shifting/truncating numerical operands.
1379         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1380         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1381         (parse_uslo16): Likewise.
1382         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1383         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1384         (parse_s12): Likewise.
1385         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1386         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1387         (parse_uslo16): Likewise.
1388         (parse_uhi16): Parse gothi and gotfuncdeschi.
1389         (parse_d12): Parse got12 and gotfuncdesc12.
1390         (parse_s12): Likewise.
1391
1392 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1393
1394         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1395         instruction which looks similar to an 'rla' instruction.
1396
1397 For older changes see ChangeLog-0203
1398 \f
1399 Local Variables:
1400 mode: change-log
1401 left-margin: 8
1402 fill-column: 74
1403 version-control: never
1404 End: