opcodes/ChangeLog

   1 2010-10-11  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
   2
   3         * s390-opc.c: Make the instruction masks for the load/store on
   4         condition instructions to cover the condition code mask as well.
   5         * s390-opc.txt: lgoc -> locg and stgoc -> stocg.
   6
   7 2010-10-11  Jan Kratochvil  <jan.kratochvil@redhat.com>
   8             Jiang Jilin  <freephp@gmail.com>
   9
  10         * Makefile.am (libopcodes_a_SOURCES): New as empty.
  11         * Makefile.in: Regenerate.
  12
  13 2010-10-09  Matt Rice  <ratmice@gmail.com>
  14
  15         * fr30-desc.h: Regenerate.
  16         * frv-desc.h: Regenerate.
  17         * ip2k-desc.h: Regenerate.
  18         * iq2000-desc.h: Regenerate.
  19         * lm32-desc.h: Regenerate.
  20         * m32c-desc.h: Regenerate.
  21         * m32r-desc.h: Regenerate.
  22         * mep-desc.h: Regenerate.
  23         * mep-opc.c: Regenerate.
  24         * mt-desc.h: Regenerate.
  25         * openrisc-desc.h: Regenerate.
  26         * xc16x-desc.h: Regenerate.
  27         * xstormy16-desc.h: Regenerate.
  28
  29 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
  30
  31         Fix build with -DDEBUG=7
  32         * frv-opc.c: Regenerate.
  33         * or32-dis.c (DEBUG): Don't redefine.
  34         (find_bytes_big, or32_extract, or32_opcode_match, or32_print_register):
  35         Adapt DEBUG code to some type changes throughout.
  36         * or32-opc.c (or32_extract): Likewise.
  37
  38 2010-10-07  Bernd Schmidt  <bernds@codesourcery.com>
  39
  40         * tic6x-dis.c (print_insn_tic6x): Correct decoding of fstg field
  41         in SPKERNEL instructions.
  42
  43 2010-10-02  H.J. Lu  <hongjiu.lu@intel.com>
  44
  45         PR binutils/12076
  46         * i386-dis.c (RMAL): Remove duplicate.
  47
  48 2010-09-30  Pierre Muller  <muller@ics.u-strasbg.fr>
  49
  50         * s390-mkopc.c (main): Exit with error 1 if sscanf fails
  51         to parse all 6 parameters.
  52
  53 2010-09-28  Pierre Muller  <muller@ics.u-strasbg.fr>
  54
  55         * s390-mkopc.c (main): Change description array size to 80.
  56         Add maximum length of 79 to description parsing.
  57
  58 2010-09-27  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  59
  60         * configure: Regenerate.
  61
  62 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  63
  64         * s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
  65         (main): Recognize the new CPU string.
  66         * s390-opc.c: Add new instruction formats and masks.
  67         * s390-opc.txt: Add new z196 instructions.
  68
  69 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  70
  71         * s390-dis.c (print_insn_s390): Pick instruction with most
  72         specific mask.
  73         * s390-opc.c: Add unused bits to the insn mask.
  74         * s390-opc.txt: Reorder some instructions to prefer more recent
  75         versions.
  76
  77 2010-09-27  Tejas Belagod  <tejas.belagod@arm.com>
  78
  79         * arm_dis.c (print_insn_coprocessor): Apply off-by-alignment
  80         correction to unaligned PCs while printing comment.
  81
  82 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  83
  84         * arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
  85         (thumb32_opcodes): Likewise.
  86         (banked_regname): New function.
  87         (print_insn_arm): Add Virtualization Extensions support.
  88         (print_insn_thumb32): Likewise.
  89
  90 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  91
  92         * arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
  93         ARM state.
  94
  95 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  96
  97         * arm-dis.c (arm_opcodes): SMC implies Security Extensions.
  98         (thumb32_opcodes): Likewise.
  99
 100 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 101
 102         * arm-dis.c (arm_opcodes): Add support for pldw.
 103         (thumb32_opcodes): Likewise.
 104
 105 2010-09-22  Robin Getz  <robin.getz@analog.com>
 106
 107         * bfin-dis.c (fmtconst): Cast address to 32bits.
 108
 109 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 110
 111         * bfin-dis.c (decode_REGMV_0): Rewrite valid combo checks.
 112
 113 2010-09-22  Robin Getz  <robin.getz@analog.com>
 114
 115         * bfin-dis.c (decode_ProgCtrl_0): Check for parallel insns.
 116         Reject P6/P7 to TESTSET.
 117         (decode_PushPopReg_0): Check for parallel insns.  Reject pushing
 118         SP onto the stack.
 119         (decode_PushPopMultiple_0): Check for parallel insns.  Make sure
 120         P/D fields match all the time.
 121         (decode_CCflag_0): Check for parallel insns.  Verify x/y fields
 122         are 0 for accumulator compares.
 123         (decode_CC2stat_0): Check for parallel insns.  Reject CC<op>CC.
 124         (decode_CaCTRL_0, decode_ccMV_0, decode_CC2dreg_0, decode_BRCC_0,
 125         decode_UJUMP_0, decode_LOGI2op_0, decode_COMPI2opD_0,
 126         decode_COMPI2opP_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
 127         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
 128         decode_pseudoOChar_0, decode_pseudodbg_assert_0): Check for parallel
 129         insns.
 130         (decode_dagMODim_0): Verify br field for IREG ops.
 131         (decode_LDST_0): Reject preg load into same preg.
 132         (_print_insn_bfin): Handle returns for ILLEGAL decodes.
 133         (print_insn_bfin): Likewise.
 134
 135 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 136
 137         * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
 138
 139 2010-09-22  Robin Getz  <robin.getz@analog.com>
 140
 141         * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
 142
 143 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 144
 145         * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
 146
 147 2010-09-22  Robin Getz  <robin.getz@analog.com>
 148
 149         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
 150         register values greater than 8.
 151         (IS_RESERVEDREG, allreg, mostreg): New helpers.
 152         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
 153         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
 154         (decode_CC2dreg_0): Check valid CC register number.
 155
 156 2010-09-22  Robin Getz  <robin.getz@analog.com>
 157
 158         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
 159
 160 2010-09-22  Robin Getz  <robin.getz@analog.com>
 161
 162         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
 163         (reg_names): Likewise.
 164         (decode_statbits): Likewise; while reformatting to make manageable.
 165
 166 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 167
 168         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
 169         (decode_pseudoOChar_0): New function.
 170         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
 171
 172 2010-09-22  Robin Getz  <robin.getz@analog.com>
 173
 174         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
 175         LSHIFT instead of SHIFT.
 176
 177 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 178
 179         * bfin-dis.c (constant_formats): Constify the whole structure.
 180         (fmtconst): Add const to return value.
 181         (reg_names): Mark const.
 182         (decode_multfunc): Mark s0/s1 as const.
 183         (decode_macfunc): Mark a/sop as const.
 184
 185 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
 186
 187         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
 188
 189 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
 190
 191         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
 192         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
 193
 194 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
 195
 196         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
 197         dlx_insn_type array.
 198
 199 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
 200
 201         PR binutils/11960
 202         * i386-dis.c (sIv): New.
 203         (dis386): Replace Iq with sIv on "pushT".
 204         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
 205         (x86_64_table): Replace {T|}/{P|} with P.
 206         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
 207         (OP_sI): Update v_mode.  Remove w_mode.
 208
 209 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
 210
 211         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
 212         on E500 and E500MC.
 213
 214 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
 215
 216         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
 217         prefetchw.
 218
 219 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 220
 221         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
 222         to processor flags for PENTIUMPRO processors and later.
 223         * i386-opc.h (enum): Add CpuNop.
 224         (i386_cpu_flags): Add cpunop bit.
 225         * i386-opc.tbl: Change nop cpu_flags.
 226         * i386-init.h: Regenerated.
 227         * i386-tbl.h: Likewise.
 228
 229 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 230
 231         * i386-opc.h (enum): Fix typos in comments.
 232
 233 2010-08-06  Alan Modra  <amodra@gmail.com>
 234
 235         * disassemble.c: Formatting.
 236         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
 237
 238 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 239
 240         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
 241         * i386-tbl.h: Regenerated.
 242
 243 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 244
 245         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 246
 247         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 248         * i386-tbl.h: Regenerated.
 249
 250 2010-07-29  DJ Delorie  <dj@redhat.com>
 251
 252         * rx-decode.opc (SRR): New.
 253         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 254         r0,r0) and NOP3 (max r0,r0) special cases.
 255         * rx-decode.c: Regenerate.
 256
 257 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 258
 259         * i386-dis.c: Add 0F to VEX opcode enums.
 260
 261 2010-07-27  DJ Delorie  <dj@redhat.com>
 262
 263         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 264         (rx_decode_opcode): Likewise.
 265         * rx-decode.c: Regenerate.
 266
 267 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 268             Ina Pandit  <ina.pandit@kpitcummins.com>
 269
 270         * v850-dis.c (v850_sreg_names): Updated structure for system
 271         registers.
 272         (float_cc_names): new structure for condition codes.
 273         (print_value): Update the function that prints value.
 274         (get_operand_value): New function to get the operand value.
 275         (disassemble): Updated to handle the disassembly of instructions.
 276         (print_insn_v850): Updated function to print instruction for different
 277         families.
 278         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 279         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 280         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 281         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 282         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 283         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 284         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 285         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 286         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 287         (v850_operands): Update with the relocation name. Also update
 288         the instructions with specific set of processors.
 289
 290 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 291
 292         * arm-dis.c (print_insn_arm): Add cases for printing more
 293         symbolic operands.
 294         (print_insn_thumb32): Likewise.
 295
 296 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 297
 298         * mips-dis.c (print_insn_mips): Correct branch instruction type
 299         determination.
 300
 301 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 302
 303         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 304         type and delay slot determination.
 305         (print_insn_mips16): Extend branch instruction type and delay
 306         slot determination to cover all instructions.
 307         * mips16-opc.c (BR): Remove macro.
 308         (UBR, CBR): New macros.
 309         (mips16_opcodes): Update branch annotation for "b", "beqz",
 310         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 311         and "jrc".
 312
 313 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 314
 315         AVX Programming Reference (June, 2010)
 316         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 317         * i386-opc.tbl: Likewise.
 318         * i386-tbl.h: Regenerated.
 319
 320 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 321
 322         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 323
 324 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 325
 326         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 327         ppc_cpu_t before inverting.
 328         (ppc_parse_cpu): Likewise.
 329         (print_insn_powerpc): Likewise.
 330
 331 2010-07-03  Alan Modra  <amodra@gmail.com>
 332
 333         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 334         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 335         (PPC64, MFDEC2): Update.
 336         (NON32, NO371): Define.
 337         (powerpc_opcode): Update to not use old opcode flags, and avoid
 338         -m601 duplicates.
 339
 340 2010-07-03  DJ Delorie  <dj@delorie.com>
 341
 342         * m32c-ibld.c: Regenerate.
 343
 344 2010-07-03  Alan Modra  <amodra@gmail.com>
 345
 346         * ppc-opc.c (PWR2COM): Define.
 347         (PPCPWR2): Add PPC_OPCODE_COMMON.
 348         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 349         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 350         "rac" from -mcom.
 351
 352 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 353
 354         AVX Programming Reference (June, 2010)
 355         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 356         (PREFIX_0FAE_REG_1): Likewise.
 357         (PREFIX_0FAE_REG_2): Likewise.
 358         (PREFIX_0FAE_REG_3): Likewise.
 359         (PREFIX_VEX_3813): Likewise.
 360         (PREFIX_VEX_3A1D): Likewise.
 361         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 362         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 363         PREFIX_VEX_3A1D.
 364         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 365         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 366         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 367
 368         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 369         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 370         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 371
 372         * i386-opc.h (CpuXsaveopt): New.
 373         (CpuFSGSBase): Likewise.
 374         (CpuRdRnd): Likewise.
 375         (CpuF16C): Likewise.
 376         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 377         cpuf16c.
 378
 379         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 380         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 381         * i386-init.h: Regenerated.
 382         * i386-tbl.h: Likewise.
 383
 384 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 385
 386         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 387         and mtocrf on EFS.
 388
 389 2010-06-29  Alan Modra  <amodra@gmail.com>
 390
 391         * maxq-dis.c: Delete file.
 392         * Makefile.am: Remove references to maxq.
 393         * configure.in: Likewise.
 394         * disassemble.c: Likewise.
 395         * Makefile.in: Regenerate.
 396         * configure: Regenerate.
 397         * po/POTFILES.in: Regenerate.
 398
 399 2010-06-29  Alan Modra  <amodra@gmail.com>
 400
 401         * mep-dis.c: Regenerate.
 402
 403 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 404
 405         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 406
 407 2010-06-27  Alan Modra  <amodra@gmail.com>
 408
 409         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 410         (decodeInstr): Likewise.
 411         * dlx-dis.c (print_insn_dlx): Likewise.
 412         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 413         * maxq-dis.c (check_move, print_insn): Likewise.
 414         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 415         * msp430-dis.c (msp430_branchinstr): Likewise.
 416         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 417         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 418         * sparc-dis.c (print_insn_sparc): Likewise.
 419         * fr30-asm.c: Regenerate.
 420         * frv-asm.c: Regenerate.
 421         * ip2k-asm.c: Regenerate.
 422         * iq2000-asm.c: Regenerate.
 423         * lm32-asm.c: Regenerate.
 424         * m32c-asm.c: Regenerate.
 425         * m32r-asm.c: Regenerate.
 426         * mep-asm.c: Regenerate.
 427         * mt-asm.c: Regenerate.
 428         * openrisc-asm.c: Regenerate.
 429         * xc16x-asm.c: Regenerate.
 430         * xstormy16-asm.c: Regenerate.
 431
 432 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 433
 434         PR gas/11673
 435         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 436
 437 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 438
 439         PR binutils/11676
 440         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 441
 442 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 443
 444         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 445         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 446         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 447         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 448         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 449         Treat lwsync as msync on e500.
 450
 451 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 452
 453         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 454
 455 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 456
 457         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 458         constants is the same on 32-bit and 64-bit hosts.
 459
 460 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 461
 462         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 463         .short directives so that they can be reassembled.
 464
 465 2010-05-26  Catherine Moore <clm@codesourcery.com>
 466             David Ung  <davidu@mips.com>
 467
 468         * mips-opc.c: Change membership to I1 for instructions ssnop and
 469         ehb.
 470
 471 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 472
 473         * i386-dis.c (sib): New.
 474         (get_sib): Likewise.
 475         (print_insn): Call get_sib.
 476         OP_E_memory): Use sib.
 477
 478 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 479
 480         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 481         * mips-opc.c (I16): Remove.
 482         (mips_builtin_op): Reclassify jalx.
 483
 484 2010-05-19  Alan Modra  <amodra@gmail.com>
 485
 486         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 487         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 488
 489 2010-05-13  Alan Modra  <amodra@gmail.com>
 490
 491         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 492
 493 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 494
 495         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 496         format.
 497         (print_insn_thumb16): Add support for new %W format.
 498
 499 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 500
 501         * Makefile.in: Regenerate with automake 1.11.1.
 502         * aclocal.m4: Ditto.
 503
 504 2010-05-05  Nick Clifton  <nickc@redhat.com>
 505
 506         * po/es.po: Updated Spanish translation.
 507
 508 2010-04-22  Nick Clifton  <nickc@redhat.com>
 509
 510         * po/opcodes.pot: Updated by the Translation project.
 511         * po/vi.po: Updated Vietnamese translation.
 512
 513 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 514
 515         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 516         bits in opcode.
 517
 518 2010-04-09  Nick Clifton  <nickc@redhat.com>
 519
 520         * i386-dis.c (print_insn): Remove unused variable op.
 521         (OP_sI): Remove unused variable mask.
 522
 523 2010-04-07  Alan Modra  <amodra@gmail.com>
 524
 525         * configure: Regenerate.
 526
 527 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 528
 529         * ppc-opc.c (RBOPT): New define.
 530         ("dccci"): Enable for PPCA2.  Make operands optional.
 531         ("iccci"): Likewise.  Do not deprecate for PPC476.
 532
 533 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 534
 535         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 536
 537 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 538
 539         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 540         * Makefile.in: Regenerate.
 541         * configure.in (bfd_tic6x_arch): New.
 542         * configure: Regenerate.
 543         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 544         (disassembler): Handle TI C6X.
 545         * tic6x-dis.c: New.
 546
 547 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 548
 549         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 550
 551 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 552
 553         * dis-buf.c (buffer_read_memory): Give error for reading just
 554         before the start of memory.
 555
 556 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 557             Quentin Neill <quentin.neill@amd.com>
 558
 559         * i386-dis.c (OP_LWP_I): Removed.
 560         (reg_table): Do not use OP_LWP_I, use Iq.
 561         (OP_LWPCB_E): Remove use of names16.
 562         (OP_LWP_E): Same.
 563         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 564         should not set the Vex.length bit.
 565         * i386-tbl.h: Regenerated.
 566
 567 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 568
 569         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 570
 571 2010-02-24  Nick Clifton  <nickc@redhat.com>
 572
 573         PR binutils/6773
 574         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 575         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 576         (thumb32_opcodes): Likewise.
 577
 578 2010-02-15  Nick Clifton  <nickc@redhat.com>
 579
 580         * po/vi.po: Updated Vietnamese translation.
 581
 582 2010-02-12  Doug Evans  <dje@sebabeach.org>
 583
 584         * lm32-opinst.c: Regenerate.
 585
 586 2010-02-11  Doug Evans  <dje@sebabeach.org>
 587
 588         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 589         (print_address): Delete CGEN_PRINT_ADDRESS.
 590         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 591         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 592         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 593         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 594
 595         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 596         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 597         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 598         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 599         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 600         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 601         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 602         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 603         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 604         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 605         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 606         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 607
 608 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 609
 610         * i386-dis.c: Update copyright.
 611         * i386-gen.c: Likewise.
 612         * i386-opc.h: Likewise.
 613         * i386-opc.tbl: Likewise.
 614
 615 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 616             Sebastian Pop  <sebastian.pop@amd.com>
 617
 618         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 619         function to handle 5th imm8 operand.
 620         (PREFIX_VEX_3A48): Added.
 621         (PREFIX_VEX_3A49): Added.
 622         (VEX_W_3A48_P_2): Added.
 623         (VEX_W_3A49_P_2): Added.
 624         (prefix table): Added entries for PREFIX_VEX_3A48
 625         and PREFIX_VEX_3A49.
 626         (vex table): Added entries for VEX_W_3A48_P_2 and
 627         and VEX_W_3A49_P_2.
 628         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 629         for Vec_Imm4 operands.
 630         * i386-opc.h (enum): Added Vec_Imm4.
 631         (i386_operand_type): Added vec_imm4.
 632         * i386-opc.tbl: Add entries for vpermilp[ds].
 633         * i386-init.h: Regenerated.
 634         * i386-tbl.h: Regenerated.
 635
 636 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 637
 638         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 639         and "pwr7".  Move "a2" into alphabetical order.
 640
 641 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 642
 643         * ppc-dis.c (ppc_opts): Add titan entry.
 644         * ppc-opc.c (TITAN, MULHW): Define.
 645         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 646
 647 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 648
 649         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 650         to CPU_BDVER1_FLAGS
 651         * i386-init.h: Regenerated.
 652
 653 2010-02-03  Anthony Green  <green@moxielogic.com>
 654
 655         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 656         0x0f, and make 0x00 an illegal instruction.
 657
 658 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 659
 660         * opcodes/arm-dis.c (struct arm_private_data): New.
 661         (print_insn_coprocessor, print_insn_arm): Update to use struct
 662         arm_private_data.
 663         (is_mapping_symbol, get_map_sym_type): New functions.
 664         (get_sym_code_type): Check the symbol's section.  Do not check
 665         mapping symbols.
 666         (print_insn): Default to disassembling ARM mode code.  Check
 667         for mapping symbols separately from other symbols.  Use
 668         struct arm_private_data.
 669
 670 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 671
 672         * i386-dis.c (EXVexWdqScalar): New.
 673         (vex_scalar_w_dq_mode): Likewise.
 674         (prefix_table): Update entries for PREFIX_VEX_3899,
 675         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 676         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 677         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 678         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 679         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 680         (OP_EX): Likewise.
 681
 682 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 683
 684         * i386-dis.c (XMScalar): New.
 685         (EXdScalar): Likewise.
 686         (EXqScalar): Likewise.
 687         (EXqScalarS): Likewise.
 688         (VexScalar): Likewise.
 689         (EXdVexScalarS): Likewise.
 690         (EXqVexScalarS): Likewise.
 691         (XMVexScalar): Likewise.
 692         (scalar_mode): Likewise.
 693         (d_scalar_mode): Likewise.
 694         (d_scalar_swap_mode): Likewise.
 695         (q_scalar_mode): Likewise.
 696         (q_scalar_swap_mode): Likewise.
 697         (vex_scalar_mode): Likewise.
 698         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 699         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 700         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 701         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 702         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 703         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 704         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 705         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 706         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 707         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 708         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 709         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 710         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 711         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 712         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 713         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 714         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 715         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 716         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 717         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 718         q_scalar_mode, q_scalar_swap_mode.
 719         (OP_XMM): Handle scalar_mode.
 720         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 721         and q_scalar_swap_mode.
 722         (OP_VEX): Handle vex_scalar_mode.
 723
 724 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 725
 726         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 727
 728 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 729
 730         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 731
 732 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 733
 734         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 735
 736 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 737
 738         * i386-dis.c (Bad_Opcode): New.
 739         (bad_opcode): Likewise.
 740         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 741         (dis386_twobyte): Likewise.
 742         (reg_table): Likewise.
 743         (prefix_table): Likewise.
 744         (x86_64_table): Likewise.
 745         (vex_len_table): Likewise.
 746         (vex_w_table): Likewise.
 747         (mod_table): Likewise.
 748         (rm_table): Likewise.
 749         (float_reg): Likewise.
 750         (reg_table): Remove trailing "(bad)" entries.
 751         (prefix_table): Likewise.
 752         (x86_64_table): Likewise.
 753         (vex_len_table): Likewise.
 754         (vex_w_table): Likewise.
 755         (mod_table): Likewise.
 756         (rm_table): Likewise.
 757         (get_valid_dis386): Handle bytemode 0.
 758
 759 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 760
 761         * i386-opc.h (VEXScalar): New.
 762
 763         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 764         instructions.
 765         * i386-tbl.h: Regenerated.
 766
 767 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 768
 769         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 770
 771         * i386-opc.tbl: Add xsave64 and xrstor64.
 772         * i386-tbl.h: Regenerated.
 773
 774 2010-01-20  Nick Clifton  <nickc@redhat.com>
 775
 776         PR 11170
 777         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 778         based post-indexed addressing.
 779
 780 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 781
 782         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 783         * i386-tbl.h: Regenerated.
 784
 785 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 786
 787         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 788         comments.
 789
 790 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 791
 792         * i386-dis.c (names_mm): New.
 793         (intel_names_mm): Likewise.
 794         (att_names_mm): Likewise.
 795         (names_xmm): Likewise.
 796         (intel_names_xmm): Likewise.
 797         (att_names_xmm): Likewise.
 798         (names_ymm): Likewise.
 799         (intel_names_ymm): Likewise.
 800         (att_names_ymm): Likewise.
 801         (print_insn): Set names_mm, names_xmm and names_ymm.
 802         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 803         (OP_XMM): Likewise.
 804         (OP_EM): Likewise.
 805         (OP_EMC): Likewise.
 806         (OP_MXC): Likewise.
 807         (OP_EX): Likewise.
 808         (XMM_Fixup): Likewise.
 809         (OP_VEX): Likewise.
 810         (OP_EX_VexReg): Likewise.
 811         (OP_Vex_2src): Likewise.
 812         (OP_Vex_2src_1): Likewise.
 813         (OP_Vex_2src_2): Likewise.
 814         (OP_REG_VexI4): Likewise.
 815
 816 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 817
 818         * i386-dis.c (print_insn): Update comments.
 819
 820 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 821
 822         * i386-dis.c (rex_original): Removed.
 823         (ckprefix): Remove rex_original.
 824         (print_insn): Update comments.
 825
 826 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 827
 828         * Makefile.in: Regenerate.
 829         * configure: Regenerate.
 830
 831 2010-01-07  Doug Evans  <dje@sebabeach.org>
 832
 833         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 834         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 835         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 836         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 837         * xstormy16-ibld.c: Regenerate.
 838
 839 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 840
 841         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 842         * i386-init.h: Regenerated.
 843
 844 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 845
 846         * arm-dis.c (print_insn): Fixed search for next symbol and data
 847         dumping condition, and the initial mapping symbol state.
 848
 849 2010-01-05  Doug Evans  <dje@sebabeach.org>
 850
 851         * cgen-ibld.in: #include "cgen/basic-modes.h".
 852         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 853         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 854         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 855         * xstormy16-ibld.c: Regenerate.
 856
 857 2010-01-04  Nick Clifton  <nickc@redhat.com>
 858
 859         PR 11123
 860         * arm-dis.c (print_insn_coprocessor): Initialise value.
 861
 862 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 863
 864         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 865
 866 2010-01-02  Doug Evans  <dje@sebabeach.org>
 867
 868         * cgen-asm.in: Update copyright year.
 869         * cgen-dis.in: Update copyright year.
 870         * cgen-ibld.in: Update copyright year.
 871         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 872         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 873         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 874         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 875         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 876         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 877         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 878         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 879         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 880         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 881         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 882         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 883         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 884         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 885         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 886         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 887         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 888         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 889         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 890         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 891         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 892
 893 For older changes see ChangeLog-2009
 894 \f
 895 Local Variables:
 896 mode: change-log
 897 left-margin: 8
 898 fill-column: 74
 899 version-control: never
 900 End: