1 2018-03-03 Alan Modra <amodra@gmail.com>
3 * sysdep.h (opcodes_error_handler): Define.
4 (_bfd_error_handler): Declare.
5 * Makefile.am: Remove stray #.
6 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
8 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
9 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
10 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
11 opcodes_error_handler to print errors. Standardize error messages.
12 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
14 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
15 * i386-gen.c: Standardize error messages.
16 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
17 * Makefile.in: Regenerate.
18 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
19 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
20 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
21 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
22 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
23 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
24 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
25 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
26 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
27 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
28 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
29 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
30 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
32 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
34 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
35 vpsub[bwdq] instructions.
36 * i386-tbl.h: Regenerated.
38 2018-03-01 Alan Modra <amodra@gmail.com>
40 * configure.ac (ALL_LINGUAS): Sort.
41 * configure: Regenerate.
43 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
45 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
46 macro by assignements.
48 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
51 * i386-gen.c (opcode_modifiers): Add Optimize.
52 * i386-opc.h (Optimize): New enum.
53 (i386_opcode_modifier): Add optimize.
54 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
55 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
56 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
57 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
58 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
60 * i386-tbl.h: Regenerated.
62 2018-02-26 Alan Modra <amodra@gmail.com>
64 * crx-dis.c (getregliststring): Allocate a large enough buffer
65 to silence false positive gcc8 warning.
67 2018-02-22 Shea Levy <shea@shealevy.com>
69 * disassemble.c (ARCH_riscv): Define if ARCH_all.
71 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
73 * i386-opc.tbl: Add {rex},
74 * i386-tbl.h: Regenerated.
76 2018-02-20 Maciej W. Rozycki <macro@mips.com>
78 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
79 (mips16_opcodes): Replace `M' with `m' for "restore".
81 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
83 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
85 2018-02-13 Maciej W. Rozycki <macro@mips.com>
87 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
88 variable to `function_index'.
90 2018-02-13 Nick Clifton <nickc@redhat.com>
93 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
94 about truncation of printing.
96 2018-02-12 Henry Wong <henry@stuffedcow.net>
98 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
100 2018-02-05 Nick Clifton <nickc@redhat.com>
102 * po/pt_BR.po: Updated Brazilian Portuguese translation.
104 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
106 * i386-dis.c (enum): Add pconfig.
107 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
108 (cpu_flags): Add CpuPCONFIG.
109 * i386-opc.h (enum): Add CpuPCONFIG.
110 (i386_cpu_flags): Add cpupconfig.
111 * i386-opc.tbl: Add PCONFIG instruction.
112 * i386-init.h: Regenerate.
113 * i386-tbl.h: Likewise.
115 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
117 * i386-dis.c (enum): Add PREFIX_0F09.
118 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
119 (cpu_flags): Add CpuWBNOINVD.
120 * i386-opc.h (enum): Add CpuWBNOINVD.
121 (i386_cpu_flags): Add cpuwbnoinvd.
122 * i386-opc.tbl: Add WBNOINVD instruction.
123 * i386-init.h: Regenerate.
124 * i386-tbl.h: Likewise.
126 2018-01-17 Jim Wilson <jimw@sifive.com>
128 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
130 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
132 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
133 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
134 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
135 (cpu_flags): Add CpuIBT, CpuSHSTK.
136 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
137 (i386_cpu_flags): Add cpuibt, cpushstk.
138 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
139 * i386-init.h: Regenerate.
140 * i386-tbl.h: Likewise.
142 2018-01-16 Nick Clifton <nickc@redhat.com>
144 * po/pt_BR.po: Updated Brazilian Portugese translation.
145 * po/de.po: Updated German translation.
147 2018-01-15 Jim Wilson <jimw@sifive.com>
149 * riscv-opc.c (match_c_nop): New.
150 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
152 2018-01-15 Nick Clifton <nickc@redhat.com>
154 * po/uk.po: Updated Ukranian translation.
156 2018-01-13 Nick Clifton <nickc@redhat.com>
158 * po/opcodes.pot: Regenerated.
160 2018-01-13 Nick Clifton <nickc@redhat.com>
162 * configure: Regenerate.
164 2018-01-13 Nick Clifton <nickc@redhat.com>
168 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
170 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
171 * i386-tbl.h: Regenerate.
173 2018-01-10 Jan Beulich <jbeulich@suse.com>
175 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
176 * i386-tbl.h: Re-generate.
178 2018-01-10 Jan Beulich <jbeulich@suse.com>
180 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
181 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
182 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
183 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
184 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
185 Disp8MemShift of AVX512VL forms.
186 * i386-tbl.h: Re-generate.
188 2018-01-09 Jim Wilson <jimw@sifive.com>
190 * riscv-dis.c (maybe_print_address): If base_reg is zero,
191 then the hi_addr value is zero.
193 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
195 * arm-dis.c (arm_opcodes): Add csdb.
196 (thumb32_opcodes): Add csdb.
198 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
200 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
201 * aarch64-asm-2.c: Regenerate.
202 * aarch64-dis-2.c: Regenerate.
203 * aarch64-opc-2.c: Regenerate.
205 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
208 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
209 Remove AVX512 vmovd with 64-bit operands.
210 * i386-tbl.h: Regenerated.
212 2018-01-05 Jim Wilson <jimw@sifive.com>
214 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
217 2018-01-03 Alan Modra <amodra@gmail.com>
219 Update year range in copyright notice of all files.
221 2018-01-02 Jan Beulich <jbeulich@suse.com>
223 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
224 and OPERAND_TYPE_REGZMM entries.
226 For older changes see ChangeLog-2017
228 Copyright (C) 2018 Free Software Foundation, Inc.
230 Copying and distribution of this file, with or without modification,
231 are permitted in any medium without royalty provided the copyright
232 notice and this notice are preserved.
238 version-control: never