1 2014-08-21 Maciej W. Rozycki <macro@codesourcery.com>
3 * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out
6 2014-08-19 Andreas Arnez <arnez@linux.vnet.ibm.com>
8 * s390-dis.c (s390_insn_length, s390_insn_matches_opcode)
9 (s390_print_insn_with_opcode, opcode_mask_more_specific): New
10 static functions, code was moved from...
11 (print_insn_s390): ...here.
12 (s390_extract_operand): Adjust comment. Change type of first
13 parameter from 'unsigned char *' to 'const bfd_byte *'.
14 (union operand_value): New.
15 (s390_extract_operand): Change return type to union operand_value.
16 Also avoid integer overflow in sign-extension.
17 (s390_print_insn_with_opcode): Adjust to changed return value from
18 s390_extract_operand(). Change "%i" printf format to "%u" for
20 (init_disasm): Simplify initialization of opc_index[]. This also
21 fixes an access after the last element of s390_opcodes[].
22 (print_insn_s390): Simplify the opcode search loop.
23 Check architecture mask against all searched opcodes, not just the
25 (s390_print_insn_with_opcode): Drop function pointer dereferences
27 (print_insn_s390): Likewise.
28 (s390_insn_length): Simplify formula for return value.
29 (s390_print_insn_with_opcode): Avoid special handling for the
30 separator before the first operand. Use new local variable
31 'flags' in place of 'operand->flags'.
33 2014-08-14 Mike Frysinger <vapier@gentoo.org>
35 * bfin-dis.c (struct private): Change int's to bfd_boolean's.
36 (decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
37 decode_dagMODik_0, decode_LDIMMhalf_0, decode_linkage_0):
38 Change assignment of 1 to priv->comment to TRUE.
39 (print_insn_bfin): Change legal to a bfd_boolean. Change
40 assignment of 0/1 with priv comment and parallel and legal
43 2014-08-14 Mike Frysinger <vapier@gentoo.org>
45 * bfin-dis.c (OUT): Define.
46 (decode_CC2stat_0): Declare new op_names array.
47 Replace multiple if statements with a single one.
49 2014-08-14 Mike Frysinger <vapier@gentoo.org>
51 * bfin-dis.c (struct private): Add iw0.
52 (_print_insn_bfin): Assign iw0 to priv.iw0.
53 (print_insn_bfin): Drop ifetch and use priv.iw0.
55 2014-08-13 Mike Frysinger <vapier@gentoo.org>
57 * bfin-dis.c (comment, parallel): Move from global scope ...
58 (struct private): ... to this new struct.
59 (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
60 decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
61 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
62 decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
63 decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
64 decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
65 decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
66 print_insn_bfin): Declare private struct. Use priv's comment and
69 2014-08-13 Mike Frysinger <vapier@gentoo.org>
71 * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
72 (_print_insn_bfin): Add check for unaligned pc.
74 2014-08-13 Mike Frysinger <vapier@gentoo.org>
76 * bfin-dis.c (ifetch): New function.
77 (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
80 2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
82 * micromips-opc.c (COD): Rename throughout to...
83 (CM): New define, update to use INSN_COPROC_MOVE.
84 (LCD): Rename throughout to...
85 (LC): New define, update to use INSN_LOAD_COPROC.
86 * mips-opc.c: Likewise.
88 2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
90 * micromips-opc.c (COD, LCD) New macros.
91 (cfc1, ctc1): Remove FP_S attribute.
92 (dmfc1, mfc1, mfhc1): Add LCD attribute.
93 (dmtc1, mtc1, mthc1): Add COD attribute.
94 * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
96 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
97 Alexander Ivchenko <alexander.ivchenko@intel.com>
98 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
99 Sergey Lega <sergey.s.lega@intel.com>
100 Anna Tikhonova <anna.tikhonova@intel.com>
101 Ilya Tocar <ilya.tocar@intel.com>
102 Andrey Turetskiy <andrey.turetskiy@intel.com>
103 Ilya Verbin <ilya.verbin@intel.com>
104 Kirill Yukhin <kirill.yukhin@intel.com>
105 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
107 * i386-dis-evex.h: Updated.
108 * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
109 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
110 PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
111 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
113 (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
114 VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
115 (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
116 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
117 EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
118 EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
119 EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
120 EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
121 EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
122 (prefix_table): Add entries for new instructions.
123 (vex_len_table): Ditto.
124 (vex_w_table): Ditto.
125 (OP_E_memory): Update xmmq_mode handling.
126 * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
127 (cpu_flags): Add CpuAVX512DQ.
128 * i386-init.h: Regenerared.
129 * i386-opc.h (CpuAVX512DQ): New.
130 (i386_cpu_flags): Add cpuavx512dq.
131 * i386-opc.tbl: Add AVX512DQ instructions.
132 * i386-tbl.h: Regenerate.
134 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
135 Alexander Ivchenko <alexander.ivchenko@intel.com>
136 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
137 Sergey Lega <sergey.s.lega@intel.com>
138 Anna Tikhonova <anna.tikhonova@intel.com>
139 Ilya Tocar <ilya.tocar@intel.com>
140 Andrey Turetskiy <andrey.turetskiy@intel.com>
141 Ilya Verbin <ilya.verbin@intel.com>
142 Kirill Yukhin <kirill.yukhin@intel.com>
143 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
145 * i386-dis-evex.h: Add new instructions (prefixes bellow).
146 * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
147 (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
148 (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
149 PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
150 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
151 PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
152 PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
153 PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
154 PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
155 PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
156 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
157 PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
158 PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
159 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
160 PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
161 PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
162 PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
163 PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
164 PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
165 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
166 PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
167 PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
168 (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
169 VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
170 VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
171 VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
172 VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
173 VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
174 VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
175 VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
176 VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
177 VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
178 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
179 (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
180 EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
181 EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
182 EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
183 EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
184 EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
185 EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
186 (prefix_table): Add entries for new instructions.
188 (vex_len_table): Ditto.
189 (vex_w_table): Ditto.
190 (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
191 mask_bd_mode handling.
192 (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
194 (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
196 (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
197 (OP_EX): Add dqw_swap_mode handling.
198 (OP_VEX): Add mask_bd_mode handling.
199 (OP_Mask): Add mask_bd_mode handling.
200 * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
201 (cpu_flags): Add CpuAVX512BW.
202 * i386-init.h: Regenerated.
203 * i386-opc.h (CpuAVX512BW): New.
204 (i386_cpu_flags): Add cpuavx512bw.
205 * i386-opc.tbl: Add AVX512BW instructions.
206 * i386-tbl.h: Regenerate.
208 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
209 Alexander Ivchenko <alexander.ivchenko@intel.com>
210 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
211 Sergey Lega <sergey.s.lega@intel.com>
212 Anna Tikhonova <anna.tikhonova@intel.com>
213 Ilya Tocar <ilya.tocar@intel.com>
214 Andrey Turetskiy <andrey.turetskiy@intel.com>
215 Ilya Verbin <ilya.verbin@intel.com>
216 Kirill Yukhin <kirill.yukhin@intel.com>
217 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
219 * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
220 * i386-tbl.h: Regenerate.
222 2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
223 Alexander Ivchenko <alexander.ivchenko@intel.com>
224 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
225 Sergey Lega <sergey.s.lega@intel.com>
226 Anna Tikhonova <anna.tikhonova@intel.com>
227 Ilya Tocar <ilya.tocar@intel.com>
228 Andrey Turetskiy <andrey.turetskiy@intel.com>
229 Ilya Verbin <ilya.verbin@intel.com>
230 Kirill Yukhin <kirill.yukhin@intel.com>
231 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
233 * i386-dis.c (intel_operand_size): Support 128/256 length in
234 vex_vsib_q_w_dq_mode.
235 (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
236 * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
237 (cpu_flags): Add CpuAVX512VL.
238 * i386-init.h: Regenerated.
239 * i386-opc.h (CpuAVX512VL): New.
240 (i386_cpu_flags): Add cpuavx512vl.
241 (BROADCAST_1TO4, BROADCAST_1TO2): Define.
242 * i386-opc.tbl: Add AVX512VL instructions.
243 * i386-tbl.h: Regenerate.
245 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
247 * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
248 * or1k-opinst.c: Regenerate.
250 2014-07-08 Ilya Tocar <ilya.tocar@intel.com>
252 * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
253 (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
255 2014-07-04 Alan Modra <amodra@gmail.com>
257 * configure.ac: Rename from configure.in.
258 * Makefile.in: Regenerate.
259 * config.in: Regenerate.
261 2014-07-04 Alan Modra <amodra@gmail.com>
263 * configure.in: Include bfd/version.m4.
264 (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
265 (BFD_VERSION): Delete.
266 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
267 * configure: Regenerate.
268 * Makefile.in: Regenerate.
270 2014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
271 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
272 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
273 Soundararajan <Sounderarajan.D@atmel.com>
275 * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
276 (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
277 machine is not avrtiny.
279 2014-06-26 Philippe De Muyter <phdm@macqel.be>
281 * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
284 2014-06-12 Alan Modra <amodra@gmail.com>
286 * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
287 * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
289 2014-06-10 H.J. Lu <hongjiu.lu@intel.com>
291 * i386-dis.c (fwait_prefix): New.
292 (ckprefix): Set fwait_prefix.
293 (print_insn): Properly print prefixes before fwait.
295 2014-06-07 Alan Modra <amodra@gmail.com>
297 * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
299 2014-06-05 Joel Brobecker <brobecker@adacore.com>
301 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
302 bfd's development.sh.
303 * Makefile.in, configure: Regenerate.
305 2014-06-03 Nick Clifton <nickc@redhat.com>
307 * msp430-dis.c (msp430_doubleoperand): Use extension_word to
308 decide when extended addressing is being used.
310 2014-06-02 Eric Botcazou <ebotcazou@adacore.com>
312 * sparc-opc.c (cas): Disable for LEON.
315 2014-05-20 Alan Modra <amodra@gmail.com>
317 * m68k-dis.c: Don't include setjmp.h.
319 2014-05-09 H.J. Lu <hongjiu.lu@intel.com>
321 * i386-dis.c (ADDR16_PREFIX): Removed.
322 (ADDR32_PREFIX): Likewise.
323 (DATA16_PREFIX): Likewise.
324 (DATA32_PREFIX): Likewise.
325 (prefix_name): Updated.
326 (print_insn): Simplify data and address size prefixes processing.
328 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
330 * or1k-desc.c: Regenerated.
331 * or1k-desc.h: Likewise.
332 * or1k-opc.c: Likewise.
333 * or1k-opc.h: Likewise.
334 * or1k-opinst.c: Likewise.
336 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
338 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
343 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
345 (parse_mips_dis_option): Update MSA and virtualization support to
346 allow mips64r3 and mips64r5.
348 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
350 * mips-opc.c (G3): Remove I4.
352 2014-05-05 H.J. Lu <hongjiu.lu@intel.com>
355 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
356 (end_codep): Likewise.
357 (mandatory_prefix): Likewise.
358 (active_seg_prefix): Likewise.
359 (ckprefix): Set active_seg_prefix to the active segment register
361 (seg_prefix): Removed.
362 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
363 for prefix index. Ignore the index if it is invalid and the
364 mandatory prefix isn't required.
365 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
366 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
367 in used_prefixes here. Don't print unused prefixes. Check
368 active_seg_prefix for the active segment register prefix.
369 Restore the DFLAG bit in sizeflag if the data size prefix is
370 unused. Check the unused mandatory PREFIX_XXX prefixes
371 (append_seg): Only print the segment register which gets used.
372 (OP_E_memory): Check active_seg_prefix for the segment register
375 (OP_OFF64): Likewise.
376 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
378 2014-05-02 H.J. Lu <hongjiu.lu@intel.com>
381 * config.in: Regenerated.
382 * configure: Likewise.
383 * configure.in: Check if sigsetjmp is available.
384 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
385 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
386 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
387 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
388 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
389 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
390 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
391 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
392 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
393 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
394 (OPCODES_SIGSETJMP): Likewise.
395 (OPCODES_SIGLONGJMP): Likewise.
396 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
397 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
398 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
399 * xtensa-dis.c (dis_private): Replace jmp_buf with
401 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
402 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
403 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
404 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
405 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
407 2014-05-01 H.J. Lu <hongjiu.lu@intel.com>
410 * i386-dis.c (print_insn): Handle prefixes before fwait.
412 2014-04-26 Alan Modra <amodra@gmail.com>
414 * po/POTFILES.in: Regenerate.
416 2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
418 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
419 to allow the MIPS XPA ASE.
420 (parse_mips_dis_option): Process the -Mxpa option.
421 * mips-opc.c (XPA): New define.
422 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
423 locations of the ctc0 and cfc0 instructions.
425 2014-04-22 Christian Svensson <blue@cmd.nu>
427 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
428 * configure.in: Likewise.
429 * disassemble.c: Likewise.
430 * or1k-asm.c: New file.
431 * or1k-desc.c: New file.
432 * or1k-desc.h: New file.
433 * or1k-dis.c: New file.
434 * or1k-ibld.c: New file.
435 * or1k-opc.c: New file.
436 * or1k-opc.h: New file.
437 * or1k-opinst.c: New file.
438 * Makefile.in: Regenerate.
439 * configure: Regenerate.
440 * openrisc-asm.c: Delete.
441 * openrisc-desc.c: Delete.
442 * openrisc-desc.h: Delete.
443 * openrisc-dis.c: Delete.
444 * openrisc-ibld.c: Delete.
445 * openrisc-opc.c: Delete.
446 * openrisc-opc.h: Delete.
447 * or32-dis.c: Delete.
448 * or32-opc.c: Delete.
450 2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
452 * i386-dis.c (rm_table): Add encls, enclu.
453 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
454 (cpu_flags): Add CpuSE1.
455 * i386-opc.h (enum): Add CpuSE1.
456 (i386_cpu_flags): Add cpuse1.
457 * i386-opc.tbl: Add encls, enclu.
458 * i386-init.h: Regenerated.
459 * i386-tbl.h: Likewise.
461 2014-04-02 Anthony Green <green@moxielogic.com>
463 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
464 instructions, sex.b and sex.s.
466 2014-03-26 Jiong Wang <jiong.wang@arm.com>
468 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
471 2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
473 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
474 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
476 * i386-tbl.h: Regenerate.
478 2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
480 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
481 %hstick_enable added.
483 2014-03-19 Nick Clifton <nickc@redhat.com>
485 * rx-decode.opc (bwl): Allow for bogus instructions with a size
487 (sbwl, ubwl, SCALE): Likewise.
488 * rx-decode.c: Regenerate.
490 2014-03-12 Alan Modra <amodra@gmail.com>
492 * Makefile.in: Regenerate.
494 2014-03-05 Alan Modra <amodra@gmail.com>
496 Update copyright years.
498 2014-03-04 Heiher <r@hev.cc>
500 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
502 2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
504 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
505 so that they come after the Loongson extensions.
507 2014-03-03 Alan Modra <amodra@gmail.com>
509 * i386-gen.c (process_copyright): Emit copyright notice on one line.
511 2014-02-28 Alan Modra <amodra@gmail.com>
513 * msp430-decode.c: Regenerate.
515 2014-02-27 Jiong Wang <jiong.wang@arm.com>
517 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
518 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
520 2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
522 * aarch64-opc.c (print_register_offset_address): Call
523 get_int_reg_name to prepare the register name.
525 2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
527 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
528 * i386-tbl.h: Regenerate.
530 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
532 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
533 (cpu_flags): Add CpuPREFETCHWT1.
534 * i386-init.h: Regenerate.
535 * i386-opc.h (CpuPREFETCHWT1): New.
536 (i386_cpu_flags): Add cpuprefetchwt1.
537 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
538 * i386-tbl.h: Regenerate.
540 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
542 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
544 * i386-tbl.h: Regenerate.
546 2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
548 * i386-gen.c (output_cpu_flags): Don't output trailing space.
549 (output_opcode_modifier): Likewise.
550 (output_operand_type): Likewise.
551 * i386-init.h: Regenerated.
552 * i386-tbl.h: Likewise.
554 2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
556 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
558 (PREFIX enum): Add PREFIX_0FAE_REG_7.
559 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
560 (prefix_table): Add clflusopt.
561 (mod_table): Add xrstors, xsavec, xsaves.
562 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
563 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
564 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
565 * i386-init.h: Regenerate.
566 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
567 xsaves64, xsavec, xsavec64.
568 * i386-tbl.h: Regenerate.
570 2014-02-10 Alan Modra <amodra@gmail.com>
572 * po/POTFILES.in: Regenerate.
573 * po/opcodes.pot: Regenerate.
575 2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
576 Jan Beulich <jbeulich@suse.com>
579 * i386-dis.c (OP_E_memory): Fix shift computation for
580 vex_vsib_q_w_dq_mode.
582 2014-01-09 Bradley Nelson <bradnelson@google.com>
583 Roland McGrath <mcgrathr@google.com>
585 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
586 last_rex_prefix is -1.
588 2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
590 * i386-gen.c (process_copyright): Update copyright year to 2014.
592 2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
594 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
596 For older changes see ChangeLog-2013
598 Copyright (C) 2014 Free Software Foundation, Inc.
600 Copying and distribution of this file, with or without modification,
601 are permitted in any medium without royalty provided the copyright
602 notice and this notice are preserved.
608 version-control: never