1 2020-09-17 Cooper Qu <<cooper.qu@linux.alibaba.com>>
4 * csky-dis.c (using_abi): New.
5 (parse_csky_dis_options): New function.
6 (get_gr_name): New function.
7 (get_cr_name): New function.
8 (csky_output_operand): Use get_gr_name and get_cr_name to
9 disassemble and add handle of OPRND_TYPE_IMM5b_LS.
10 (print_insn_csky): Parse disassembler options.
11 * opcodes/csky-opc.h (OPRND_TYPE_IMM5b_LS): New enum.
12 (GENARAL_REG_BANK): Define.
13 (REG_SUPPORT_ALL): Define.
14 (REG_SUPPORT_ALL): New.
16 (REG_SUPPORT_A): Define.
17 (REG_SUPPORT_B): Define.
18 (REG_SUPPORT_C): Define.
19 (REG_SUPPORT_D): Define.
20 (REG_SUPPORT_E): Define.
21 (csky_abiv1_general_regs): New.
22 (csky_abiv1_control_regs): New.
23 (csky_abiv2_general_regs): New.
24 (csky_abiv2_control_regs): New.
25 (get_register_name): New function.
26 (get_register_number): New function.
27 (csky_get_general_reg_name): New function.
28 (csky_get_general_regno): New function.
29 (csky_get_control_reg_name): New function.
30 (csky_get_control_regno): New function.
31 (csky_v2_opcodes): Prefer two oprerans format for bclri and
32 bseti, strengthen the operands legality check of addc, zext
35 2020-09-23 Lili Cui <lili.cui@intel.com>
37 * i386-dis.c (enum): Add REG_0F38D8_PREFIX_1,
38 MOD_0F38FA_PREFIX_1, MOD_0F38FB_PREFIX_1,
39 MOD_0F38DC_PREFIX_1, MOD_0F38DD_PREFIX_1,
40 MOD_0F38DE_PREFIX_1, MOD_0F38DF_PREFIX_1,
41 PREFIX_0F38D8, PREFIX_0F38FA, PREFIX_0F38FB.
42 (reg_table): New instructions (see prefixes above).
43 (prefix_table): Likewise.
44 (three_byte_table): Likewise.
46 * i386-gen.c (cpu_flag_init): Add CPU_KL_FLAGS, CPU_WIDE_KL_FLAGS,
47 CPU_ANY_KL_FLAGS and CPU_ANY_WIDE_KL_FLAGS.
48 (cpu_flags): Likewise.
49 (operand_type_init): Likewise.
50 * i386-opc.h (enum): Add CpuKL and CpuWide_KL.
51 (i386_cpu_flags): Add cpukl and cpuwide_kl.
52 * i386-opc.tbl: Add KL and WIDE_KL insns.
53 * i386-init.h: Regenerate.
54 * i386-tbl.h: Likewise.
56 2020-09-21 Alan Modra <amodra@gmail.com>
58 * rx-dis.c (flag_names): Add missing comma.
59 (register_names, flag_names, double_register_names),
60 (double_register_high_names, double_register_low_names),
61 (double_control_register_names, double_condition_names): Remove
64 2020-09-18 David Faust <david.faust@oracle.com>
66 * bpf-desc.c: Regenerate.
67 * bpf-desc.h: Likewise.
68 * bpf-opc.c: Likewise.
69 * bpf-opc.h: Likewise.
71 2020-09-16 Andrew Burgess <andrew.burgess@embecosm.com>
73 * csky-dis.c (csky_get_disassembler): Don't return NULL when there
76 2020-09-16 Alan Modra <amodra@gmail.com>
78 * ppc-dis.c (ppc_symbol_is_valid): Adjust elf_symbol_from invocation.
80 2020-09-10 Nick Clifton <nickc@redhat.com>
82 * ppc-dis.c (ppc_symbol_is_valid): New function. Returns false
83 for hidden, local, no-type symbols.
84 (disassemble_init_powerpc): Point the symbol_is_valid field in the
85 info structure at the new function.
87 2020-09-10 Cooper Qu <cooper.qu@linux.alibaba.com>
89 * csky-opc.h (csky_v2_opcodes): Add L2Cache instructions.
90 * testsuite/gas/csky/cskyv2_ck860.d : Adjust to icache.iva
93 2020-09-10 Nick Clifton <nickc@redhat.com>
95 * csky-dis.c (csky_output_operand): Coerce the immediate values to
98 2020-09-10 Alan Modra <amodra@gmail.com>
100 * csky-dis.c (csky_output_operand): Don't sprintf str to itself.
102 2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com>
104 * csky-opc.h (csky_v2_opcodes): Change mvtc and mulsw's
107 2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com>
109 * csky-dis.c (csky_output_operand): Add handlers for
110 OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and
111 OPRND_TYPE_DFLOAT_FMOVI. Refine OPRND_TYPE_FREGLIST_DASH
112 to support FPUV3 instructions.
113 * csky-opc.h (enum operand_type): New enum OPRND_TYPE_IMM9b,
114 OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and
115 OPRND_TYPE_DFLOAT_FMOVI.
116 (OPRND_MASK_4_5, OPRND_MASK_6, OPRND_MASK_6_7, OPRND_MASK_6_8,
117 OPRND_MASK_7, OPRND_MASK_7_8, OPRND_MASK_17_24,
118 OPRND_MASK_20, OPRND_MASK_20_21, OPRND_MASK_20_22,
119 OPRND_MASK_20_23, OPRND_MASK_20_24, OPRND_MASK_20_25,
120 OPRND_MASK_0_3or5_8, OPRND_MASK_0_3or6_7, OPRND_MASK_0_3or25,
121 OPRND_MASK_0_4or21_24, OPRND_MASK_5or20_21,
122 OPRND_MASK_5or20_22, OPRND_MASK_5or20_23, OPRND_MASK_5or20_24,
123 OPRND_MASK_5or20_25, OPRND_MASK_8_9or21_25,
124 OPRND_MASK_8_9or16_25, OPRND_MASK_4_6or20, OPRND_MASK_5_7or20,
125 OPRND_MASK_4_5or20or25, OPRND_MASK_4_6or20or25,
126 OPRND_MASK_4_7or20or25, OPRND_MASK_6_9or17_24,
127 OPRND_MASK_6_7or20, OPRND_MASK_6or20, OPRND_MASK_7or20,
128 OPRND_MASK_5or8_9or16_25, OPRND_MASK_5or8_9or20_25): Define.
129 (csky_v2_opcodes): Add FPUV3 instructions.
131 2020-09-08 Alex Coplan <alex.coplan@arm.com>
133 * aarch64-dis.c (print_operands): Pass CPU features to
134 aarch64_print_operand().
135 * aarch64-opc.c (aarch64_print_operand): Use CPU features to determine
136 preferred disassembly of system registers.
137 (SR_RNG): Refactor to use new SR_FEAT2 macro.
143 (SR_EXPAND_ELx): New.
144 (SR_EXPAND_EL12): New.
145 (aarch64_sys_regs): Specify which registers are only on
146 A-profile, add R-profile system registers.
150 (aarch64_sys_ins_reg_supported_p): Reject EL3 registers for
153 2020-09-08 Alex Coplan <alex.coplan@arm.com>
155 * aarch64-tbl.h (aarch64_feature_v8_r): New.
158 (aarch64_opcode_table): Add dfb.
159 * aarch64-opc-2.c: Regenerate.
160 * aarch64-asm-2.c: Regenerate.
161 * aarch64-dis-2.c: Regenerate.
163 2020-09-08 Alex Coplan <alex.coplan@arm.com>
165 * aarch64-dis.c (arch_variant): New.
166 (determine_disassembling_preference): Disassemble according to
168 (select_aarch64_variant): New.
169 (print_insn_aarch64): Set feature set.
171 2020-09-02 Alan Modra <amodra@gmail.com>
173 * v850-opc.c (insert_i5div1, insert_i5div2, insert_i5div3),
174 (insert_d5_4, insert_d8_6, insert_d8_7, insert_v8, insert_d9),
175 (insert_u16_loop, insert_d16_15, insert_d16_16, insert_d17_16),
176 (insert_d22, insert_d23, insert_d23_align1, insert_i9, insert_u9),
177 (insert_spe, insert_r4, insert_POS, insert_WIDTH, insert_SELID),
178 (insert_VECTOR8, insert_VECTOR5, insert_CACHEOP, insert_PREFOP),
179 (nsert_IMM10U, insert_SRSEL1, insert_SRSEL2): Use unsigned long
180 for value parameter and update code to suit.
181 (extract_d9, extract_d16_15, extract_d16_16, extract_d17_16),
182 (extract_d22, extract_d23, extract_i9): Use unsigned long variables.
184 2020-09-02 Alan Modra <amodra@gmail.com>
186 * i386-dis.c (OP_E_memory): Don't cast to signed type when
188 (get32, get32s): Use unsigned types in shift expressions.
190 2020-09-02 Alan Modra <amodra@gmail.com>
192 * csky-dis.c (print_insn_csky): Use unsigned type for "given".
194 2020-09-02 Alan Modra <amodra@gmail.com>
196 * crx-dis.c: Whitespace.
197 (print_arg): Use unsigned type for longdisp and mask variables,
198 and for left shift constant.
200 2020-09-02 Alan Modra <amodra@gmail.com>
202 * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift.
203 * bpf-ibld.c: Regenerate.
204 * epiphany-ibld.c: Regenerate.
205 * fr30-ibld.c: Regenerate.
206 * frv-ibld.c: Regenerate.
207 * ip2k-ibld.c: Regenerate.
208 * iq2000-ibld.c: Regenerate.
209 * lm32-ibld.c: Regenerate.
210 * m32c-ibld.c: Regenerate.
211 * m32r-ibld.c: Regenerate.
212 * mep-ibld.c: Regenerate.
213 * mt-ibld.c: Regenerate.
214 * or1k-ibld.c: Regenerate.
215 * xc16x-ibld.c: Regenerate.
216 * xstormy16-ibld.c: Regenerate.
218 2020-09-02 Alan Modra <amodra@gmail.com>
220 * bfin-dis.c (MASKBITS): Use SIGNBIT.
222 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
224 * csky-opc.h (csky_v2_opcodes): Move divul and divsl
225 to CSKYV2_ISA_3E3R3 instruction set.
227 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
229 * csky-opc.h (csky_v2_opcodes): Fix Encode of mulsws.
231 2020-09-01 Alan Modra <amodra@gmail.com>
233 * mep-ibld.c: Regenerate.
235 2020-08-31 Cooper Qu <cooper.qu@linux.alibaba.com>
237 * csky-dis.c (csky_output_operand): Assign dis_info.value for
240 2020-08-30 Alan Modra <amodra@gmail.com>
242 * cr16-dis.c: Formatting.
243 (parameter): Delete struct typedef. Use dwordU instead
245 (make_argument <arg_idxr>): Simplify detection of cbitb, sbitb
247 (make_argument <arg_cr>): Extract 20-bit field not 16-bit.
249 2020-08-29 Alan Modra <amodra@gmail.com>
252 * csky-opc.h (MAX_OPRND_NUM): Define to 5.
253 (union csky_operand): Use MAX_OPRND_NUM to size oprnds array.
255 2020-08-28 Alan Modra <amodra@gmail.com>
259 * cgen-ibld.in (insert_1): Use 1UL in forming mask.
260 (extract_normal): Likewise.
261 (insert_normal): Likewise, and move past zero length test.
262 (put_insn_int_value): Handle mask for zero length, use 1UL.
263 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
264 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
265 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
266 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
268 2020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com>
270 * csky-dis.c (CSKY_DEFAULT_ISA): Define.
271 (csky_dis_info): Add member isa.
272 (csky_find_inst_info): Skip instructions that do not belong to
274 (csky_get_disassembler): Get infomation from attribute section.
275 (print_insn_csky): Set defualt ISA flag.
276 * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
277 * csky-opc.h (struct csky_opcode): Change isa_flag16 and
278 isa_flag32'type to unsigned 64 bits.
280 2020-08-26 Jose E. Marchesi <jemarch@gnu.org>
282 * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX.
284 2020-08-26 David Faust <david.faust@oracle.com>
286 * bpf-desc.c: Regenerate.
287 * bpf-desc.h: Likewise.
288 * bpf-opc.c: Likewise.
289 * bpf-opc.h: Likewise.
290 * disassemble.c (disassemble_init_for_target): Set bits for xBPF
291 ISA when appropriate.
293 2020-08-25 Alan Modra <amodra@gmail.com>
296 * vax-dis.c (parse_disassembler_options): Always add at least one
297 to entry_addr_total_slots.
299 2020-08-24 Cooper Qu <cooper.qu@linux.alibaba.com>
301 * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
302 in other CPUs to speed up disassembling.
303 * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
304 Change plsli.u16 to plsli.16, change sync's operand format.
306 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
308 * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
310 2020-08-21 Nick Clifton <nickc@redhat.com>
312 * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
315 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
317 * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
319 2020-08-19 Alan Modra <amodra@gmail.com>
321 * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
324 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
326 * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
327 <xvcvbf16spn>: ...to this.
329 2020-08-12 Alex Coplan <alex.coplan@arm.com>
331 * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
333 2020-08-12 Nick Clifton <nickc@redhat.com>
335 * po/sr.po: Updated Serbian translation.
337 2020-08-11 Alan Modra <amodra@gmail.com>
339 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
341 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
343 * aarch64-opc.c (aarch64_print_operand):
344 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
345 (aarch64_sys_reg_supported_p): Function removed.
346 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
347 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
350 2020-08-10 Alan Modra <amodra@gmail.com>
352 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
355 2020-08-10 Alan Modra <amodra@gmail.com>
357 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
358 Enable icbt for power5, miso for power8.
360 2020-08-10 Alan Modra <amodra@gmail.com>
362 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
363 mtvsrd, and similarly for mfvsrd.
365 2020-08-04 Christian Groessler <chris@groessler.org>
366 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
368 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
369 opcodes (special "out" to absolute address).
370 * z8k-opc.h: Regenerate.
372 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
375 * i386-opc.h (Prefix_Disp8): New.
376 (Prefix_Disp16): Likewise.
377 (Prefix_Disp32): Likewise.
378 (Prefix_Load): Likewise.
379 (Prefix_Store): Likewise.
380 (Prefix_VEX): Likewise.
381 (Prefix_VEX3): Likewise.
382 (Prefix_EVEX): Likewise.
383 (Prefix_REX): Likewise.
384 (Prefix_NoOptimize): Likewise.
385 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
386 * i386-tbl.h: Regenerated.
388 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
390 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
391 default case with abort() instead of printing an error message and
392 continuing, to avoid a maybe-uninitialized warning.
394 2020-07-24 Nick Clifton <nickc@redhat.com>
396 * po/de.po: Updated German translation.
398 2020-07-21 Jan Beulich <jbeulich@suse.com>
400 * i386-dis.c (OP_E_memory): Revert previous change.
402 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
405 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
406 without base nor index registers.
408 2020-07-15 Jan Beulich <jbeulich@suse.com>
410 * i386-dis.c (putop): Move 'V' and 'W' handling.
412 2020-07-15 Jan Beulich <jbeulich@suse.com>
414 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
415 construct for push/pop of register.
416 (putop): Honor cond when handling 'P'. Drop handling of plain
419 2020-07-15 Jan Beulich <jbeulich@suse.com>
421 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
422 description. Drop '&' description. Use P for push of immediate,
423 pushf/popf, enter, and leave. Use %LP for lret/retf.
424 (dis386_twobyte): Use P for push/pop of fs/gs.
425 (reg_table): Use P for push/pop. Use @ for near call/jmp.
426 (x86_64_table): Use P for far call/jmp.
427 (putop): Drop handling of 'U' and '&'. Move and adjust handling
428 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
430 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
431 and dqw_mode (unconditional).
433 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
436 * i386-dis.c (OP_E_memory): Without base nor index registers,
437 32-bit displacement to 64 bits.
439 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
441 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
442 faulty double register pair is detected.
444 2020-07-14 Jan Beulich <jbeulich@suse.com>
446 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
448 2020-07-14 Jan Beulich <jbeulich@suse.com>
450 * i386-dis.c (OP_R, Rm): Delete.
451 (MOD_0F24, MOD_0F26): Rename to ...
452 (X86_64_0F24, X86_64_0F26): ... respectively.
453 (dis386): Update 'L' and 'Z' comments.
454 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
456 (mod_table): Move opcode 0F24 and 0F26 entries ...
457 (x86_64_table): ... here.
458 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
461 2020-07-14 Jan Beulich <jbeulich@suse.com>
463 * i386-dis.c (Rd, Rdq, MaskR): Delete.
464 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
465 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
466 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
467 MOD_EVEX_0F387C): New enumerators.
468 (reg_table): Use Edq for rdssp.
469 (prefix_table): Use Edq for incssp.
470 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
471 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
472 ktest*, and kshift*. Use Edq / MaskE for kmov*.
473 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
474 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
475 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
476 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
477 0F3828_P_1 and 0F3838_P_1.
478 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
479 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
481 2020-07-14 Jan Beulich <jbeulich@suse.com>
483 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
484 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
485 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
486 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
487 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
488 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
489 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
490 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
491 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
492 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
493 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
494 (reg_table, prefix_table, three_byte_table, vex_table,
495 vex_len_table, mod_table, rm_table): Replace / remove respective
497 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
498 of PREFIX_DATA in used_prefixes.
500 2020-07-14 Jan Beulich <jbeulich@suse.com>
502 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
503 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
504 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
505 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
506 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
507 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
508 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
509 VEX_W_0F3A33_L_0): Delete.
510 (dis386): Adjust "BW" description.
511 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
512 0F3A31, 0F3A32, and 0F3A33.
513 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
515 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
518 2020-07-14 Jan Beulich <jbeulich@suse.com>
520 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
521 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
522 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
523 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
524 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
525 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
526 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
527 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
528 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
529 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
530 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
531 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
532 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
533 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
534 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
535 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
536 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
537 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
538 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
539 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
540 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
541 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
542 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
543 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
544 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
545 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
546 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
547 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
548 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
549 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
550 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
551 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
552 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
553 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
554 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
555 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
556 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
557 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
558 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
559 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
560 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
561 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
562 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
563 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
564 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
565 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
566 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
567 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
568 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
569 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
570 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
571 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
572 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
573 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
574 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
575 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
576 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
577 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
578 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
579 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
580 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
581 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
582 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
583 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
584 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
585 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
586 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
587 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
588 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
589 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
590 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
591 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
592 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
593 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
594 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
595 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
596 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
597 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
598 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
599 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
600 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
601 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
602 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
603 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
604 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
605 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
606 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
607 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
608 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
609 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
610 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
611 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
612 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
613 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
614 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
615 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
616 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
617 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
618 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
619 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
620 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
621 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
622 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
623 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
624 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
625 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
626 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
627 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
628 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
629 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
630 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
631 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
632 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
633 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
634 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
635 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
636 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
637 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
638 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
639 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
640 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
641 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
642 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
643 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
644 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
645 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
646 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
647 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
648 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
649 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
650 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
651 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
652 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
653 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
654 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
655 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
656 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
657 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
658 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
659 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
660 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
661 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
662 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
663 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
664 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
665 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
666 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
667 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
668 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
669 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
670 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
671 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
672 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
673 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
674 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
675 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
676 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
677 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
678 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
679 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
680 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
681 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
682 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
683 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
684 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
685 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
686 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
687 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
688 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
689 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
690 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
691 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
692 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
693 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
694 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
695 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
696 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
697 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
698 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
699 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
700 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
701 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
702 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
703 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
704 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
705 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
706 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
707 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
708 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
709 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
710 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
711 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
712 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
713 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
714 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
715 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
716 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
717 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
718 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
719 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
720 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
721 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
722 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
723 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
724 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
725 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
726 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
727 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
728 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
729 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
730 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
731 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
732 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
733 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
734 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
735 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
736 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
737 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
738 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
739 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
740 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
741 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
742 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
743 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
744 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
745 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
746 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
747 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
748 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
749 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
750 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
751 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
752 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
753 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
754 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
755 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
756 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
757 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
758 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
759 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
760 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
761 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
762 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
763 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
764 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
765 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
766 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
767 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
768 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
769 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
770 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
771 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
772 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
773 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
774 EVEX_W_0F3A72_P_2): Rename to ...
775 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
776 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
777 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
778 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
779 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
780 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
781 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
782 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
783 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
784 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
785 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
786 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
787 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
788 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
789 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
790 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
791 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
792 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
793 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
794 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
795 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
796 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
797 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
798 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
799 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
800 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
801 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
802 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
803 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
804 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
805 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
806 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
807 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
808 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
809 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
810 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
811 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
812 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
813 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
814 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
815 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
816 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
817 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
818 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
819 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
820 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
821 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
822 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
823 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
824 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
825 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
826 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
827 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
828 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
829 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
830 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
831 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
832 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
833 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
834 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
835 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
836 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
837 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
838 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
839 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
840 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
841 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
842 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
843 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
844 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
845 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
846 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
848 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
849 vex_w_table, mod_table): Replace / remove respective entries.
850 (print_insn): Move up dp->prefix_requirement handling. Handle
852 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
853 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
854 Replace / remove respective entries.
856 2020-07-14 Jan Beulich <jbeulich@suse.com>
858 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
859 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
860 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
861 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
862 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
864 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
865 0F2C, 0F2D, 0F2E, and 0F2F.
866 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
869 2020-07-14 Jan Beulich <jbeulich@suse.com>
871 * i386-dis.c (OP_VexR, VexScalarR): New.
872 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
873 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
874 need_vex_reg): Delete.
875 (prefix_table): Replace VexScalar by VexScalarR and
876 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
877 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
878 (vex_len_table): Replace EXqVexScalarS by EXqS.
879 (get_valid_dis386): Don't set need_vex_reg.
880 (print_insn): Don't initialize need_vex_reg.
881 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
882 q_scalar_swap_mode cases.
883 (OP_EX): Don't check for d_scalar_swap_mode and
885 (OP_VEX): Done check need_vex_reg.
886 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
887 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
888 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
890 2020-07-14 Jan Beulich <jbeulich@suse.com>
892 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
893 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
894 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
895 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
896 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
897 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
898 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
899 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
900 (vex_table): Replace Vex128 by Vex.
901 (vex_len_table): Likewise. Adjust referenced enum names.
902 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
903 referenced enum names.
904 (OP_VEX): Drop vex128_mode and vex256_mode cases.
905 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
907 2020-07-14 Jan Beulich <jbeulich@suse.com>
909 * i386-dis.c (dis386): "LW" description now applies to "DQ".
910 (putop): Handle "DQ". Don't handle "LW" anymore.
911 (prefix_table, mod_table): Replace %LW by %DQ.
912 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
914 2020-07-14 Jan Beulich <jbeulich@suse.com>
916 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
917 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
918 d_scalar_swap_mode case handling. Move shift adjsutment into
919 the case its applicable to.
921 2020-07-14 Jan Beulich <jbeulich@suse.com>
923 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
924 (EXbScalar, EXwScalar): Fold to ...
925 (EXbwUnit): ... this.
926 (b_scalar_mode, w_scalar_mode): Fold to ...
927 (bw_unit_mode): ... this.
928 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
929 w_scalar_mode handling by bw_unit_mode one.
930 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
932 * i386-dis-evex-prefix.h: ... here.
934 2020-07-14 Jan Beulich <jbeulich@suse.com>
936 * i386-dis.c (PCMPESTR_Fixup): Delete.
937 (dis386): Adjust "LQ" description.
938 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
939 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
940 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
941 vpcmpestrm, and vpcmpestri.
942 (putop): Honor "cond" when handling LQ.
943 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
944 vcvtsi2ss and vcvtusi2ss.
945 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
946 vcvtsi2sd and vcvtusi2sd.
948 2020-07-14 Jan Beulich <jbeulich@suse.com>
950 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
951 (simd_cmp_op): Add const.
952 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
953 (CMP_Fixup): Handle VEX case.
954 (prefix_table): Replace VCMP by CMP.
955 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
957 2020-07-14 Jan Beulich <jbeulich@suse.com>
959 * i386-dis.c (MOVBE_Fixup): Delete.
961 (prefix_table): Use Mv for movbe entries.
963 2020-07-14 Jan Beulich <jbeulich@suse.com>
965 * i386-dis.c (CRC32_Fixup): Delete.
966 (prefix_table): Use Eb/Ev for crc32 entries.
968 2020-07-14 Jan Beulich <jbeulich@suse.com>
970 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
971 Conditionalize invocations of "USED_REX (0)".
973 2020-07-14 Jan Beulich <jbeulich@suse.com>
975 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
976 CH, DH, BH, AX, DX): Delete.
977 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
978 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
979 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
981 2020-07-10 Lili Cui <lili.cui@intel.com>
983 * i386-dis.c (TMM): New.
986 (MVexSIBMEM): Likewise.
987 (tmm_mode): Likewise.
988 (vex_sibmem_mode): Likewise.
989 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
990 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
991 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
992 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
993 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
994 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
995 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
996 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
997 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
998 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
999 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
1000 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
1001 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
1002 (PREFIX_VEX_0F3849_X86_64): Likewise.
1003 (PREFIX_VEX_0F384B_X86_64): Likewise.
1004 (PREFIX_VEX_0F385C_X86_64): Likewise.
1005 (PREFIX_VEX_0F385E_X86_64): Likewise.
1006 (X86_64_VEX_0F3849): Likewise.
1007 (X86_64_VEX_0F384B): Likewise.
1008 (X86_64_VEX_0F385C): Likewise.
1009 (X86_64_VEX_0F385E): Likewise.
1010 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
1011 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
1012 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
1013 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
1014 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
1015 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
1016 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
1017 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
1018 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
1019 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
1020 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
1021 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
1022 (VEX_W_0F3849_X86_64_P_0): Likewise.
1023 (VEX_W_0F3849_X86_64_P_2): Likewise.
1024 (VEX_W_0F3849_X86_64_P_3): Likewise.
1025 (VEX_W_0F384B_X86_64_P_1): Likewise.
1026 (VEX_W_0F384B_X86_64_P_2): Likewise.
1027 (VEX_W_0F384B_X86_64_P_3): Likewise.
1028 (VEX_W_0F385C_X86_64_P_1): Likewise.
1029 (VEX_W_0F385E_X86_64_P_0): Likewise.
1030 (VEX_W_0F385E_X86_64_P_1): Likewise.
1031 (VEX_W_0F385E_X86_64_P_2): Likewise.
1032 (VEX_W_0F385E_X86_64_P_3): Likewise.
1033 (names_tmm): Likewise.
1034 (att_names_tmm): Likewise.
1035 (intel_operand_size): Handle void_mode.
1036 (OP_XMM): Handle tmm_mode.
1039 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
1040 CpuAMX_BF16 and CpuAMX_TILE.
1041 (operand_type_shorthands): Add RegTMM.
1042 (operand_type_init): Likewise.
1043 (operand_types): Add Tmmword.
1044 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
1045 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
1046 * i386-opc.h (CpuAMX_INT8): New.
1047 (CpuAMX_BF16): Likewise.
1048 (CpuAMX_TILE): Likewise.
1050 (Tmmword): Likewise.
1051 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
1052 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
1053 (i386_operand_type): Add tmmword.
1054 * i386-opc.tbl: Add AMX instructions.
1055 * i386-reg.tbl: Add AMX registers.
1056 * i386-init.h: Regenerated.
1057 * i386-tbl.h: Likewise.
1059 2020-07-08 Jan Beulich <jbeulich@suse.com>
1061 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
1062 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
1064 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
1065 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
1067 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
1068 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
1069 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
1070 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
1071 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
1072 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
1073 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
1074 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
1075 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
1076 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
1077 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
1078 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
1079 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
1080 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
1081 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
1082 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
1083 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
1084 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
1085 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
1086 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
1087 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
1088 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
1089 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
1090 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
1091 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
1092 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
1093 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
1094 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
1095 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
1096 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
1097 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
1098 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
1099 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
1100 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
1101 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
1102 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
1103 (reg_table): Re-order XOP entries. Adjust their operands.
1104 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
1105 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
1106 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
1107 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
1108 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
1109 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
1110 entries by references ...
1111 (vex_len_table): ... to resepctive new entries here. For several
1112 new and existing entries reference ...
1113 (vex_w_table): ... new entries here.
1114 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
1116 2020-07-08 Jan Beulich <jbeulich@suse.com>
1118 * i386-dis.c (XMVexScalarI4): Define.
1119 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
1120 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
1121 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
1122 (vex_len_table): Move scalar FMA4 entries ...
1123 (prefix_table): ... here.
1124 (OP_REG_VexI4): Handle scalar_mode.
1125 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
1126 * i386-tbl.h: Re-generate.
1128 2020-07-08 Jan Beulich <jbeulich@suse.com>
1130 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
1131 Vex_2src_2): Delete.
1132 (OP_VexW, VexW): New.
1133 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
1134 for shifts and rotates by register.
1136 2020-07-08 Jan Beulich <jbeulich@suse.com>
1138 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
1139 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
1140 OP_EX_VexReg): Delete.
1141 (OP_VexI4, VexI4): New.
1142 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
1143 (prefix_table): ... here.
1144 (print_insn): Drop setting of vex_w_done.
1146 2020-07-08 Jan Beulich <jbeulich@suse.com>
1148 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
1149 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
1150 (xop_table): Replace operands of 4-operand insns.
1151 (OP_REG_VexI4): Move VEX.W based operand swaping here.
1153 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
1155 * arc-opc.c (insert_rbd): New function.
1158 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
1161 2020-07-07 Jan Beulich <jbeulich@suse.com>
1163 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
1164 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
1165 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
1166 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
1168 (putop): Handle "BW".
1169 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
1170 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
1172 * i386-dis-evex-prefix.h: ... here.
1174 2020-07-06 Jan Beulich <jbeulich@suse.com>
1176 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
1177 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
1178 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
1179 VEX_W_0FXOP_09_83): New enumerators.
1180 (xop_table): Reference the above.
1181 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
1182 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
1183 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
1184 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
1186 2020-07-06 Jan Beulich <jbeulich@suse.com>
1188 * i386-dis.c (EVEX_W_0F3838_P_1,
1189 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
1190 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
1191 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
1192 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
1193 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
1194 (putop): Centralize management of last[]. Delete SAVE_LAST.
1195 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
1196 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
1197 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
1198 * i386-dis-evex-prefix.h: here.
1200 2020-07-06 Jan Beulich <jbeulich@suse.com>
1202 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
1203 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
1204 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
1205 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
1207 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
1208 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
1209 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
1210 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
1211 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
1212 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
1213 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
1214 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
1215 these, respectively.
1216 * i386-dis-evex-len.h: Adjust comments.
1217 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
1218 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
1219 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
1220 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
1221 MOD_EVEX_0F385B_P_2_W_1 table entries.
1222 * i386-dis-evex-w.h: Reference mod_table[] for
1223 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
1226 2020-07-06 Jan Beulich <jbeulich@suse.com>
1228 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
1229 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
1231 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
1232 Likewise. Mark 256-bit entries invalid.
1234 2020-07-06 Jan Beulich <jbeulich@suse.com>
1236 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1237 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1238 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1239 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1240 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1241 PREFIX_EVEX_0F382B): Delete.
1242 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
1243 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
1244 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
1245 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
1246 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
1248 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
1249 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
1250 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
1251 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
1253 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
1254 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
1255 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1256 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1257 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1258 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1259 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1260 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1261 PREFIX_EVEX_0F382B): Remove table entries.
1262 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
1263 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
1264 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1266 2020-07-06 Jan Beulich <jbeulich@suse.com>
1268 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
1269 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
1271 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
1272 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
1273 EVEX_LEN_0F3A01_P_2_W_1 table entries.
1274 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1277 2020-07-06 Jan Beulich <jbeulich@suse.com>
1279 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
1280 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1281 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1282 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
1283 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
1284 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
1285 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1286 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
1287 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1290 2020-07-06 Jan Beulich <jbeulich@suse.com>
1292 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
1293 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
1294 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
1296 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
1298 * i386-dis-evex.h (evex_table): Reference VEX table entry for
1300 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1302 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1304 2020-07-06 Jan Beulich <jbeulich@suse.com>
1306 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1307 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1308 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1309 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1310 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1311 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1312 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1313 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1314 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1315 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1316 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1317 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1318 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1319 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1320 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1321 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1322 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1323 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1324 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1325 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1326 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1327 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1328 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1329 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1330 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1331 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1332 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1333 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1334 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1335 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1336 (prefix_table): Add EXxEVexR to FMA table entries.
1337 (OP_Rounding): Move abort() invocation.
1338 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1339 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1340 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1341 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1342 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1343 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1344 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1345 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1346 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1347 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1349 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1350 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1351 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1352 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1353 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1354 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1355 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1356 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1357 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1358 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1359 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1360 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1361 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1362 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1363 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1364 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1365 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1366 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1367 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1368 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1369 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1370 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1371 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1372 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1373 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1374 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1375 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1376 Delete table entries.
1377 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1378 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1379 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1382 2020-07-06 Jan Beulich <jbeulich@suse.com>
1384 * i386-dis.c (EXqScalarS): Delete.
1385 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1386 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1388 2020-07-06 Jan Beulich <jbeulich@suse.com>
1390 * i386-dis.c (safe-ctype.h): Include.
1391 (EXdScalar, EXqScalar): Delete.
1392 (d_scalar_mode, q_scalar_mode): Delete.
1393 (prefix_table, vex_len_table): Use EXxmm_md in place of
1394 EXdScalar and EXxmm_mq in place of EXqScalar.
1395 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1396 d_scalar_mode and q_scalar_mode.
1397 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1398 (vmovsd): Use EXxmm_mq.
1400 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1403 * arc-dis.c: Fix spelling mistake.
1404 * po/opcodes.pot: Regenerate.
1406 2020-07-06 Nick Clifton <nickc@redhat.com>
1408 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1409 * po/uk.po: Updated Ukranian translation.
1411 2020-07-04 Nick Clifton <nickc@redhat.com>
1413 * configure: Regenerate.
1414 * po/opcodes.pot: Regenerate.
1416 2020-07-04 Nick Clifton <nickc@redhat.com>
1418 Binutils 2.35 branch created.
1420 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1422 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1423 * i386-opc.h (VexSwapSources): New.
1424 (i386_opcode_modifier): Add vexswapsources.
1425 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1426 with two source operands swapped.
1427 * i386-tbl.h: Regenerated.
1429 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1431 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1432 unprivileged CSR can also be initialized.
1434 2020-06-29 Alan Modra <amodra@gmail.com>
1436 * arm-dis.c: Use C style comments.
1437 * cr16-opc.c: Likewise.
1438 * ft32-dis.c: Likewise.
1439 * moxie-opc.c: Likewise.
1440 * tic54x-dis.c: Likewise.
1441 * s12z-opc.c: Remove useless comment.
1442 * xgate-dis.c: Likewise.
1444 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1446 * i386-opc.tbl: Add a blank line.
1448 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1450 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1451 (VecSIB128): Renamed to ...
1453 (VecSIB256): Renamed to ...
1455 (VecSIB512): Renamed to ...
1457 (VecSIB): Renamed to ...
1459 (i386_opcode_modifier): Replace vecsib with sib.
1460 * i386-opc.tbl (VecSIB128): New.
1461 (VecSIB256): Likewise.
1462 (VecSIB512): Likewise.
1463 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1464 and VecSIB512, respectively.
1466 2020-06-26 Jan Beulich <jbeulich@suse.com>
1468 * i386-dis.c: Adjust description of I macro.
1469 (x86_64_table): Drop use of I.
1470 (float_mem): Replace use of I.
1471 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1473 2020-06-26 Jan Beulich <jbeulich@suse.com>
1475 * i386-dis.c: (print_insn): Avoid straight assignment to
1476 priv.orig_sizeflag when processing -M sub-options.
1478 2020-06-25 Jan Beulich <jbeulich@suse.com>
1480 * i386-dis.c: Adjust description of J macro.
1481 (dis386, x86_64_table, mod_table): Replace J.
1482 (putop): Remove handling of J.
1484 2020-06-25 Jan Beulich <jbeulich@suse.com>
1486 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1488 2020-06-25 Jan Beulich <jbeulich@suse.com>
1490 * i386-dis.c: Adjust description of "LQ" macro.
1491 (dis386_twobyte): Use LQ for sysret.
1492 (putop): Adjust handling of LQ.
1494 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1496 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1497 * riscv-dis.c: Include elfxx-riscv.h.
1499 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1501 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1503 2020-06-17 Lili Cui <lili.cui@intel.com>
1505 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1507 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1510 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1511 * i386-opc.tbl: Likewise.
1512 * i386-tbl.h: Regenerated.
1514 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1516 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1518 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1520 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1521 (SR_CORE): Likewise.
1522 (SR_FEAT): Likewise.
1524 (SR_V8_1): Likewise.
1525 (SR_V8_2): Likewise.
1526 (SR_V8_3): Likewise.
1527 (SR_V8_4): Likewise.
1530 (SR_SSBS): Likewise.
1532 (SR_ID_PFR2): Likewise.
1533 (SR_PROFILE): Likewise.
1534 (SR_MEMTAG): Likewise.
1535 (SR_SCXTNUM): Likewise.
1536 (aarch64_sys_regs): Refactor to store feature information in the table.
1537 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1538 that now describe their own features.
1539 (aarch64_pstatefield_supported_p): Likewise.
1541 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1543 * i386-dis.c (prefix_table): Fix a typo in comments.
1545 2020-06-09 Jan Beulich <jbeulich@suse.com>
1547 * i386-dis.c (rex_ignored): Delete.
1548 (ckprefix): Drop rex_ignored initialization.
1549 (get_valid_dis386): Drop setting of rex_ignored.
1550 (print_insn): Drop checking of rex_ignored. Don't record data
1551 size prefix as used with VEX-and-alike encodings.
1553 2020-06-09 Jan Beulich <jbeulich@suse.com>
1555 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1556 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1557 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1558 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1559 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1560 VEX_0F12, and VEX_0F16.
1561 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1562 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1563 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1564 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1565 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1566 MOD_VEX_0F16_PREFIX_2 entries.
1568 2020-06-09 Jan Beulich <jbeulich@suse.com>
1570 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1571 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1572 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1573 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1574 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1575 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1576 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1577 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1578 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1579 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1580 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1581 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1582 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1583 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1584 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1585 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1586 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1587 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1588 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1589 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1590 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1591 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1592 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1593 EVEX_W_0FC6_P_2): Delete.
1594 (print_insn): Add EVEX.W vs embedded prefix consistency check
1595 to prefix validation.
1596 * i386-dis-evex.h (evex_table): Don't further descend for
1597 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1598 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1600 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1601 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1602 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1603 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1604 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1605 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1606 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1607 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1608 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1609 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1610 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1611 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1612 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1613 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1614 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1615 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1616 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1617 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1618 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1619 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1620 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1621 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1622 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1623 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1624 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1625 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1626 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1628 2020-06-09 Jan Beulich <jbeulich@suse.com>
1630 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1631 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1632 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1634 (print_insn): Drop pointless check against bad_opcode. Split
1635 prefix validation into legacy and VEX-and-alike parts.
1636 (putop): Re-work 'X' macro handling.
1638 2020-06-09 Jan Beulich <jbeulich@suse.com>
1640 * i386-dis.c (MOD_0F51): Rename to ...
1641 (MOD_0F50): ... this.
1643 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1645 * arm-dis.c (arm_opcodes): Add dfb.
1646 (thumb32_opcodes): Add dfb.
1648 2020-06-08 Jan Beulich <jbeulich@suse.com>
1650 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1652 2020-06-06 Alan Modra <amodra@gmail.com>
1654 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1656 2020-06-05 Alan Modra <amodra@gmail.com>
1658 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1659 size is large enough.
1661 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1663 * disassemble.c (disassemble_init_for_target): Set endian_code for
1665 * bpf-desc.c: Regenerate.
1666 * bpf-opc.c: Likewise.
1667 * bpf-dis.c: Likewise.
1669 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1671 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1672 (cgen_put_insn_value): Likewise.
1673 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1674 * cgen-dis.in (print_insn): Likewise.
1675 * cgen-ibld.in (insert_1): Likewise.
1676 (insert_1): Likewise.
1677 (insert_insn_normal): Likewise.
1678 (extract_1): Likewise.
1679 * bpf-dis.c: Regenerate.
1680 * bpf-ibld.c: Likewise.
1681 * bpf-ibld.c: Likewise.
1682 * cgen-dis.in: Likewise.
1683 * cgen-ibld.in: Likewise.
1684 * cgen-opc.c: Likewise.
1685 * epiphany-dis.c: Likewise.
1686 * epiphany-ibld.c: Likewise.
1687 * fr30-dis.c: Likewise.
1688 * fr30-ibld.c: Likewise.
1689 * frv-dis.c: Likewise.
1690 * frv-ibld.c: Likewise.
1691 * ip2k-dis.c: Likewise.
1692 * ip2k-ibld.c: Likewise.
1693 * iq2000-dis.c: Likewise.
1694 * iq2000-ibld.c: Likewise.
1695 * lm32-dis.c: Likewise.
1696 * lm32-ibld.c: Likewise.
1697 * m32c-dis.c: Likewise.
1698 * m32c-ibld.c: Likewise.
1699 * m32r-dis.c: Likewise.
1700 * m32r-ibld.c: Likewise.
1701 * mep-dis.c: Likewise.
1702 * mep-ibld.c: Likewise.
1703 * mt-dis.c: Likewise.
1704 * mt-ibld.c: Likewise.
1705 * or1k-dis.c: Likewise.
1706 * or1k-ibld.c: Likewise.
1707 * xc16x-dis.c: Likewise.
1708 * xc16x-ibld.c: Likewise.
1709 * xstormy16-dis.c: Likewise.
1710 * xstormy16-ibld.c: Likewise.
1712 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1714 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1715 (print_insn_): Handle instruction endian.
1716 * bpf-dis.c: Regenerate.
1717 * bpf-desc.c: Regenerate.
1718 * epiphany-dis.c: Likewise.
1719 * epiphany-desc.c: Likewise.
1720 * fr30-dis.c: Likewise.
1721 * fr30-desc.c: Likewise.
1722 * frv-dis.c: Likewise.
1723 * frv-desc.c: Likewise.
1724 * ip2k-dis.c: Likewise.
1725 * ip2k-desc.c: Likewise.
1726 * iq2000-dis.c: Likewise.
1727 * iq2000-desc.c: Likewise.
1728 * lm32-dis.c: Likewise.
1729 * lm32-desc.c: Likewise.
1730 * m32c-dis.c: Likewise.
1731 * m32c-desc.c: Likewise.
1732 * m32r-dis.c: Likewise.
1733 * m32r-desc.c: Likewise.
1734 * mep-dis.c: Likewise.
1735 * mep-desc.c: Likewise.
1736 * mt-dis.c: Likewise.
1737 * mt-desc.c: Likewise.
1738 * or1k-dis.c: Likewise.
1739 * or1k-desc.c: Likewise.
1740 * xc16x-dis.c: Likewise.
1741 * xc16x-desc.c: Likewise.
1742 * xstormy16-dis.c: Likewise.
1743 * xstormy16-desc.c: Likewise.
1745 2020-06-03 Nick Clifton <nickc@redhat.com>
1747 * po/sr.po: Updated Serbian translation.
1749 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1751 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1752 (riscv_get_priv_spec_class): Likewise.
1754 2020-06-01 Alan Modra <amodra@gmail.com>
1756 * bpf-desc.c: Regenerate.
1758 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1759 David Faust <david.faust@oracle.com>
1761 * bpf-desc.c: Regenerate.
1762 * bpf-opc.h: Likewise.
1763 * bpf-opc.c: Likewise.
1764 * bpf-dis.c: Likewise.
1766 2020-05-28 Alan Modra <amodra@gmail.com>
1768 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1771 2020-05-28 Alan Modra <amodra@gmail.com>
1773 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1775 (print_insn_ns32k): Revert last change.
1777 2020-05-28 Nick Clifton <nickc@redhat.com>
1779 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1782 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1784 Fix extraction of signed constants in nios2 disassembler (again).
1786 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1787 extractions of signed fields.
1789 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1791 * s390-opc.txt: Relocate vector load/store instructions with
1792 additional alignment parameter and change architecture level
1793 constraint from z14 to z13.
1795 2020-05-21 Alan Modra <amodra@gmail.com>
1797 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1798 * sparc-dis.c: Likewise.
1799 * tic4x-dis.c: Likewise.
1800 * xtensa-dis.c: Likewise.
1801 * bpf-desc.c: Regenerate.
1802 * epiphany-desc.c: Regenerate.
1803 * fr30-desc.c: Regenerate.
1804 * frv-desc.c: Regenerate.
1805 * ip2k-desc.c: Regenerate.
1806 * iq2000-desc.c: Regenerate.
1807 * lm32-desc.c: Regenerate.
1808 * m32c-desc.c: Regenerate.
1809 * m32r-desc.c: Regenerate.
1810 * mep-asm.c: Regenerate.
1811 * mep-desc.c: Regenerate.
1812 * mt-desc.c: Regenerate.
1813 * or1k-desc.c: Regenerate.
1814 * xc16x-desc.c: Regenerate.
1815 * xstormy16-desc.c: Regenerate.
1817 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1819 * riscv-opc.c (riscv_ext_version_table): The table used to store
1820 all information about the supported spec and the corresponding ISA
1821 versions. Currently, only Zicsr is supported to verify the
1822 correctness of Z sub extension settings. Others will be supported
1823 in the future patches.
1824 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1825 classes and the corresponding strings.
1826 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1827 spec class by giving a ISA spec string.
1828 * riscv-opc.c (struct priv_spec_t): New structure.
1829 (struct priv_spec_t priv_specs): List for all supported privilege spec
1830 classes and the corresponding strings.
1831 (riscv_get_priv_spec_class): New function. Get the corresponding
1832 privilege spec class by giving a spec string.
1833 (riscv_get_priv_spec_name): New function. Get the corresponding
1834 privilege spec string by giving a CSR version class.
1835 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1836 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1837 according to the chosen version. Build a hash table riscv_csr_hash to
1838 store the valid CSR for the chosen pirv verison. Dump the direct
1839 CSR address rather than it's name if it is invalid.
1840 (parse_riscv_dis_option_without_args): New function. Parse the options
1842 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1843 parse the options without arguments first, and then handle the options
1844 with arguments. Add the new option -Mpriv-spec, which has argument.
1845 * riscv-dis.c (print_riscv_disassembler_options): Add description
1846 about the new OBJDUMP option.
1848 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1850 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1851 WC values on POWER10 sync, dcbf and wait instructions.
1852 (insert_pl, extract_pl): New functions.
1853 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1854 (LS3): New , 3-bit L for sync.
1855 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1856 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1857 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1858 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1859 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1860 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1861 <wait>: Enable PL operand on POWER10.
1862 <dcbf>: Enable L3OPT operand on POWER10.
1863 <sync>: Enable SC2 operand on POWER10.
1865 2020-05-19 Stafford Horne <shorne@gmail.com>
1868 * or1k-asm.c: Regenerate.
1869 * or1k-desc.c: Regenerate.
1870 * or1k-desc.h: Regenerate.
1871 * or1k-dis.c: Regenerate.
1872 * or1k-ibld.c: Regenerate.
1873 * or1k-opc.c: Regenerate.
1874 * or1k-opc.h: Regenerate.
1875 * or1k-opinst.c: Regenerate.
1877 2020-05-11 Alan Modra <amodra@gmail.com>
1879 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1882 2020-05-11 Alan Modra <amodra@gmail.com>
1884 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1885 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1887 2020-05-11 Alan Modra <amodra@gmail.com>
1889 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1891 2020-05-11 Alan Modra <amodra@gmail.com>
1893 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1894 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1896 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1898 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1901 2020-05-11 Alan Modra <amodra@gmail.com>
1903 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1904 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1905 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1906 (prefix_opcodes): Add xxeval.
1908 2020-05-11 Alan Modra <amodra@gmail.com>
1910 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1911 xxgenpcvwm, xxgenpcvdm.
1913 2020-05-11 Alan Modra <amodra@gmail.com>
1915 * ppc-opc.c (MP, VXVAM_MASK): Define.
1916 (VXVAPS_MASK): Use VXVA_MASK.
1917 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1918 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1919 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1920 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1922 2020-05-11 Alan Modra <amodra@gmail.com>
1923 Peter Bergner <bergner@linux.ibm.com>
1925 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1927 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1928 YMSK2, XA6a, XA6ap, XB6a entries.
1929 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1930 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1932 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1933 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1934 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1935 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1936 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1937 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1938 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1939 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1940 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1941 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1942 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1943 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1944 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1945 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1947 2020-05-11 Alan Modra <amodra@gmail.com>
1949 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1950 (insert_xts, extract_xts): New functions.
1951 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1952 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1953 (VXRC_MASK, VXSH_MASK): Define.
1954 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1955 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1956 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1957 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1958 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1959 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1960 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1962 2020-05-11 Alan Modra <amodra@gmail.com>
1964 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1965 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1966 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1967 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1968 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1970 2020-05-11 Alan Modra <amodra@gmail.com>
1972 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1973 (XTP, DQXP, DQXP_MASK): Define.
1974 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1975 (prefix_opcodes): Add plxvp and pstxvp.
1977 2020-05-11 Alan Modra <amodra@gmail.com>
1979 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1980 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1981 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1983 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1985 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1987 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1989 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1991 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1993 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1995 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1997 2020-05-11 Alan Modra <amodra@gmail.com>
1999 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
2001 2020-05-11 Alan Modra <amodra@gmail.com>
2003 * ppc-dis.c (ppc_opts): Add "power10" entry.
2004 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
2005 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
2007 2020-05-11 Nick Clifton <nickc@redhat.com>
2009 * po/fr.po: Updated French translation.
2011 2020-04-30 Alex Coplan <alex.coplan@arm.com>
2013 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
2014 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
2015 (operand_general_constraint_met_p): validate
2016 AARCH64_OPND_UNDEFINED.
2017 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
2019 * aarch64-asm-2.c: Regenerated.
2020 * aarch64-dis-2.c: Regenerated.
2021 * aarch64-opc-2.c: Regenerated.
2023 2020-04-29 Nick Clifton <nickc@redhat.com>
2026 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
2029 2020-04-29 Nick Clifton <nickc@redhat.com>
2031 * po/sv.po: Updated Swedish translation.
2033 2020-04-29 Nick Clifton <nickc@redhat.com>
2036 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
2037 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
2038 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
2041 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
2044 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
2045 cmpi only on m68020up and cpu32.
2047 2020-04-20 Sudakshina Das <sudi.das@arm.com>
2049 * aarch64-asm.c (aarch64_ins_none): New.
2050 * aarch64-asm.h (ins_none): New declaration.
2051 * aarch64-dis.c (aarch64_ext_none): New.
2052 * aarch64-dis.h (ext_none): New declaration.
2053 * aarch64-opc.c (aarch64_print_operand): Update case for
2054 AARCH64_OPND_BARRIER_PSB.
2055 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
2056 (AARCH64_OPERANDS): Update inserter/extracter for
2057 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
2058 * aarch64-asm-2.c: Regenerated.
2059 * aarch64-dis-2.c: Regenerated.
2060 * aarch64-opc-2.c: Regenerated.
2062 2020-04-20 Sudakshina Das <sudi.das@arm.com>
2064 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
2065 (aarch64_feature_ras, RAS): Likewise.
2066 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
2067 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
2068 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
2069 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
2070 * aarch64-asm-2.c: Regenerated.
2071 * aarch64-dis-2.c: Regenerated.
2072 * aarch64-opc-2.c: Regenerated.
2074 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
2076 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
2077 (print_insn_neon): Support disassembly of conditional
2080 2020-02-16 David Faust <david.faust@oracle.com>
2082 * bpf-desc.c: Regenerate.
2083 * bpf-desc.h: Likewise.
2084 * bpf-opc.c: Regenerate.
2085 * bpf-opc.h: Likewise.
2087 2020-04-07 Lili Cui <lili.cui@intel.com>
2089 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
2090 (prefix_table): New instructions (see prefixes above).
2091 (rm_table): Likewise
2092 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
2093 CPU_ANY_TSXLDTRK_FLAGS.
2094 (cpu_flags): Add CpuTSXLDTRK.
2095 * i386-opc.h (enum): Add CpuTSXLDTRK.
2096 (i386_cpu_flags): Add cputsxldtrk.
2097 * i386-opc.tbl: Add XSUSPLDTRK insns.
2098 * i386-init.h: Regenerate.
2099 * i386-tbl.h: Likewise.
2101 2020-04-02 Lili Cui <lili.cui@intel.com>
2103 * i386-dis.c (prefix_table): New instructions serialize.
2104 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
2105 CPU_ANY_SERIALIZE_FLAGS.
2106 (cpu_flags): Add CpuSERIALIZE.
2107 * i386-opc.h (enum): Add CpuSERIALIZE.
2108 (i386_cpu_flags): Add cpuserialize.
2109 * i386-opc.tbl: Add SERIALIZE insns.
2110 * i386-init.h: Regenerate.
2111 * i386-tbl.h: Likewise.
2113 2020-03-26 Alan Modra <amodra@gmail.com>
2115 * disassemble.h (opcodes_assert): Declare.
2116 (OPCODES_ASSERT): Define.
2117 * disassemble.c: Don't include assert.h. Include opintl.h.
2118 (opcodes_assert): New function.
2119 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
2120 (bfd_h8_disassemble): Reduce size of data array. Correctly
2121 calculate maxlen. Omit insn decoding when insn length exceeds
2122 maxlen. Exit from nibble loop when looking for E, before
2123 accessing next data byte. Move processing of E outside loop.
2124 Replace tests of maxlen in loop with assertions.
2126 2020-03-26 Alan Modra <amodra@gmail.com>
2128 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
2130 2020-03-25 Alan Modra <amodra@gmail.com>
2132 * z80-dis.c (suffix): Init mybuf.
2134 2020-03-22 Alan Modra <amodra@gmail.com>
2136 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
2137 successflly read from section.
2139 2020-03-22 Alan Modra <amodra@gmail.com>
2141 * arc-dis.c (find_format): Use ISO C string concatenation rather
2142 than line continuation within a string. Don't access needs_limm
2143 before testing opcode != NULL.
2145 2020-03-22 Alan Modra <amodra@gmail.com>
2147 * ns32k-dis.c (print_insn_arg): Update comment.
2148 (print_insn_ns32k): Reduce size of index_offset array, and
2149 initialize, passing -1 to print_insn_arg for args that are not
2150 an index. Don't exit arg loop early. Abort on bad arg number.
2152 2020-03-22 Alan Modra <amodra@gmail.com>
2154 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
2155 * s12z-opc.c: Formatting.
2156 (operands_f): Return an int.
2157 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
2158 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
2159 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
2160 (exg_sex_discrim): Likewise.
2161 (create_immediate_operand, create_bitfield_operand),
2162 (create_register_operand_with_size, create_register_all_operand),
2163 (create_register_all16_operand, create_simple_memory_operand),
2164 (create_memory_operand, create_memory_auto_operand): Don't
2165 segfault on malloc failure.
2166 (z_ext24_decode): Return an int status, negative on fail, zero
2168 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
2169 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
2170 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
2171 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
2172 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
2173 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
2174 (loop_primitive_decode, shift_decode, psh_pul_decode),
2175 (bit_field_decode): Similarly.
2176 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
2177 to return value, update callers.
2178 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
2179 Don't segfault on NULL operand.
2180 (decode_operation): Return OP_INVALID on first fail.
2181 (decode_s12z): Check all reads, returning -1 on fail.
2183 2020-03-20 Alan Modra <amodra@gmail.com>
2185 * metag-dis.c (print_insn_metag): Don't ignore status from
2188 2020-03-20 Alan Modra <amodra@gmail.com>
2190 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
2191 Initialize parts of buffer not written when handling a possible
2192 2-byte insn at end of section. Don't attempt decoding of such
2193 an insn by the 4-byte machinery.
2195 2020-03-20 Alan Modra <amodra@gmail.com>
2197 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
2198 partially filled buffer. Prevent lookup of 4-byte insns when
2199 only VLE 2-byte insns are possible due to section size. Print
2200 ".word" rather than ".long" for 2-byte leftovers.
2202 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
2205 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
2207 2020-03-13 Jan Beulich <jbeulich@suse.com>
2209 * i386-dis.c (X86_64_0D): Rename to ...
2210 (X86_64_0E): ... this.
2212 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
2214 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
2215 * Makefile.in: Regenerated.
2217 2020-03-09 Jan Beulich <jbeulich@suse.com>
2219 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
2221 * i386-tbl.h: Re-generate.
2223 2020-03-09 Jan Beulich <jbeulich@suse.com>
2225 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
2226 vprot*, vpsha*, and vpshl*.
2227 * i386-tbl.h: Re-generate.
2229 2020-03-09 Jan Beulich <jbeulich@suse.com>
2231 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
2232 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
2233 * i386-tbl.h: Re-generate.
2235 2020-03-09 Jan Beulich <jbeulich@suse.com>
2237 * i386-gen.c (set_bitfield): Ignore zero-length field names.
2238 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
2239 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
2240 * i386-tbl.h: Re-generate.
2242 2020-03-09 Jan Beulich <jbeulich@suse.com>
2244 * i386-gen.c (struct template_arg, struct template_instance,
2245 struct template_param, struct template, templates,
2246 parse_template, expand_templates): New.
2247 (process_i386_opcodes): Various local variables moved to
2248 expand_templates. Call parse_template and expand_templates.
2249 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
2250 * i386-tbl.h: Re-generate.
2252 2020-03-06 Jan Beulich <jbeulich@suse.com>
2254 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
2255 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
2256 register and memory source templates. Replace VexW= by VexW*
2258 * i386-tbl.h: Re-generate.
2260 2020-03-06 Jan Beulich <jbeulich@suse.com>
2262 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
2263 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
2264 * i386-tbl.h: Re-generate.
2266 2020-03-06 Jan Beulich <jbeulich@suse.com>
2268 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
2269 * i386-tbl.h: Re-generate.
2271 2020-03-06 Jan Beulich <jbeulich@suse.com>
2273 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
2274 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
2275 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
2276 VexW0 on SSE2AVX variants.
2277 (vmovq): Drop NoRex64 from XMM/XMM variants.
2278 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
2279 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
2280 applicable use VexW0.
2281 * i386-tbl.h: Re-generate.
2283 2020-03-06 Jan Beulich <jbeulich@suse.com>
2285 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
2286 * i386-opc.h (Rex64): Delete.
2287 (struct i386_opcode_modifier): Remove rex64 field.
2288 * i386-opc.tbl (crc32): Drop Rex64.
2289 Replace Rex64 with Size64 everywhere else.
2290 * i386-tbl.h: Re-generate.
2292 2020-03-06 Jan Beulich <jbeulich@suse.com>
2294 * i386-dis.c (OP_E_memory): Exclude recording of used address
2295 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
2296 addressed memory operands for MPX insns.
2298 2020-03-06 Jan Beulich <jbeulich@suse.com>
2300 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2301 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2302 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2303 (ptwrite): Split into non-64-bit and 64-bit forms.
2304 * i386-tbl.h: Re-generate.
2306 2020-03-06 Jan Beulich <jbeulich@suse.com>
2308 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2310 * i386-tbl.h: Re-generate.
2312 2020-03-04 Jan Beulich <jbeulich@suse.com>
2314 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2315 (prefix_table): Move vmmcall here. Add vmgexit.
2316 (rm_table): Replace vmmcall entry by prefix_table[] escape.
2317 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2318 (cpu_flags): Add CpuSEV_ES entry.
2319 * i386-opc.h (CpuSEV_ES): New.
2320 (union i386_cpu_flags): Add cpusev_es field.
2321 * i386-opc.tbl (vmgexit): New.
2322 * i386-init.h, i386-tbl.h: Re-generate.
2324 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2326 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2328 * i386-opc.h (IGNORESIZE): New.
2329 (DEFAULTSIZE): Likewise.
2330 (IgnoreSize): Removed.
2331 (DefaultSize): Likewise.
2332 (MnemonicSize): New.
2333 (i386_opcode_modifier): Replace ignoresize/defaultsize with
2335 * i386-opc.tbl (IgnoreSize): New.
2336 (DefaultSize): Likewise.
2337 * i386-tbl.h: Regenerated.
2339 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2342 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2345 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2348 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2349 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2350 * i386-tbl.h: Regenerated.
2352 2020-02-26 Alan Modra <amodra@gmail.com>
2354 * aarch64-asm.c: Indent labels correctly.
2355 * aarch64-dis.c: Likewise.
2356 * aarch64-gen.c: Likewise.
2357 * aarch64-opc.c: Likewise.
2358 * alpha-dis.c: Likewise.
2359 * i386-dis.c: Likewise.
2360 * nds32-asm.c: Likewise.
2361 * nfp-dis.c: Likewise.
2362 * visium-dis.c: Likewise.
2364 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2366 * arc-regs.h (int_vector_base): Make it available for all ARC
2369 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2371 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2374 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2376 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2377 c.mv/c.li if rs1 is zero.
2379 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2381 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2382 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2384 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2385 * i386-opc.h (CpuABM): Removed.
2387 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2388 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2389 popcnt. Remove CpuABM from lzcnt.
2390 * i386-init.h: Regenerated.
2391 * i386-tbl.h: Likewise.
2393 2020-02-17 Jan Beulich <jbeulich@suse.com>
2395 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2396 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2397 VexW1 instead of open-coding them.
2398 * i386-tbl.h: Re-generate.
2400 2020-02-17 Jan Beulich <jbeulich@suse.com>
2402 * i386-opc.tbl (AddrPrefixOpReg): Define.
2403 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2404 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2405 templates. Drop NoRex64.
2406 * i386-tbl.h: Re-generate.
2408 2020-02-17 Jan Beulich <jbeulich@suse.com>
2411 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2412 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2413 into Intel syntax instance (with Unpsecified) and AT&T one
2415 (vcvtneps2bf16): Likewise, along with folding the two so far
2417 * i386-tbl.h: Re-generate.
2419 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2421 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2422 CPU_ANY_SSE4A_FLAGS.
2424 2020-02-17 Alan Modra <amodra@gmail.com>
2426 * i386-gen.c (cpu_flag_init): Correct last change.
2428 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2430 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2433 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2435 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2438 2020-02-14 Jan Beulich <jbeulich@suse.com>
2441 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2442 destination for Cpu64-only variant.
2443 (movzx): Fold patterns.
2444 * i386-tbl.h: Re-generate.
2446 2020-02-13 Jan Beulich <jbeulich@suse.com>
2448 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2449 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2450 CPU_ANY_SSE4_FLAGS entry.
2451 * i386-init.h: Re-generate.
2453 2020-02-12 Jan Beulich <jbeulich@suse.com>
2455 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2456 with Unspecified, making the present one AT&T syntax only.
2457 * i386-tbl.h: Re-generate.
2459 2020-02-12 Jan Beulich <jbeulich@suse.com>
2461 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2462 * i386-tbl.h: Re-generate.
2464 2020-02-12 Jan Beulich <jbeulich@suse.com>
2467 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2468 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2469 Amd64 and Intel64 templates.
2470 (call, jmp): Likewise for far indirect variants. Dro
2472 * i386-tbl.h: Re-generate.
2474 2020-02-11 Jan Beulich <jbeulich@suse.com>
2476 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2477 * i386-opc.h (ShortForm): Delete.
2478 (struct i386_opcode_modifier): Remove shortform field.
2479 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2480 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2481 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2482 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2484 * i386-tbl.h: Re-generate.
2486 2020-02-11 Jan Beulich <jbeulich@suse.com>
2488 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2489 fucompi): Drop ShortForm from operand-less templates.
2490 * i386-tbl.h: Re-generate.
2492 2020-02-11 Alan Modra <amodra@gmail.com>
2494 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2495 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2496 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2497 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2498 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2500 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2502 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2503 (cde_opcodes): Add VCX* instructions.
2505 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2506 Matthew Malcomson <matthew.malcomson@arm.com>
2508 * arm-dis.c (struct cdeopcode32): New.
2509 (CDE_OPCODE): New macro.
2510 (cde_opcodes): New disassembly table.
2511 (regnames): New option to table.
2512 (cde_coprocs): New global variable.
2513 (print_insn_cde): New
2514 (print_insn_thumb32): Use print_insn_cde.
2515 (parse_arm_disassembler_options): Parse coprocN args.
2517 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2520 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2522 * i386-opc.h (AMD64): Removed.
2523 (Intel64): Likewose.
2525 (INTEL64): Likewise.
2526 (INTEL64ONLY): Likewise.
2527 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2528 * i386-opc.tbl (Amd64): New.
2529 (Intel64): Likewise.
2530 (Intel64Only): Likewise.
2531 Replace AMD64 with Amd64. Update sysenter/sysenter with
2532 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2533 * i386-tbl.h: Regenerated.
2535 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2538 * z80-dis.c: Add support for GBZ80 opcodes.
2540 2020-02-04 Alan Modra <amodra@gmail.com>
2542 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2544 2020-02-03 Alan Modra <amodra@gmail.com>
2546 * m32c-ibld.c: Regenerate.
2548 2020-02-01 Alan Modra <amodra@gmail.com>
2550 * frv-ibld.c: Regenerate.
2552 2020-01-31 Jan Beulich <jbeulich@suse.com>
2554 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2555 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2556 (OP_E_memory): Replace xmm_mdq_mode case label by
2557 vex_scalar_w_dq_mode one.
2558 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2560 2020-01-31 Jan Beulich <jbeulich@suse.com>
2562 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2563 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2564 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2565 (intel_operand_size): Drop vex_w_dq_mode case label.
2567 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2569 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2570 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2572 2020-01-30 Alan Modra <amodra@gmail.com>
2574 * m32c-ibld.c: Regenerate.
2576 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2578 * bpf-opc.c: Regenerate.
2580 2020-01-30 Jan Beulich <jbeulich@suse.com>
2582 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2583 (dis386): Use them to replace C2/C3 table entries.
2584 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2585 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2586 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2587 * i386-tbl.h: Re-generate.
2589 2020-01-30 Jan Beulich <jbeulich@suse.com>
2591 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2593 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2595 * i386-tbl.h: Re-generate.
2597 2020-01-30 Alan Modra <amodra@gmail.com>
2599 * tic4x-dis.c (tic4x_dp): Make unsigned.
2601 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2602 Jan Beulich <jbeulich@suse.com>
2605 * i386-dis.c (MOVSXD_Fixup): New function.
2606 (movsxd_mode): New enum.
2607 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2608 (intel_operand_size): Handle movsxd_mode.
2609 (OP_E_register): Likewise.
2611 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2612 register on movsxd. Add movsxd with 16-bit destination register
2613 for AMD64 and Intel64 ISAs.
2614 * i386-tbl.h: Regenerated.
2616 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2619 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2620 * aarch64-asm-2.c: Regenerate
2621 * aarch64-dis-2.c: Likewise.
2622 * aarch64-opc-2.c: Likewise.
2624 2020-01-21 Jan Beulich <jbeulich@suse.com>
2626 * i386-opc.tbl (sysret): Drop DefaultSize.
2627 * i386-tbl.h: Re-generate.
2629 2020-01-21 Jan Beulich <jbeulich@suse.com>
2631 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2633 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2634 * i386-tbl.h: Re-generate.
2636 2020-01-20 Nick Clifton <nickc@redhat.com>
2638 * po/de.po: Updated German translation.
2639 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2640 * po/uk.po: Updated Ukranian translation.
2642 2020-01-20 Alan Modra <amodra@gmail.com>
2644 * hppa-dis.c (fput_const): Remove useless cast.
2646 2020-01-20 Alan Modra <amodra@gmail.com>
2648 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2650 2020-01-18 Nick Clifton <nickc@redhat.com>
2652 * configure: Regenerate.
2653 * po/opcodes.pot: Regenerate.
2655 2020-01-18 Nick Clifton <nickc@redhat.com>
2657 Binutils 2.34 branch created.
2659 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2661 * opintl.h: Fix spelling error (seperate).
2663 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2665 * i386-opc.tbl: Add {vex} pseudo prefix.
2666 * i386-tbl.h: Regenerated.
2668 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2671 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2672 (neon_opcodes): Likewise.
2673 (select_arm_features): Make sure we enable MVE bits when selecting
2674 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2677 2020-01-16 Jan Beulich <jbeulich@suse.com>
2679 * i386-opc.tbl: Drop stale comment from XOP section.
2681 2020-01-16 Jan Beulich <jbeulich@suse.com>
2683 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2684 (extractps): Add VexWIG to SSE2AVX forms.
2685 * i386-tbl.h: Re-generate.
2687 2020-01-16 Jan Beulich <jbeulich@suse.com>
2689 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2690 Size64 from and use VexW1 on SSE2AVX forms.
2691 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2692 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2693 * i386-tbl.h: Re-generate.
2695 2020-01-15 Alan Modra <amodra@gmail.com>
2697 * tic4x-dis.c (tic4x_version): Make unsigned long.
2698 (optab, optab_special, registernames): New file scope vars.
2699 (tic4x_print_register): Set up registernames rather than
2700 malloc'd registertable.
2701 (tic4x_disassemble): Delete optable and optable_special. Use
2702 optab and optab_special instead. Throw away old optab,
2703 optab_special and registernames when info->mach changes.
2705 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2708 * z80-dis.c (suffix): Use .db instruction to generate double
2711 2020-01-14 Alan Modra <amodra@gmail.com>
2713 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2714 values to unsigned before shifting.
2716 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2718 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2720 (print_insn_thumb16, print_insn_thumb32): Likewise.
2721 (print_insn): Initialize the insn info.
2722 * i386-dis.c (print_insn): Initialize the insn info fields, and
2725 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2727 * arc-opc.c (C_NE): Make it required.
2729 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2731 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2732 reserved register name.
2734 2020-01-13 Alan Modra <amodra@gmail.com>
2736 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2737 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2739 2020-01-13 Alan Modra <amodra@gmail.com>
2741 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2742 result of wasm_read_leb128 in a uint64_t and check that bits
2743 are not lost when copying to other locals. Use uint32_t for
2744 most locals. Use PRId64 when printing int64_t.
2746 2020-01-13 Alan Modra <amodra@gmail.com>
2748 * score-dis.c: Formatting.
2749 * score7-dis.c: Formatting.
2751 2020-01-13 Alan Modra <amodra@gmail.com>
2753 * score-dis.c (print_insn_score48): Use unsigned variables for
2754 unsigned values. Don't left shift negative values.
2755 (print_insn_score32): Likewise.
2756 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2758 2020-01-13 Alan Modra <amodra@gmail.com>
2760 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2762 2020-01-13 Alan Modra <amodra@gmail.com>
2764 * fr30-ibld.c: Regenerate.
2766 2020-01-13 Alan Modra <amodra@gmail.com>
2768 * xgate-dis.c (print_insn): Don't left shift signed value.
2769 (ripBits): Formatting, use 1u.
2771 2020-01-10 Alan Modra <amodra@gmail.com>
2773 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2774 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2776 2020-01-10 Alan Modra <amodra@gmail.com>
2778 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2779 and XRREG value earlier to avoid a shift with negative exponent.
2780 * m10200-dis.c (disassemble): Similarly.
2782 2020-01-09 Nick Clifton <nickc@redhat.com>
2785 * z80-dis.c (ld_ii_ii): Use correct cast.
2787 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2790 * z80-dis.c (ld_ii_ii): Use character constant when checking
2793 2020-01-09 Jan Beulich <jbeulich@suse.com>
2795 * i386-dis.c (SEP_Fixup): New.
2797 (dis386_twobyte): Use it for sysenter/sysexit.
2798 (enum x86_64_isa): Change amd64 enumerator to value 1.
2799 (OP_J): Compare isa64 against intel64 instead of amd64.
2800 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2802 * i386-tbl.h: Re-generate.
2804 2020-01-08 Alan Modra <amodra@gmail.com>
2806 * z8k-dis.c: Include libiberty.h
2807 (instr_data_s): Make max_fetched unsigned.
2808 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2809 Don't exceed byte_info bounds.
2810 (output_instr): Make num_bytes unsigned.
2811 (unpack_instr): Likewise for nibl_count and loop.
2812 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2814 * z8k-opc.h: Regenerate.
2816 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2818 * arc-tbl.h (llock): Use 'LLOCK' as class.
2820 (scond): Use 'SCOND' as class.
2822 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2825 2020-01-06 Alan Modra <amodra@gmail.com>
2827 * m32c-ibld.c: Regenerate.
2829 2020-01-06 Alan Modra <amodra@gmail.com>
2832 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2833 Peek at next byte to prevent recursion on repeated prefix bytes.
2834 Ensure uninitialised "mybuf" is not accessed.
2835 (print_insn_z80): Don't zero n_fetch and n_used here,..
2836 (print_insn_z80_buf): ..do it here instead.
2838 2020-01-04 Alan Modra <amodra@gmail.com>
2840 * m32r-ibld.c: Regenerate.
2842 2020-01-04 Alan Modra <amodra@gmail.com>
2844 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2846 2020-01-04 Alan Modra <amodra@gmail.com>
2848 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2850 2020-01-04 Alan Modra <amodra@gmail.com>
2852 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2854 2020-01-03 Jan Beulich <jbeulich@suse.com>
2856 * aarch64-tbl.h (aarch64_opcode_table): Use
2857 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2859 2020-01-03 Jan Beulich <jbeulich@suse.com>
2861 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2862 forms of SUDOT and USDOT.
2864 2020-01-03 Jan Beulich <jbeulich@suse.com>
2866 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2868 * opcodes/aarch64-dis-2.c: Re-generate.
2870 2020-01-03 Jan Beulich <jbeulich@suse.com>
2872 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2874 * opcodes/aarch64-dis-2.c: Re-generate.
2876 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2878 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2880 2020-01-01 Alan Modra <amodra@gmail.com>
2882 Update year range in copyright notice of all files.
2884 For older changes see ChangeLog-2019
2886 Copyright (C) 2020 Free Software Foundation, Inc.
2888 Copying and distribution of this file, with or without modification,
2889 are permitted in any medium without royalty provided the copyright
2890 notice and this notice are preserved.
2896 version-control: never
projects / deliverable / binutils-gdb.git / blob