1 2020-02-01 Alan Modra <amodra@gmail.com>
3 * frv-ibld.c: Regenerate.
5 2020-01-31 Jan Beulich <jbeulich@suse.com>
7 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
8 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
9 (OP_E_memory): Replace xmm_mdq_mode case label by
10 vex_scalar_w_dq_mode one.
11 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
13 2020-01-31 Jan Beulich <jbeulich@suse.com>
15 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
16 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
17 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
18 (intel_operand_size): Drop vex_w_dq_mode case label.
20 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
22 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
23 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
25 2020-01-30 Alan Modra <amodra@gmail.com>
27 * m32c-ibld.c: Regenerate.
29 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
31 * bpf-opc.c: Regenerate.
33 2020-01-30 Jan Beulich <jbeulich@suse.com>
35 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
36 (dis386): Use them to replace C2/C3 table entries.
37 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
38 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
39 ones. Use Size64 instead of DefaultSize on Intel64 ones.
40 * i386-tbl.h: Re-generate.
42 2020-01-30 Jan Beulich <jbeulich@suse.com>
44 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
46 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
48 * i386-tbl.h: Re-generate.
50 2020-01-30 Alan Modra <amodra@gmail.com>
52 * tic4x-dis.c (tic4x_dp): Make unsigned.
54 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
55 Jan Beulich <jbeulich@suse.com>
58 * i386-dis.c (MOVSXD_Fixup): New function.
59 (movsxd_mode): New enum.
60 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
61 (intel_operand_size): Handle movsxd_mode.
62 (OP_E_register): Likewise.
64 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
65 register on movsxd. Add movsxd with 16-bit destination register
66 for AMD64 and Intel64 ISAs.
67 * i386-tbl.h: Regenerated.
69 2020-01-27 Tamar Christina <tamar.christina@arm.com>
72 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
73 * aarch64-asm-2.c: Regenerate
74 * aarch64-dis-2.c: Likewise.
75 * aarch64-opc-2.c: Likewise.
77 2020-01-21 Jan Beulich <jbeulich@suse.com>
79 * i386-opc.tbl (sysret): Drop DefaultSize.
80 * i386-tbl.h: Re-generate.
82 2020-01-21 Jan Beulich <jbeulich@suse.com>
84 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
86 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
87 * i386-tbl.h: Re-generate.
89 2020-01-20 Nick Clifton <nickc@redhat.com>
91 * po/de.po: Updated German translation.
92 * po/pt_BR.po: Updated Brazilian Portuguese translation.
93 * po/uk.po: Updated Ukranian translation.
95 2020-01-20 Alan Modra <amodra@gmail.com>
97 * hppa-dis.c (fput_const): Remove useless cast.
99 2020-01-20 Alan Modra <amodra@gmail.com>
101 * arm-dis.c (print_insn_arm): Wrap 'T' value.
103 2020-01-18 Nick Clifton <nickc@redhat.com>
105 * configure: Regenerate.
106 * po/opcodes.pot: Regenerate.
108 2020-01-18 Nick Clifton <nickc@redhat.com>
110 Binutils 2.34 branch created.
112 2020-01-17 Christian Biesinger <cbiesinger@google.com>
114 * opintl.h: Fix spelling error (seperate).
116 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
118 * i386-opc.tbl: Add {vex} pseudo prefix.
119 * i386-tbl.h: Regenerated.
121 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
124 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
125 (neon_opcodes): Likewise.
126 (select_arm_features): Make sure we enable MVE bits when selecting
127 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
130 2020-01-16 Jan Beulich <jbeulich@suse.com>
132 * i386-opc.tbl: Drop stale comment from XOP section.
134 2020-01-16 Jan Beulich <jbeulich@suse.com>
136 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
137 (extractps): Add VexWIG to SSE2AVX forms.
138 * i386-tbl.h: Re-generate.
140 2020-01-16 Jan Beulich <jbeulich@suse.com>
142 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
143 Size64 from and use VexW1 on SSE2AVX forms.
144 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
145 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
146 * i386-tbl.h: Re-generate.
148 2020-01-15 Alan Modra <amodra@gmail.com>
150 * tic4x-dis.c (tic4x_version): Make unsigned long.
151 (optab, optab_special, registernames): New file scope vars.
152 (tic4x_print_register): Set up registernames rather than
153 malloc'd registertable.
154 (tic4x_disassemble): Delete optable and optable_special. Use
155 optab and optab_special instead. Throw away old optab,
156 optab_special and registernames when info->mach changes.
158 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
161 * z80-dis.c (suffix): Use .db instruction to generate double
164 2020-01-14 Alan Modra <amodra@gmail.com>
166 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
167 values to unsigned before shifting.
169 2020-01-13 Thomas Troeger <tstroege@gmx.de>
171 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
173 (print_insn_thumb16, print_insn_thumb32): Likewise.
174 (print_insn): Initialize the insn info.
175 * i386-dis.c (print_insn): Initialize the insn info fields, and
178 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
180 * arc-opc.c (C_NE): Make it required.
182 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
184 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
185 reserved register name.
187 2020-01-13 Alan Modra <amodra@gmail.com>
189 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
190 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
192 2020-01-13 Alan Modra <amodra@gmail.com>
194 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
195 result of wasm_read_leb128 in a uint64_t and check that bits
196 are not lost when copying to other locals. Use uint32_t for
197 most locals. Use PRId64 when printing int64_t.
199 2020-01-13 Alan Modra <amodra@gmail.com>
201 * score-dis.c: Formatting.
202 * score7-dis.c: Formatting.
204 2020-01-13 Alan Modra <amodra@gmail.com>
206 * score-dis.c (print_insn_score48): Use unsigned variables for
207 unsigned values. Don't left shift negative values.
208 (print_insn_score32): Likewise.
209 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
211 2020-01-13 Alan Modra <amodra@gmail.com>
213 * tic4x-dis.c (tic4x_print_register): Remove dead code.
215 2020-01-13 Alan Modra <amodra@gmail.com>
217 * fr30-ibld.c: Regenerate.
219 2020-01-13 Alan Modra <amodra@gmail.com>
221 * xgate-dis.c (print_insn): Don't left shift signed value.
222 (ripBits): Formatting, use 1u.
224 2020-01-10 Alan Modra <amodra@gmail.com>
226 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
227 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
229 2020-01-10 Alan Modra <amodra@gmail.com>
231 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
232 and XRREG value earlier to avoid a shift with negative exponent.
233 * m10200-dis.c (disassemble): Similarly.
235 2020-01-09 Nick Clifton <nickc@redhat.com>
238 * z80-dis.c (ld_ii_ii): Use correct cast.
240 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
243 * z80-dis.c (ld_ii_ii): Use character constant when checking
246 2020-01-09 Jan Beulich <jbeulich@suse.com>
248 * i386-dis.c (SEP_Fixup): New.
250 (dis386_twobyte): Use it for sysenter/sysexit.
251 (enum x86_64_isa): Change amd64 enumerator to value 1.
252 (OP_J): Compare isa64 against intel64 instead of amd64.
253 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
255 * i386-tbl.h: Re-generate.
257 2020-01-08 Alan Modra <amodra@gmail.com>
259 * z8k-dis.c: Include libiberty.h
260 (instr_data_s): Make max_fetched unsigned.
261 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
262 Don't exceed byte_info bounds.
263 (output_instr): Make num_bytes unsigned.
264 (unpack_instr): Likewise for nibl_count and loop.
265 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
267 * z8k-opc.h: Regenerate.
269 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
271 * arc-tbl.h (llock): Use 'LLOCK' as class.
273 (scond): Use 'SCOND' as class.
275 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
278 2020-01-06 Alan Modra <amodra@gmail.com>
280 * m32c-ibld.c: Regenerate.
282 2020-01-06 Alan Modra <amodra@gmail.com>
285 * z80-dis.c (suffix): Don't use a local struct buffer copy.
286 Peek at next byte to prevent recursion on repeated prefix bytes.
287 Ensure uninitialised "mybuf" is not accessed.
288 (print_insn_z80): Don't zero n_fetch and n_used here,..
289 (print_insn_z80_buf): ..do it here instead.
291 2020-01-04 Alan Modra <amodra@gmail.com>
293 * m32r-ibld.c: Regenerate.
295 2020-01-04 Alan Modra <amodra@gmail.com>
297 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
299 2020-01-04 Alan Modra <amodra@gmail.com>
301 * crx-dis.c (match_opcode): Avoid shift left of signed value.
303 2020-01-04 Alan Modra <amodra@gmail.com>
305 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
307 2020-01-03 Jan Beulich <jbeulich@suse.com>
309 * aarch64-tbl.h (aarch64_opcode_table): Use
310 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
312 2020-01-03 Jan Beulich <jbeulich@suse.com>
314 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
315 forms of SUDOT and USDOT.
317 2020-01-03 Jan Beulich <jbeulich@suse.com>
319 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
321 * opcodes/aarch64-dis-2.c: Re-generate.
323 2020-01-03 Jan Beulich <jbeulich@suse.com>
325 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
327 * opcodes/aarch64-dis-2.c: Re-generate.
329 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
331 * z80-dis.c: Add support for eZ80 and Z80 instructions.
333 2020-01-01 Alan Modra <amodra@gmail.com>
335 Update year range in copyright notice of all files.
337 For older changes see ChangeLog-2019
339 Copyright (C) 2020 Free Software Foundation, Inc.
341 Copying and distribution of this file, with or without modification,
342 are permitted in any medium without royalty provided the copyright
343 notice and this notice are preserved.
349 version-control: never