opcodes/ChangeLog

   1 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
   2
   3         * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
   4         rmr_el3; remove daifset and daifclr.
   5
   6 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
   7
   8         * aarch64-opc.c (operand_general_constraint_met_p): Change to check
   9         the alignment of addr.offset.imm instead of that of shifter.amount for
  10         operand type AARCH64_OPND_ADDR_UIMM12.
  11
  12 2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  13
  14         * arm-dis.c: Use preferred form of vrint instruction variants
  15         for disassembly.
  16
  17 2012-10-09  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
  18
  19         * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
  20         * i386-init.h: Regenerated.
  21
  22 2012-10-05  Peter Bergner  <bergner@vnet.ibm.com>
  23
  24         * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
  25         * ppc-opc.c (VBA): New define.
  26         (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
  27         mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
  28
  29 2012-10-04  Nick Clifton  <nickc@redhat.com>
  30
  31         * v850-dis.c (disassemble): Place square parentheses around second
  32         register operand of clr1, not1, set1 and tst1 instructions.
  33
  34 2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  35
  36         * s390-mkopc.c: Support new option zEC12.
  37         * s390-opc.c: Add new instruction formats.
  38         * s390-opc.txt: Add new instructions for zEC12.
  39
  40 2012-09-27  Anthony Green  <green@moxielogic.com>
  41
  42         * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
  43         * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
  44
  45 2012-09-25  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
  46
  47         * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
  48         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
  49         and CPU_BTVER2_FLAGS.
  50         * i386-init.h: Regenerated.
  51
  52 2012-09-20  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
  53
  54         * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
  55         CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
  56         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
  57         CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
  58         (cpu_flags): Add CpuCX16.
  59         * i386-opc.h (CpuCX16): New.
  60         (i386_cpu_flags): Add cpucx16.
  61         * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
  62         * i386-tbl.h: Regenerate.
  63         * i386-init.h: Likewise.
  64
  65 2012-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  66
  67         * arm-dis.c: Changed ldra and strl-form mnemonics
  68         to lda and stl-form.
  69
  70 2012-09-18  Chao-ying Fu  <fu@mips.com>
  71
  72         * micromips-opc.c (micromips_opcodes): Correct the encoding of
  73         the "swxc1" instruction.
  74
  75 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
  76
  77         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
  78         the parameter 'inst'.
  79         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
  80         (convert_mov_to_movewide): Change to assert (0) when
  81         aarch64_wide_constant_p returns FALSE.
  82
  83 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
  84
  85         * configure: Regenerate.
  86
  87 2012-09-14  Anthony Green  <green@moxielogic.com>
  88
  89         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
  90         the address after the branch instruction.
  91
  92 2012-09-13  Anthony Green  <green@moxielogic.com>
  93
  94         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
  95
  96 2012-09-10  Matthias Klose  <doko@ubuntu.com>
  97
  98         * config.in: Disable sanity check for kfreebsd.
  99
 100 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
 101
 102         * configure: Regenerated.
 103
 104 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
 105
 106         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
 107         * ia64-gen.c: Promote completer index type to longlong.
 108         (irf_operand): Add new register recognition.
 109         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
 110         (lookup_specifier): Add new resource recognition.
 111         (insert_bit_table_ent): Relax abort condition according to the
 112         changed completer index type.
 113         (print_dis_table): Fix printf format for completer index.
 114         * ia64-ic.tbl: Add a new instruction class.
 115         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
 116         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
 117         * ia64-opc.h: Define short names for new operand types.
 118         * ia64-raw.tbl: Add new RAW resource for DAHR register.
 119         * ia64-waw.tbl: Add new WAW resource for DAHR register.
 120         * ia64-asmtab.c: Regenerate.
 121
 122 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
 123
 124         * ppc-opc.c (VXASHB_MASK): New define.
 125         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
 126
 127 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
 128
 129         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
 130         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
 131         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
 132         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
 133         vupklsh>: Use VXVA_MASK.
 134         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
 135         <mfvscr>: Use VXVAVB_MASK.
 136         <mtvscr>: Use VXVDVA_MASK.
 137         <vspltb>: Use VXUIMM4_MASK.
 138         <vsplth>: Use VXUIMM3_MASK.
 139         <vspltw>: Use VXUIMM2_MASK.
 140
 141 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 142
 143         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
 144
 145 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 146
 147         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
 148
 149 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 150
 151         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
 152
 153 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 154
 155         * arm-dis.c (neon_opcodes): Add support for AES instructions.
 156
 157 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 158
 159         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
 160         conversions.
 161
 162 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
 163
 164         * arm-dis.c (coprocessor_opcodes): Add VRINT.
 165         (neon_opcodes): Likewise.
 166
 167 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 168
 169         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
 170         variants.
 171         (neon_opcodes): Likewise.
 172
 173 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 174
 175         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 176         (neon_opcodes): Likewise.
 177
 178 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 179
 180         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 181         (print_insn_coprocessor): Add new %<>c bitfield format
 182         specifier.
 183
 184 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 185
 186         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 187         (thumb32_opcodes): Likewise.
 188         (print_arm_insn): Add support for %<>T formatter.
 189
 190 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 191
 192         * arm-dis.c (arm_opcodes): Add HLT.
 193         (thumb_opcodes): Likewise.
 194
 195 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 196
 197         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 198
 199 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 200
 201         * arm-dis.c (arm_opcodes): Add SEVL.
 202         (thumb_opcodes): Likewise.
 203         (thumb32_opcodes): Likewise.
 204
 205 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 206
 207         * arm-dis.c (data_barrier_option): New function.
 208         (print_insn_arm): Use data_barrier_option.
 209         (print_insn_thumb32): Use data_barrier_option.
 210
 211 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 212
 213         * arm-dis.c (COND_UNCOND): New constant.
 214         (print_insn_coprocessor): Add support for %u format specifier.
 215         (print_insn_neon): Likewise.
 216
 217 2012-08-21  David S. Miller  <davem@davemloft.net>
 218
 219         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 220         F3F4 macro.
 221
 222 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 223
 224         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 225         vabsduh, vabsduw, mviwsplt.
 226
 227 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 228
 229         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 230         CPU_BTVER2_FLAGS.
 231
 232         * i386-opc.h: Update CpuPRFCHW comment.
 233
 234         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 235         * i386-init.h: Regenerated.
 236         * i386-tbl.h: Likewise.
 237
 238 2012-08-17  Nick Clifton  <nickc@redhat.com>
 239
 240         * po/uk.po: New Ukranian translation.
 241         * configure.in (ALL_LINGUAS): Add uk.
 242         * configure: Regenerate.
 243
 244 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 245
 246         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 247         RBX for the third operand.
 248         <"lswi">: Use RAX for second and NBI for the third operand.
 249
 250 2012-08-15  DJ Delorie  <dj@redhat.com>
 251
 252         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 253         operands, so that data addresses can be corrected when not
 254         ES-overridden.
 255         * rl78-decode.c: Regenerate.
 256         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 257         irrelevent.  When the 'e' specifier is used on an operand and no
 258         ES prefix is provided, adjust address to make it absolute.
 259
 260 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 261
 262         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 263
 264 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 265
 266         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 267
 268 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 269
 270         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 271         macros, use local variables for info struct member accesses,
 272         update the type of the variable used to hold the instruction
 273         word.
 274         (print_insn_mips, print_mips16_insn_arg): Likewise.
 275         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 276         local variables for info struct member accesses.
 277         (print_insn_micromips): Add GET_OP_S local macro.
 278         (_print_insn_mips): Update the type of the variable used to hold
 279         the instruction word.
 280
 281 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 282             Laurent Desnogues  <laurent.desnogues@arm.com>
 283             Jim MacArthur  <jim.macarthur@arm.com>
 284             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 285             Nigel Stephens  <nigel.stephens@arm.com>
 286             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 287             Richard Earnshaw  <rearnsha@arm.com>
 288             Sofiane Naci  <sofiane.naci@arm.com>
 289             Tejas Belagod  <tejas.belagod@arm.com>
 290             Yufeng Zhang  <yufeng.zhang@arm.com>
 291
 292         * Makefile.am: Add AArch64.
 293         * Makefile.in: Regenerate.
 294         * aarch64-asm.c: New file.
 295         * aarch64-asm.h: New file.
 296         * aarch64-dis.c: New file.
 297         * aarch64-dis.h: New file.
 298         * aarch64-gen.c: New file.
 299         * aarch64-opc.c: New file.
 300         * aarch64-opc.h: New file.
 301         * aarch64-tbl.h: New file.
 302         * configure.in: Add AArch64.
 303         * configure: Regenerate.
 304         * disassemble.c: Add AArch64.
 305         * aarch64-asm-2.c: New file (automatically generated).
 306         * aarch64-dis-2.c: New file (automatically generated).
 307         * aarch64-opc-2.c: New file (automatically generated).
 308         * po/POTFILES.in: Regenerate.
 309
 310 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 311
 312         * micromips-opc.c (micromips_opcodes): Update comment.
 313         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 314         instructions for IOCT as appropriate.
 315         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 316         opcode_is_member.
 317         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 318         the result of a check for the -Wno-missing-field-initializers
 319         GCC option.
 320         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 321         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 322         compilation.
 323         (mips16-opc.lo): Likewise.
 324         (micromips-opc.lo): Likewise.
 325         * aclocal.m4: Regenerate.
 326         * configure: Regenerate.
 327         * Makefile.in: Regenerate.
 328
 329 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 330
 331         PR gas/14423
 332         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 333         * i386-init.h: Regenerated.
 334
 335 2012-08-09  Nick Clifton  <nickc@redhat.com>
 336
 337         * po/vi.po: Updated Vietnamese translation.
 338
 339 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 340
 341         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 342         AMD-reserved cases as "prefetch".
 343         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 344         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 345         (reg_table): Use those under REG_0F18.
 346         (mod_table): Add those cases as "nop/reserved".
 347
 348 2012-08-07  Jan Beulich <jbeulich@suse.com>
 349
 350         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 351
 352 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 353
 354         * i386-dis.c (print_insn): Print spaces between multiple excess
 355         prefixes.  Return actual number of excess prefixes consumed,
 356         not always one.
 357
 358         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 359
 360 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 361             Victor Khimenko  <khim@google.com>
 362             H.J. Lu  <hongjiu.lu@intel.com>
 363
 364         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 365         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 366         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 367         (OP_E_register): Likewise.
 368         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 369
 370 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 371
 372         * configure.in: Formatting.
 373         * configure: Regenerate.
 374
 375 2012-08-01  Alan Modra  <amodra@gmail.com>
 376
 377         * h8300-dis.c: Fix printf arg warnings.
 378         * i960-dis.c: Likewise.
 379         * mips-dis.c: Likewise.
 380         * pdp11-dis.c: Likewise.
 381         * sh-dis.c: Likewise.
 382         * v850-dis.c: Likewise.
 383         * configure.in: Formatting.
 384         * configure: Regenerate.
 385         * rl78-decode.c: Regenerate.
 386         * po/POTFILES.in: Regenerate.
 387
 388 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 389             Catherine Moore  <clm@codesourcery.com>
 390             Maciej W. Rozycki  <macro@codesourcery.com>
 391
 392         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 393         (DSP_VOLA): Likewise.
 394         (D32, D33): Likewise.
 395         (micromips_opcodes): Add DSP ASE instructions.
 396         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 397         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 398
 399 2012-07-31  Jan Beulich <jbeulich@suse.com>
 400
 401         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 402         instruction group. Mark as requiring AVX2.
 403         * i386-tbl.h: Re-generate.
 404
 405 2012-07-30  Nick Clifton  <nickc@redhat.com>
 406
 407         * po/opcodes.pot: Updated template.
 408         * po/es.po: Updated Spanish translation.
 409         * po/fi.po: Updated Finnish translation.
 410
 411 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 412
 413         * configure.in (BFD_VERSION): Run bfd/configure --version and
 414         parse the output of that.
 415         * configure: Regenerate.
 416
 417 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 418
 419         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 420
 421 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 422             Dr David Alan Gilbert  <dave@treblig.org>
 423
 424         PR binutils/13135
 425         * arm-dis.c: Add necessary casts for printing integer values.
 426         Use %s when printing string values.
 427         * hppa-dis.c: Likewise.
 428         * m68k-dis.c: Likewise.
 429         * microblaze-dis.c: Likewise.
 430         * mips-dis.c: Likewise.
 431         * sparc-dis.c: Likewise.
 432
 433 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 434
 435         PR binutils/14355
 436         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 437         (VEX_LEN_0FXOP_08_CD): Likewise.
 438         (VEX_LEN_0FXOP_08_CE): Likewise.
 439         (VEX_LEN_0FXOP_08_CF): Likewise.
 440         (VEX_LEN_0FXOP_08_EC): Likewise.
 441         (VEX_LEN_0FXOP_08_ED): Likewise.
 442         (VEX_LEN_0FXOP_08_EE): Likewise.
 443         (VEX_LEN_0FXOP_08_EF): Likewise.
 444         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 445         vpcomub, vpcomuw, vpcomud, vpcomuq.
 446         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 447         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 448         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 449         VEX_LEN_0FXOP_08_EF.
 450
 451 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 452
 453         * i386-dis.c (PREFIX_0F38F6): New.
 454         (prefix_table): Add adcx, adox instructions.
 455         (three_byte_table): Use PREFIX_0F38F6.
 456         (mod_table): Add rdseed instruction.
 457         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 458         (cpu_flags): Likewise.
 459         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 460         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 461         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 462         prefetchw.
 463         * i386-tbl.h: Regenerate.
 464         * i386-init.h: Likewise.
 465
 466 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 467
 468         * mips-dis.c: Remove gratuitous newline.
 469
 470 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 471
 472         * xgate-dis.c: Removed an IF statement that will
 473         always be false due to overlapping operand masks.
 474         * xgate-opc.c: Corrected 'com' opcode entry and
 475         fixed spacing.
 476
 477 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 478
 479         * i386-opc.tbl: Add RepPrefixOk to nop.
 480         * i386-tbl.h: Regenerate.
 481
 482 2012-06-28  Nick Clifton  <nickc@redhat.com>
 483
 484         * po/vi.po: Updated Vietnamese translation.
 485
 486 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 487
 488         * i386-opc.tbl: Add RepPrefixOk to ret.
 489         * i386-tbl.h: Regenerate.
 490
 491         * i386-opc.h (RepPrefixOk): New enum constant.
 492         (i386_opcode_modifier): New bitfield 'repprefixok'.
 493         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 494         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 495         instructions that have IsString.
 496         * i386-tbl.h: Regenerate.
 497
 498 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 499
 500         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 501         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 502         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 503         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 504         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 505         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 506         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 507         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 508         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 509
 510 2012-05-19  Alan Modra  <amodra@gmail.com>
 511
 512         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 513         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 514
 515 2012-05-18  Alan Modra  <amodra@gmail.com>
 516
 517         * ia64-opc.c: Remove #include "ansidecl.h".
 518         * z8kgen.c: Include sysdep.h first.
 519
 520         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 521         * bfin-dis.c: Likewise.
 522         * i860-dis.c: Likewise.
 523         * ia64-dis.c: Likewise.
 524         * ia64-gen.c: Likewise.
 525         * m68hc11-dis.c: Likewise.
 526         * mmix-dis.c: Likewise.
 527         * msp430-dis.c: Likewise.
 528         * or32-dis.c: Likewise.
 529         * rl78-dis.c: Likewise.
 530         * rx-dis.c: Likewise.
 531         * tic4x-dis.c: Likewise.
 532         * tilegx-opc.c: Likewise.
 533         * tilepro-opc.c: Likewise.
 534         * rx-decode.c: Regenerate.
 535
 536 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 537
 538         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 539
 540 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 541
 542         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 543
 544 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 545             Nick Clifton  <nickc@redhat.com>
 546
 547         PR 14072
 548         * configure.in: Add check that sysdep.h has been included before
 549         any system header files.
 550         * configure: Regenerate.
 551         * config.in: Regenerate.
 552         * sysdep.h: Generate an error if included before config.h.
 553         * alpha-opc.c: Include sysdep.h before any other header file.
 554         * alpha-dis.c: Likewise.
 555         * avr-dis.c: Likewise.
 556         * cgen-opc.c: Likewise.
 557         * cr16-dis.c: Likewise.
 558         * cris-dis.c: Likewise.
 559         * crx-dis.c: Likewise.
 560         * d10v-dis.c: Likewise.
 561         * d10v-opc.c: Likewise.
 562         * d30v-dis.c: Likewise.
 563         * d30v-opc.c: Likewise.
 564         * h8500-dis.c: Likewise.
 565         * i370-dis.c: Likewise.
 566         * i370-opc.c: Likewise.
 567         * m10200-dis.c: Likewise.
 568         * m10300-dis.c: Likewise.
 569         * micromips-opc.c: Likewise.
 570         * mips-opc.c: Likewise.
 571         * mips61-opc.c: Likewise.
 572         * moxie-dis.c: Likewise.
 573         * or32-opc.c: Likewise.
 574         * pj-dis.c: Likewise.
 575         * ppc-dis.c: Likewise.
 576         * ppc-opc.c: Likewise.
 577         * s390-dis.c: Likewise.
 578         * sh-dis.c: Likewise.
 579         * sh64-dis.c: Likewise.
 580         * sparc-dis.c: Likewise.
 581         * sparc-opc.c: Likewise.
 582         * spu-dis.c: Likewise.
 583         * tic30-dis.c: Likewise.
 584         * tic54x-dis.c: Likewise.
 585         * tic80-dis.c: Likewise.
 586         * tic80-opc.c: Likewise.
 587         * tilegx-dis.c: Likewise.
 588         * tilepro-dis.c: Likewise.
 589         * v850-dis.c: Likewise.
 590         * v850-opc.c: Likewise.
 591         * vax-dis.c: Likewise.
 592         * w65-dis.c: Likewise.
 593         * xgate-dis.c: Likewise.
 594         * xtensa-dis.c: Likewise.
 595         * rl78-decode.opc: Likewise.
 596         * rl78-decode.c: Regenerate.
 597         * rx-decode.opc: Likewise.
 598         * rx-decode.c: Regenerate.
 599
 600 2012-05-17  Alan Modra  <amodra@gmail.com>
 601
 602         * ppc_dis.c: Don't include elf/ppc.h.
 603
 604 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 605
 606         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 607         to PUSH/POP {reg}.
 608
 609 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 610             Stephane Carrez <stcarrez@nerim.fr>
 611
 612         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 613         target.
 614         * disassemble.c: Likewise.
 615         * configure: Regenerate.
 616         * m68hc11-dis.c: Make objdump output more consistent, use hex
 617         instead of decimal and use 0x prefix for hex.
 618         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 619
 620 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 621
 622         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 623         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 624         (vle_opcd_indices): New array.
 625         (lookup_vle): New function.
 626         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 627         (print_insn_powerpc): Likewise.
 628         * ppc-opc.c: Likewise.
 629
 630 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 631             Maciej W. Rozycki  <macro@codesourcery.com>
 632             Rhonda Wittels  <rhonda@codesourcery.com>
 633             Nathan Froyd <froydnj@codesourcery.com>
 634
 635         * ppc-opc.c (insert_arx, extract_arx): New functions.
 636         (insert_ary, extract_ary): New functions.
 637         (insert_li20, extract_li20): New functions.
 638         (insert_rx, extract_rx): New functions.
 639         (insert_ry, extract_ry): New functions.
 640         (insert_sci8, extract_sci8): New functions.
 641         (insert_sci8n, extract_sci8n): New functions.
 642         (insert_sd4h, extract_sd4h): New functions.
 643         (insert_sd4w, extract_sd4w): New functions.
 644         (insert_vlesi, extract_vlesi): New functions.
 645         (insert_vlensi, extract_vlensi): New functions.
 646         (insert_vleui, extract_vleui): New functions.
 647         (insert_vleil, extract_vleil): New functions.
 648         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 649         (BI16, BI32, BO32, B8): New.
 650         (B15, B24, CRD32, CRS): New.
 651         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 652         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 653         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 654         (SH6_MASK): Use PPC_OPSHIFT_INV.
 655         (SI8, UI5, OIMM5, UI7, BO16): New.
 656         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 657         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 658         (ALLOW8_SPRG): New.
 659         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 660         (OPVUP, OPVUP_MASK OPVUP): New
 661         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 662         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 663         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 664         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 665         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 666         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 667         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 668         (SE_IM5, SE_IM5_MASK): New.
 669         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 670         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 671         (BO32DNZ, BO32DZ): New.
 672         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 673         (PPCVLE): New.
 674         (powerpc_opcodes): Add new VLE instructions.  Update existing
 675         instruction to include PPCVLE if supported.
 676         * ppc-dis.c (ppc_opts): Add vle entry.
 677         (get_powerpc_dialect): New function.
 678         (powerpc_init_dialect): VLE support.
 679         (print_insn_big_powerpc): Call get_powerpc_dialect.
 680         (print_insn_little_powerpc): Likewise.
 681         (operand_value_powerpc): Handle negative shift counts.
 682         (print_insn_powerpc): Handle 2-byte instruction lengths.
 683
 684 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 685
 686         PR binutils/14028
 687         * configure.in: Invoke ACX_HEADER_STRING.
 688         * configure: Regenerate.
 689         * config.in: Regenerate.
 690         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 691         string.h and strings.h.
 692
 693 2012-05-11  Nick Clifton  <nickc@redhat.com>
 694
 695         PR binutils/14006
 696         * arm-dis.c (print_insn): Fix detection of instruction mode in
 697         files containing multiple executable sections.
 698
 699 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 700
 701         * Makefile.in, configure: regenerate
 702         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 703         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 704         New functions.
 705         * configure.in: Recognize xgate.
 706         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 707         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 708         and opcode generation for xgate.
 709
 710 2012-04-30  DJ Delorie  <dj@redhat.com>
 711
 712         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 713         already the maximum bit size.
 714         * rx-decode.c: Regenerate.
 715
 716 2012-04-27  David S. Miller  <davem@davemloft.net>
 717
 718         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 719         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 720
 721         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 722         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 723
 724         * sparc-opc.c (CBCOND): New define.
 725         (CBCOND_XCC): Likewise.
 726         (cbcond): New helper macro.
 727         (sparc_opcodes): Add compare-and-branch instructions.
 728
 729         * sparc-dis.c (print_insn_sparc): Handle ')'.
 730         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 731
 732         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 733         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 734
 735 2012-04-12  David S. Miller  <davem@davemloft.net>
 736
 737         * sparc-dis.c (X_DISP10): Define.
 738         (print_insn_sparc): Handle '='.
 739
 740 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 741
 742         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 743         sprintf call and the '*' field width.
 744
 745 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 746
 747         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 748
 749 2012-03-16  Alan Modra  <amodra@gmail.com>
 750
 751         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 752         (powerpc_opcd_indices): Bump array size.
 753         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 754         corresponding to unused opcodes to following entry.
 755         (lookup_powerpc): New function, extracted and optimised from..
 756         (print_insn_powerpc): ..here.
 757
 758 2012-03-15  Alan Modra  <amodra@gmail.com>
 759             James Lemke  <jwlemke@codesourcery.com>
 760
 761         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 762         * ppc-dis.c (private): New var.
 763         (powerpc_init_dialect): Don't return calloc failure, instead use
 764         private.
 765         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 766         (powerpc_opcd_indices): New array.
 767         (disassemble_init_powerpc): New function.
 768         (print_insn_big_powerpc): Don't init dialect here.
 769         (print_insn_little_powerpc): Likewise.
 770         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 771
 772 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 773
 774         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 775         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 776         (PPCVEC2, PPCTMR, E6500): New short names.
 777         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 778         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 779         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 780         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 781         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 782         optional operands on sync instruction for E6500 target.
 783
 784 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 785
 786         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 787
 788 2012-02-27  Alan Modra  <amodra@gmail.com>
 789
 790         * mt-dis.c: Regenerate.
 791
 792 2012-02-27  Alan Modra  <amodra@gmail.com>
 793
 794         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 795         is the inverse of corresponding insert function.
 796         (extract_d22, extract_u9, extract_r4): Likewise.
 797         (extract_d9): Correct sign extension.
 798         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 799         rely on implementation defined behaviour for shift right of
 800         signed types.
 801         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 802         (extract_d23): Likewise, and correct mask.
 803
 804 2012-02-27  Alan Modra  <amodra@gmail.com>
 805
 806         * crx-dis.c (print_arg): Mask constant to 32 bits.
 807         * crx-opc.c (cst4_map): Use int array.
 808
 809 2012-02-27  Alan Modra  <amodra@gmail.com>
 810
 811         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 812         (FIELDD): Sign extend with xor,sub.
 813
 814 2012-02-25  Walter Lee  <walt@tilera.com>
 815
 816         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 817         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 818         TILEPRO_OPC_LW_TLS_SN.
 819
 820 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 821
 822         * i386-opc.h (HLEPrefixNone): New.
 823         (HLEPrefixLock): Likewise.
 824         (HLEPrefixAny): Likewise.
 825         (HLEPrefixRelease): Likewise.
 826
 827 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 828
 829         * i386-dis.c (HLE_Fixup1): New.
 830         (HLE_Fixup2): Likewise.
 831         (HLE_Fixup3): Likewise.
 832         (Ebh1): Likewise.
 833         (Evh1): Likewise.
 834         (Ebh2): Likewise.
 835         (Evh2): Likewise.
 836         (Ebh3): Likewise.
 837         (Evh3): Likewise.
 838         (MOD_C6_REG_7): Likewise.
 839         (MOD_C7_REG_7): Likewise.
 840         (RM_C6_REG_7): Likewise.
 841         (RM_C7_REG_7): Likewise.
 842         (XACQUIRE_PREFIX): Likewise.
 843         (XRELEASE_PREFIX): Likewise.
 844         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 845         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 846         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 847         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 848         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 849         MOD_C6_REG_7 and MOD_C7_REG_7.
 850         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 851         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 852         xtest.
 853         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 854         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 855
 856         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 857         CPU_RTM_FLAGS.
 858         (cpu_flags): Add CpuHLE and CpuRTM.
 859         (opcode_modifiers): Add HLEPrefixOk.
 860
 861         * i386-opc.h (CpuHLE): New.
 862         (CpuRTM): Likewise.
 863         (HLEPrefixOk): Likewise.
 864         (i386_cpu_flags): Add cpuhle and cpurtm.
 865         (i386_opcode_modifier): Add hleprefixok.
 866
 867         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 868         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 869         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 870         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 871         xtest.
 872         * i386-init.h: Regenerated.
 873         * i386-tbl.h: Likewise.
 874
 875 2012-01-24  DJ Delorie  <dj@redhat.com>
 876
 877         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 878         * rl78-decode.c: Regenerate.
 879
 880 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 881
 882         PR binutils/10173
 883         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 884
 885 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 886
 887         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 888         register and move them after pmove with PSR/PCSR register.
 889
 890 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 891
 892         * i386-dis.c (mod_table): Add vmfunc.
 893
 894         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 895         (cpu_flags): CpuVMFUNC.
 896
 897         * i386-opc.h (CpuVMFUNC): New.
 898         (i386_cpu_flags): Add cpuvmfunc.
 899
 900         * i386-opc.tbl: Add vmfunc.
 901         * i386-init.h: Regenerated.
 902         * i386-tbl.h: Likewise.
 903
 904 For older changes see ChangeLog-2011
 905 \f
 906 Local Variables:
 907 mode: change-log
 908 left-margin: 8
 909 fill-column: 74
 910 version-control: never
 911 End: