1 2007-01-04 Andreas Schwab <schwab@suse.de>
3 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
5 2007-01-04 Julian Brown <julian@codesourcery.com>
7 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
10 2006-12-27 Kazu Hirata <kazu@codesourcery.com>
12 * m68k-dis.c (print_insn_arg): Add support for cac and mbb.
14 2006-12-27 Kazu Hirata <kazu@codesourcery.com>
16 * m68k-opc.c (m68k_opcodes): Add sleep and trapx.
18 2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
20 * i386-dis.c (o_mode): New for 16-byte operand.
21 (intel_operand_size): Generate "OWORD PTR " for o_mode.
22 (CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
24 2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
26 * i386-dis.c (CMPXCHG8B_Fixup): New.
27 (grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
29 2006-12-11 H.J. Lu <hongjiu.lu@intel.com>
31 * i386-dis.c (Eq): Replaced by ...
33 (Ma): Defined with OP_M instead of OP_E.
34 (grps): Updated cmpxchg8b and vmptrst for Eq -> Mq.
35 (OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
37 2006-12-11 Daniel Jacobowitz <dan@codesourcery.com>
39 * po/Make-in (.po.gmo): Put gmo files in objdir.
41 2006-12-09 H.J. Lu <hongjiu.lu@intel.com>
43 * i386-dis.c (X86_64_1): New.
46 (dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64
48 (x86_64_table): Add entries for 0x60, 0x61 and 0x62.
50 2006-12-09 H.J. Lu <hongjiu.lu@intel.com>
52 * i386-dis.c: Adjust white spaces.
54 2006-12-04 Jan Beulich <jbeulich@novell.com>
56 * i386-dis.c (OP_J): Update used_prefixes in v_mode.
58 2006-11-30 Jan Beulich <jbeulich@novell.com>
60 * i386-dis.c (SEG_Fixup): Delete.
62 (putop): New suffix character 'D'.
65 (OP_SEG): Handle bytemode other than w_mode.
67 2006-11-30 Jan Beulich <jbeulich@novell.com>
69 * i386-dis.c (zAX): New.
74 (putop): New suffix character 'G'.
75 (dis386): Use it for in, out, ins, and outs.
76 (intel_operand_size): Handle z_mode.
77 (OP_REG): Delete unreachable case indir_dx_reg.
78 (OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle
80 (OP_ESreg): Fix Intel syntax operand size handling.
83 2006-11-30 Jan Beulich <jbeulich@novell.com>
85 * i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
86 (putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
87 used. For 'R' and 'W' suffix, simplify and fix Intel mode.
89 2006-11-29 Paul Brook <paul@codesourcery.com>
91 * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
93 2006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
95 * arm-dis.c (last_is_thumb): Delete.
96 (enum map_type, last_type): New.
97 (print_insn_data): New.
98 (get_sym_code_type): Take MAP_TYPE argument. Check the type of
99 the right symbol. Handle $d.
100 (print_insn): Check for mapping symbols even without a normal
101 symbol. Adjust searching. If $d is found see how much data
102 to print. Handle data.
104 2006-11-16 Nathan Sidwell <nathan@codesourcery.com>
106 * m68k-opc.c (m68k_opcodes): Place trap instructions before set
107 conditionals. Add tpf coldfire instruction as alias for trapf.
109 2006-11-09 H.J. Lu <hongjiu.lu@intel.com>
111 * i386-dis.c (print_insn): Check PREFIX_REPNZ before
112 PREFIX_DATA when prefix user table is used.
114 2006-11-09 H.J. Lu <hongjiu.lu@intel.com>
116 * i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
117 (twobyte_uses_DATA_prefix): This.
118 (twobyte_uses_REPNZ_prefix): New.
119 (twobyte_uses_REPZ_prefix): Likewise.
120 (threebyte_0x38_uses_DATA_prefix): Likewise.
121 (threebyte_0x38_uses_REPNZ_prefix): Likewise.
122 (threebyte_0x38_uses_REPZ_prefix): Likewise.
123 (threebyte_0x3a_uses_DATA_prefix): Likewise.
124 (threebyte_0x3a_uses_REPNZ_prefix): Likewise.
125 (threebyte_0x3a_uses_REPZ_prefix): Likewise.
126 (print_insn): Updated checking usages of DATA/REPNZ/REPZ
129 2006-11-06 Troy Rollo <troy@corvu.com.au>
131 * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
133 2006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
135 * score-opc.h (score_opcodes): Delete modifier '0x'.
137 2006-10-30 Paul Brook <paul@codesourcery.com>
139 * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
140 (get_sym_code_type): New function.
141 (print_insn): Search for mapping symbols.
143 2006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
145 * score-dis.c (print_insn): Correct the error code to print
146 correct PCE instruction disassembly.
148 2006-10-26 Ben Elliston <bje@au.ibm.com>
149 Anton Blanchard <anton@samba.org>
150 Peter Bergner <bergner@vnet.ibm.com>
152 * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
153 AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
155 (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
156 "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
157 Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
158 "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
159 "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
160 "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
161 "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
162 "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
163 "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
164 "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
165 "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
166 "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
167 "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
168 "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
169 "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
170 "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
171 "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
172 "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
173 "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
174 "diexq" and "diexq." opcodes.
176 2006-10-26 Daniel Jacobowitz <dan@codesourcery.com>
178 * h8300-dis.c (bfd_h8_disassemble): Add missing consts.
180 2006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
181 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
182 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
183 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
184 Alan Modra <amodra@bigpond.net.au>
186 * spu-dis.c: New file.
187 * spu-opc.c: New file.
188 * configure.in: Add SPU support.
189 * disassemble.c: Likewise.
190 * Makefile.am: Likewise. Run "make dep-am".
191 * Makefile.in: Regenerate.
192 * configure: Regenerate.
193 * po/POTFILES.in: Regenerate.
195 2006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
197 * ppc-opc.c (CELL): New define.
198 (powerpc_opcodes): Enable hrfid for Cell. Add ldbrx and stdbrx,
199 cell specific instructions. Add {st,l}x{r,l}{,l} cell specific
201 * ppc-dis.c (powerpc_dialect): Handle cell.
203 2006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
205 * i386-dis.c (dis386): Add support for the change in POPCNT opcode in
206 amdfam10 architecture.
208 (print_insn): Disallow REP prefix for POPCNT.
210 2006-10-20 Andrew Stubbs <andrew.stubbs@st.com>
212 * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
215 2006-10-18 Dave Brolley <brolley@redhat.com>
217 * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
218 * configure: Regenerated.
220 2006-09-29 Alan Modra <amodra@bigpond.net.au>
222 * po/POTFILES.in: Regenerate.
224 2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
225 Joseph Myers <joseph@codesourcery.com>
226 Ian Lance Taylor <ian@wasabisystems.com>
227 Ben Elliston <bje@wasabisystems.com>
229 * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
230 only be used with the default multiply-add operation, so if N is
231 set, don't bother printing X. Add new iwmmxt instructions.
232 (IWMMXT_INSN_COUNT): Update.
233 (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
235 (print_insn_coprocessor): Check for iWMMXt2. Handle format
238 2006-09-24 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
241 * i386-dis.c (prefix_user_table): Fix the second operand of
242 maskmovdqu instruction to allow only %xmm register instead of
243 both %xmm register and memory.
245 2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
248 * i386-dis.c (OP_OFF64): Get 32bit offset if there is an
251 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
253 * score-dis.c: New file.
254 * score-opc.h: New file.
255 * Makefile.am: Add Score files.
256 * Makefile.in: Regenerate.
257 * configure.in: Add support for Score target.
258 * configure: Regenerate.
259 * disassemble.c: Add support for Score target.
261 2006-09-16 Nick Clifton <nickc@redhat.com>
262 Pedro Alves <pedro_alves@portugalmail.pt>
264 * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
265 macros defined in bfd.h.
266 * cris-dis.c: Likewise.
267 * h8300-dis.c: Likewise.
268 * i386-dis.c: Likewise.
269 * ia64-gen.c: Likewise.
270 * mips-dis: Likewise.
272 2006-09-04 Paul Brook <paul@codesourcery.com>
274 * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
276 2006-08-23 H.J. Lu <hongjiu.lu@intel.com>
278 * i386-dis.c (three_byte_table): Expand to 256 elements.
280 2006-08-04 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
283 * i386-dis.c (MXC,EMC): Define.
284 (OP_MXC): New function to handle cvt* (convert instructions) between
285 %xmm and %mm register correctly.
287 (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
288 instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
291 2006-07-29 Richard Sandiford <richard@codesourcery.com>
293 * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
296 2006-07-19 Paul Brook <paul@codesourcery.com>
298 * armd-dis.c (arm_opcodes): Fix rbit opcode.
300 2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
302 * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
303 "sldt", "str" and "smsw".
305 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
308 * i386-dis.c (GRP11_C6): NEW.
309 (GRP11_C7): Likewise.
316 (GRPPADLCK1): Likewise.
317 (GRPPADLCK2): Likewise.
318 (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
320 (grps): Add entries for GRP11_C6 and GRP11_C7.
322 2006-07-10 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
323 Michael Meissner <michael.meissner@amd.com>
325 * i386-dis.c (dis386): Add support for 4 operand instructions. Add
326 support for amdfam10 SSE4a/ABM instructions. Modify all
327 initializer macros to have additional arguments. Disallow REP
328 prefix for non-string instructions.
331 2006-07-05 Julian Brown <julian@codesourcery.com>
333 * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
335 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
337 * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
338 (twobyte_has_modrm): Set 1 for 0x1f.
340 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
342 * i386-dis.c (NOP_Fixup): Removed.
344 (NOP_Fixup2): Likewise.
345 (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
347 2006-06-12 Julian Brown <julian@codesourcery.com>
349 * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
352 2006-06-10 H.J. Lu <hongjiu.lu@intel.com>
354 * i386.c (GRP10): Renamed to ...
356 (GRP11): Renamed to ...
358 (GRP12): Renamed to ...
360 (GRP13): Renamed to ...
362 (GRP14): Renamed to ...
364 (dis386_twobyte): Updated.
367 2006-06-09 Nick Clifton <nickc@redhat.com>
369 * po/fi.po: Updated Finnish translation.
371 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
373 * po/Make-in (pdf, ps): New dummy targets.
375 2006-06-06 Paul Brook <paul@codesourcery.com>
377 * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
379 (neon_opcodes): Add conditional execution specifiers.
380 (thumb_opcodes): Ditto.
381 (thumb32_opcodes): Ditto.
382 (arm_conditional): Change 0xe to "al" and add "" to end.
383 (ifthen_state, ifthen_next_state, ifthen_address): New.
384 (IFTHEN_COND): Define.
385 (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
386 (print_insn_arm): Change %c to use new values of arm_conditional.
387 (print_insn_thumb16): Print thumb conditions. Add %I.
388 (print_insn_thumb32): Print thumb conditions.
389 (find_ifthen_state): New function.
390 (print_insn): Track IT block state.
392 2006-06-06 Ben Elliston <bje@au.ibm.com>
393 Anton Blanchard <anton@samba.org>
394 Peter Bergner <bergner@vnet.ibm.com>
396 * ppc-dis.c (powerpc_dialect): Handle power6 option.
397 (print_ppc_disassembler_options): Mention power6.
399 2006-06-06 Thiemo Seufer <ths@mips.com>
400 Chao-ying Fu <fu@mips.com>
402 * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
403 * mips-opc.c: Add DSP64 instructions.
405 2006-06-06 Alan Modra <amodra@bigpond.net.au>
407 * m68hc11-dis.c (print_insn): Warning fix.
409 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
411 * po/Make-in (top_builddir): Define.
413 2006-06-05 Alan Modra <amodra@bigpond.net.au>
415 * Makefile.am: Run "make dep-am".
416 * Makefile.in: Regenerate.
417 * config.in: Regenerate.
419 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
421 * Makefile.am (INCLUDES): Use @INCINTL@.
422 * acinclude.m4: Include new gettext macros.
423 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
424 Remove local code for po/Makefile.
425 * Makefile.in, aclocal.m4, configure: Regenerated.
427 2006-05-30 Nick Clifton <nickc@redhat.com>
429 * po/es.po: Updated Spanish translation.
431 2006-05-25 Richard Sandiford <richard@codesourcery.com>
433 * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
434 and fmovem entries. Put register list entries before immediate
435 mask entries. Use "l" rather than "L" in the fmovem entries.
436 * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
438 (m68k_scan_mask): New function, split out from...
439 (print_insn_m68k): ...here. If no architecture has been set,
440 first try printing an m680x0 instruction, then try a Coldfire one.
442 2006-05-24 Nick Clifton <nickc@redhat.com>
444 * po/ga.po: Updated Irish translation.
446 2006-05-22 Nick Clifton <nickc@redhat.com>
448 * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
450 2006-05-22 Nick Clifton <nickc@redhat.com>
452 * po/nl.po: Updated translation.
454 2006-05-18 Alan Modra <amodra@bigpond.net.au>
456 * avr-dis.c: Formatting fix.
458 2006-05-14 Thiemo Seufer <ths@mips.com>
460 * mips16-opc.c (I1, I32, I64): New shortcut defines.
461 (mips16_opcodes): Change membership of instructions to their
464 2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
466 * i386-dis.c (grps): Update sgdt/sidt for 64bit.
468 2006-05-05 Julian Brown <julian@codesourcery.com>
470 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
473 2006-05-05 Thiemo Seufer <ths@mips.com>
474 David Ung <davidu@mips.com>
476 * mips-opc.c: Add macro for cache instruction.
478 2006-05-04 Thiemo Seufer <ths@mips.com>
479 Nigel Stephens <nigel@mips.com>
480 David Ung <davidu@mips.com>
482 * mips-dis.c (mips_arch_choices): Add smartmips instruction
483 decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
484 2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
486 * mips-opc.c: fix random typos in comments.
487 (INSN_SMARTMIPS): New defines.
488 (mips_builtin_opcodes): Add paired single support for MIPS32R2.
489 Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
490 flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
491 FP_S and FP_D flags to denote single and double register
492 accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
493 Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
494 for MIPS32R2. Add SmartMIPS instructions. Add two-argument
495 variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
497 * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
499 2006-05-03 Thiemo Seufer <ths@mips.com>
501 * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
503 2006-05-02 Thiemo Seufer <ths@mips.com>
504 Nigel Stephens <nigel@mips.com>
505 David Ung <davidu@mips.com>
507 * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
508 (print_mips16_insn_arg): Force mips16 to odd addresses.
510 2006-04-30 Thiemo Seufer <ths@mips.com>
511 David Ung <davidu@mips.com>
513 * mips-opc.c (mips_builtin_opcodes): Add udi instructions
515 * mips-dis.c (print_insn_args): Adds udi argument handling.
517 2006-04-28 James E Wilson <wilson@specifix.com>
519 * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
522 2006-04-28 Thiemo Seufer <ths@mips.com>
523 David Ung <davidu@mips.com>
524 Nigel Stephens <nigel@mips.com>
526 * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
529 2006-04-28 Thiemo Seufer <ths@mips.com>
530 Nigel Stephens <nigel@mips.com>
531 David Ung <davidu@mips.com>
533 * mips-dis.c (print_insn_args): Add mips_opcode argument.
534 (print_insn_mips): Adjust print_insn_args call.
536 2006-04-28 Thiemo Seufer <ths@mips.com>
537 Nigel Stephens <nigel@mips.com>
539 * mips-dis.c (print_insn_args): Print $fcc only for FP
540 instructions, use $cc elsewise.
542 2006-04-28 Thiemo Seufer <ths@mips.com>
543 Nigel Stephens <nigel@mips.com>
545 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
546 Map MIPS16 registers to O32 names.
547 (print_mips16_insn_arg): Use mips16_reg_names.
549 2006-04-26 Julian Brown <julian@codesourcery.com>
551 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
554 2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
555 Julian Brown <julian@codesourcery.com>
557 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
558 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
559 Add unified load/store instruction names.
560 (neon_opcode_table): New.
561 (arm_opcodes): Expand meaning of %<bitfield>['`?].
562 (arm_decode_bitfield): New.
563 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
564 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
565 (print_insn_neon): New.
566 (print_insn_arm): Adjust print_insn_coprocessor call. Call
567 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
568 (print_insn_thumb32): Likewise.
570 2006-04-19 Alan Modra <amodra@bigpond.net.au>
572 * Makefile.am: Run "make dep-am".
573 * Makefile.in: Regenerate.
575 2006-04-19 Alan Modra <amodra@bigpond.net.au>
577 * avr-dis.c (avr_operand): Warning fix.
579 * configure: Regenerate.
581 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
583 * po/POTFILES.in: Regenerated.
585 2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
588 * avr-dis.c (avr_operand): Arrange for a comment to appear before
589 the symolic form of an address, so that the output of objdump -d
592 2006-04-10 DJ Delorie <dj@redhat.com>
594 * m32c-asm.c: Regenerate.
596 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
598 * Makefile.am: Add install-html target.
599 * Makefile.in: Regenerate.
601 2006-04-06 Nick Clifton <nickc@redhat.com>
603 * po/vi/po: Updated Vietnamese translation.
605 2006-03-31 Paul Koning <ni1d@arrl.net>
607 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
609 2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
611 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
612 logic to identify halfword shifts.
614 2006-03-16 Paul Brook <paul@codesourcery.com>
616 * arm-dis.c (arm_opcodes): Rename swi to svc.
617 (thumb_opcodes): Ditto.
619 2006-03-13 DJ Delorie <dj@redhat.com>
621 * m32c-asm.c: Regenerate.
622 * m32c-desc.c: Likewise.
623 * m32c-desc.h: Likewise.
624 * m32c-dis.c: Likewise.
625 * m32c-ibld.c: Likewise.
626 * m32c-opc.c: Likewise.
627 * m32c-opc.h: Likewise.
629 2006-03-10 DJ Delorie <dj@redhat.com>
631 * m32c-desc.c: Regenerate with mul.l, mulu.l.
632 * m32c-opc.c: Likewise.
633 * m32c-opc.h: Likewise.
636 2006-03-09 Nick Clifton <nickc@redhat.com>
638 * po/sv.po: Updated Swedish translation.
640 2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
643 * i386-dis.c (REP_Fixup): New function.
644 (AL): Remove duplicate.
649 (indirDXr): Likewise.
652 (dis386): Updated entries of ins, outs, movs, lods and stos.
654 2006-03-05 Nick Clifton <nickc@redhat.com>
656 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
657 signed 32-bit value into an unsigned 32-bit field when the host is
659 * fr30-ibld.c: Regenerate.
660 * frv-ibld.c: Regenerate.
661 * ip2k-ibld.c: Regenerate.
662 * iq2000-asm.c: Regenerate.
663 * iq2000-ibld.c: Regenerate.
664 * m32c-ibld.c: Regenerate.
665 * m32r-ibld.c: Regenerate.
666 * openrisc-ibld.c: Regenerate.
667 * xc16x-ibld.c: Regenerate.
668 * xstormy16-ibld.c: Regenerate.
670 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
672 * xc16x-asm.c: Regenerate.
673 * xc16x-dis.c: Regenerate.
675 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
677 * po/Make-in: Add html target.
679 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
681 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
682 Intel Merom New Instructions.
683 (THREE_BYTE_0): Likewise.
684 (THREE_BYTE_1): Likewise.
685 (three_byte_table): Likewise.
686 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
687 THREE_BYTE_1 for entry 0x3a.
688 (twobyte_has_modrm): Updated.
689 (twobyte_uses_SSE_prefix): Likewise.
690 (print_insn): Handle 3-byte opcodes used by Intel Merom New
693 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
695 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
696 (v9_hpriv_reg_names): New table.
697 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
698 New cases '$' and '%' for read/write hyperprivileged register.
699 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
700 window handling and rdhpr/wrhpr instructions.
702 2006-02-24 DJ Delorie <dj@redhat.com>
704 * m32c-desc.c: Regenerate with linker relaxation attributes.
705 * m32c-desc.h: Likewise.
706 * m32c-dis.c: Likewise.
707 * m32c-opc.c: Likewise.
709 2006-02-24 Paul Brook <paul@codesourcery.com>
711 * arm-dis.c (arm_opcodes): Add V7 instructions.
712 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
713 (print_arm_address): New function.
714 (print_insn_arm): Use it. Add 'P' and 'U' cases.
715 (psr_name): New function.
716 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
718 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
720 * ia64-opc-i.c (bXc): New.
722 (OpX2TaTbYaXcC): Likewise.
725 (ia64_opcodes_i): Add instructions for tf.
727 * ia64-opc.h (IMMU5b): New.
729 * ia64-asmtab.c: Regenerated.
731 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
733 * ia64-gen.c: Update copyright years.
734 * ia64-opc-b.c: Likewise.
736 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
738 * ia64-gen.c (lookup_regindex): Handle ".vm".
739 (print_dependency_table): Handle '\"'.
741 * ia64-ic.tbl: Updated from SDM 2.2.
742 * ia64-raw.tbl: Likewise.
743 * ia64-waw.tbl: Likewise.
744 * ia64-asmtab.c: Regenerated.
746 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
748 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
749 Anil Paranjape <anilp1@kpitcummins.com>
750 Shilin Shakti <shilins@kpitcummins.com>
752 * xc16x-desc.h: New file
753 * xc16x-desc.c: New file
754 * xc16x-opc.h: New file
755 * xc16x-opc.c: New file
756 * xc16x-ibld.c: New file
757 * xc16x-asm.c: New file
758 * xc16x-dis.c: New file
759 * Makefile.am: Entries for xc16x
760 * Makefile.in: Regenerate
761 * cofigure.in: Add xc16x target information.
762 * configure: Regenerate.
763 * disassemble.c: Add xc16x target information.
765 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
767 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
770 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
772 * i386-dis.c ('Z'): Add a new macro.
773 (dis386_twobyte): Use "movZ" for control register moves.
775 2006-02-10 Nick Clifton <nickc@redhat.com>
777 * iq2000-asm.c: Regenerate.
779 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
781 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
783 2006-01-26 David Ung <davidu@mips.com>
785 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
786 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
787 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
788 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
789 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
791 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
793 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
794 ld_d_r, pref_xd_cb): Use signed char to hold data to be
796 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
797 buffer overflows when disassembling instructions like
799 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
800 operand, if the offset is negative.
802 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
804 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
805 unsigned char to hold data to be disassembled.
807 2006-01-17 Andreas Schwab <schwab@suse.de>
810 * disassemble.c (disassemble_init_for_target): Set
811 disassembler_needs_relocs for bfd_arch_arm.
813 2006-01-16 Paul Brook <paul@codesourcery.com>
815 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
816 f?add?, and f?sub? instructions.
818 2006-01-16 Nick Clifton <nickc@redhat.com>
820 * po/zh_CN.po: New Chinese (simplified) translation.
821 * configure.in (ALL_LINGUAS): Add "zh_CH".
822 * configure: Regenerate.
824 2006-01-05 Paul Brook <paul@codesourcery.com>
826 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
828 2006-01-06 DJ Delorie <dj@redhat.com>
830 * m32c-desc.c: Regenerate.
831 * m32c-opc.c: Regenerate.
832 * m32c-opc.h: Regenerate.
834 2006-01-03 DJ Delorie <dj@redhat.com>
836 * cgen-ibld.in (extract_normal): Avoid memory range errors.
837 * m32c-ibld.c: Regenerated.
839 For older changes see ChangeLog-2005
845 version-control: never