2006-03-16 Paul Brook <paul@codesourcery.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2006-03-16 Paul Brook <paul@codesourcery.com>
2
3 * arm-dis.c (arm_opcodes): Rename swi to svc.
4 (thumb_opcodes): Ditto.
5
6 2006-03-13 DJ Delorie <dj@redhat.com>
7
8 * m32c-asm.c: Regenerate.
9 * m32c-desc.c: Likewise.
10 * m32c-desc.h: Likewise.
11 * m32c-dis.c: Likewise.
12 * m32c-ibld.c: Likewise.
13 * m32c-opc.c: Likewise.
14 * m32c-opc.h: Likewise.
15
16 2006-03-10 DJ Delorie <dj@redhat.com>
17
18 * m32c-desc.c: Regenerate with mul.l, mulu.l.
19 * m32c-opc.c: Likewise.
20 * m32c-opc.h: Likewise.
21
22
23 2006-03-09 Nick Clifton <nickc@redhat.com>
24
25 * po/sv.po: Updated Swedish translation.
26
27 2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
28
29 PR binutils/2428
30 * i386-dis.c (REP_Fixup): New function.
31 (AL): Remove duplicate.
32 (Xbr): New.
33 (Xvr): Likewise.
34 (Ybr): Likewise.
35 (Yvr): Likewise.
36 (indirDXr): Likewise.
37 (ALr): Likewise.
38 (eAXr): Likewise.
39 (dis386): Updated entries of ins, outs, movs, lods and stos.
40
41 2006-03-05 Nick Clifton <nickc@redhat.com>
42
43 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
44 signed 32-bit value into an unsigned 32-bit field when the host is
45 a 64-bit machine.
46 * fr30-ibld.c: Regenerate.
47 * frv-ibld.c: Regenerate.
48 * ip2k-ibld.c: Regenerate.
49 * iq2000-asm.c: Regenerate.
50 * iq2000-ibld.c: Regenerate.
51 * m32c-ibld.c: Regenerate.
52 * m32r-ibld.c: Regenerate.
53 * openrisc-ibld.c: Regenerate.
54 * xc16x-ibld.c: Regenerate.
55 * xstormy16-ibld.c: Regenerate.
56
57 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
58
59 * xc16x-asm.c: Regenerate.
60 * xc16x-dis.c: Regenerate.
61
62 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
63
64 * po/Make-in: Add html target.
65
66 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
67
68 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
69 Intel Merom New Instructions.
70 (THREE_BYTE_0): Likewise.
71 (THREE_BYTE_1): Likewise.
72 (three_byte_table): Likewise.
73 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
74 THREE_BYTE_1 for entry 0x3a.
75 (twobyte_has_modrm): Updated.
76 (twobyte_uses_SSE_prefix): Likewise.
77 (print_insn): Handle 3-byte opcodes used by Intel Merom New
78 Instructions.
79
80 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
81
82 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
83 (v9_hpriv_reg_names): New table.
84 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
85 New cases '$' and '%' for read/write hyperprivileged register.
86 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
87 window handling and rdhpr/wrhpr instructions.
88
89 2006-02-24 DJ Delorie <dj@redhat.com>
90
91 * m32c-desc.c: Regenerate with linker relaxation attributes.
92 * m32c-desc.h: Likewise.
93 * m32c-dis.c: Likewise.
94 * m32c-opc.c: Likewise.
95
96 2006-02-24 Paul Brook <paul@codesourcery.com>
97
98 * arm-dis.c (arm_opcodes): Add V7 instructions.
99 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
100 (print_arm_address): New function.
101 (print_insn_arm): Use it. Add 'P' and 'U' cases.
102 (psr_name): New function.
103 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
104
105 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
106
107 * ia64-opc-i.c (bXc): New.
108 (mXc): Likewise.
109 (OpX2TaTbYaXcC): Likewise.
110 (TF). Likewise.
111 (TFCM). Likewise.
112 (ia64_opcodes_i): Add instructions for tf.
113
114 * ia64-opc.h (IMMU5b): New.
115
116 * ia64-asmtab.c: Regenerated.
117
118 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
119
120 * ia64-gen.c: Update copyright years.
121 * ia64-opc-b.c: Likewise.
122
123 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
124
125 * ia64-gen.c (lookup_regindex): Handle ".vm".
126 (print_dependency_table): Handle '\"'.
127
128 * ia64-ic.tbl: Updated from SDM 2.2.
129 * ia64-raw.tbl: Likewise.
130 * ia64-waw.tbl: Likewise.
131 * ia64-asmtab.c: Regenerated.
132
133 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
134
135 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
136 Anil Paranjape <anilp1@kpitcummins.com>
137 Shilin Shakti <shilins@kpitcummins.com>
138
139 * xc16x-desc.h: New file
140 * xc16x-desc.c: New file
141 * xc16x-opc.h: New file
142 * xc16x-opc.c: New file
143 * xc16x-ibld.c: New file
144 * xc16x-asm.c: New file
145 * xc16x-dis.c: New file
146 * Makefile.am: Entries for xc16x
147 * Makefile.in: Regenerate
148 * cofigure.in: Add xc16x target information.
149 * configure: Regenerate.
150 * disassemble.c: Add xc16x target information.
151
152 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
153
154 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
155 moves.
156
157 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
158
159 * i386-dis.c ('Z'): Add a new macro.
160 (dis386_twobyte): Use "movZ" for control register moves.
161
162 2006-02-10 Nick Clifton <nickc@redhat.com>
163
164 * iq2000-asm.c: Regenerate.
165
166 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
167
168 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
169
170 2006-01-26 David Ung <davidu@mips.com>
171
172 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
173 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
174 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
175 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
176 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
177
178 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
179
180 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
181 ld_d_r, pref_xd_cb): Use signed char to hold data to be
182 disassembled.
183 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
184 buffer overflows when disassembling instructions like
185 ld (ix+123),0x23
186 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
187 operand, if the offset is negative.
188
189 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
190
191 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
192 unsigned char to hold data to be disassembled.
193
194 2006-01-17 Andreas Schwab <schwab@suse.de>
195
196 PR binutils/1486
197 * disassemble.c (disassemble_init_for_target): Set
198 disassembler_needs_relocs for bfd_arch_arm.
199
200 2006-01-16 Paul Brook <paul@codesourcery.com>
201
202 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
203 f?add?, and f?sub? instructions.
204
205 2006-01-16 Nick Clifton <nickc@redhat.com>
206
207 * po/zh_CN.po: New Chinese (simplified) translation.
208 * configure.in (ALL_LINGUAS): Add "zh_CH".
209 * configure: Regenerate.
210
211 2006-01-05 Paul Brook <paul@codesourcery.com>
212
213 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
214
215 2006-01-06 DJ Delorie <dj@redhat.com>
216
217 * m32c-desc.c: Regenerate.
218 * m32c-opc.c: Regenerate.
219 * m32c-opc.h: Regenerate.
220
221 2006-01-03 DJ Delorie <dj@redhat.com>
222
223 * cgen-ibld.in (extract_normal): Avoid memory range errors.
224 * m32c-ibld.c: Regenerated.
225
226 For older changes see ChangeLog-2005
227 \f
228 Local Variables:
229 mode: change-log
230 left-margin: 8
231 fill-column: 74
232 version-control: never
233 End:
This page took 0.045484 seconds and 5 git commands to generate.