opcodes/ChangeLog

   1 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
   2
   3         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
   4         instructions.  Adjust disassembly of some opcodes to match
   5         unified syntax.
   6         (thumb32_opcodes): New table.
   7         (print_insn_thumb): Rename print_insn_thumb16; don't handle
   8         two-halfword branches here.
   9         (print_insn_thumb32): New function.
  10         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
  11         and print_insn_thumb32.  Be consistent about order of
  12         halfwords when printing 32-bit instructions.
  13
  14 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
  15
  16         PR 843
  17         * i386-dis.c (branch_v_mode): New.
  18         (indirEv): Use branch_v_mode instead of v_mode.
  19         (OP_E): Handle branch_v_mode.
  20
  21 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
  22
  23         * d10v-dis.c (dis_2_short): Support 64bit host.
  24
  25 2005-05-07  Nick Clifton  <nickc@redhat.com>
  26
  27         * po/nl.po: Updated translation.
  28
  29 2005-05-07  Nick Clifton  <nickc@redhat.com>
  30
  31         * Update the address and phone number of the FSF organization in
  32         the GPL notices in the following files:
  33         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
  34         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
  35         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
  36         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
  37         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
  38         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
  39         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
  40         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
  41         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
  42         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
  43         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
  44         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
  45         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
  46         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
  47         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
  48         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
  49         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
  50         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
  51         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
  52         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
  53         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
  54         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
  55         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
  56         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
  57         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
  58         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
  59         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
  60         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
  61         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
  62         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
  63         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
  64         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
  65         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
  66
  67 2005-05-05  James E Wilson  <wilson@specifixinc.com>
  68
  69         * ia64-opc.c: Include sysdep.h before libiberty.h.
  70
  71 2005-05-05  Nick Clifton  <nickc@redhat.com>
  72
  73         * configure.in (ALL_LINGUAS): Add vi.
  74         * configure: Regenerate.
  75         * po/vi.po: New.
  76
  77 2005-04-26  Jerome Guitton  <guitton@gnat.com>
  78
  79         * configure.in: Fix the check for basename declaration.
  80         * configure: Regenerate.
  81
  82 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
  83
  84         * ppc-opc.c (RTO): Define.
  85         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
  86         entries to suit PPC440.
  87
  88 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
  89
  90         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
  91         Add xcrypt-ctr.
  92
  93 2005-04-14  Nick Clifton  <nickc@redhat.com>
  94
  95         * po/fi.po: New translation: Finnish.
  96         * configure.in (ALL_LINGUAS): Add fi.
  97         * configure: Regenerate.
  98
  99 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 100
 101         * Makefile.am (NO_WERROR): Define.
 102         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 103         * Makefile.in: Regenerate.
 104         * aclocal.m4: Regenerate.
 105         * configure: Regenerate.
 106
 107 2005-04-04  Nick Clifton  <nickc@redhat.com>
 108
 109         * fr30-asm.c: Regenerate.
 110         * frv-asm.c: Regenerate.
 111         * iq2000-asm.c: Regenerate.
 112         * m32r-asm.c: Regenerate.
 113         * openrisc-asm.c: Regenerate.
 114
 115 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 116
 117         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 118         visible operands in Intel mode. The first operand of monitor is
 119         %rax in 64-bit mode.
 120
 121 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 122
 123         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 124         easier future additions.
 125
 126 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 127
 128         * configure.in: Check for basename.
 129         * configure: Regenerate.
 130         * config.in: Ditto.
 131
 132 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 133
 134         * i386-dis.c (SEG_Fixup): New.
 135         (Sv): New.
 136         (dis386): Use "Sv" for 0x8c and 0x8e.
 137
 138 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 139             Nick Clifton  <nickc@redhat.com>
 140
 141         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 142         function entry mask addresses.
 143         (entry_addr_occupied_slots): New variable: The number of occupied
 144         elements in entry_addr.
 145         (entry_addr_total_slots): New variable: The total number of
 146         elements in entry_addr.
 147         (parse_disassembler_options): New function.  Fills in the entry_addr
 148         array.
 149         (free_entry_array): New function.  Release the memory used by the
 150         entry addr array.  Suppressed because there is no way to call it.
 151         (is_function_entry): Check if a given address is a function's
 152         start address by looking at supplied entry mask addresses and
 153         symbol information, if available.
 154         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 155
 156 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 157
 158         * cris-dis.c (print_with_operands): Use ~31L for long instead
 159         of ~31.
 160
 161 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 162
 163         * mmix-opc.c (O): Revert the last change.
 164         (Z): Likewise.
 165
 166 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 167
 168         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 169         (Z): Likewise.
 170
 171 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 172
 173         * mmix-opc.c (O, Z): Force expression as unsigned long.
 174
 175 2005-03-18  Nick Clifton  <nickc@redhat.com>
 176
 177         * ip2k-asm.c: Regenerate.
 178         * op/opcodes.pot: Regenerate.
 179
 180 2005-03-16  Nick Clifton  <nickc@redhat.com>
 181             Ben Elliston  <bje@au.ibm.com>
 182
 183         * configure.in (werror): New switch: Add -Werror to the
 184         compiler command line.  Enabled by default.  Disable via
 185         --disable-werror.
 186         * configure: Regenerate.
 187
 188 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 189
 190         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 191         BOOKE.
 192
 193 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 194
 195         * po/es.po: Commit new Spanish translation.
 196
 197         * po/fr.po: Commit new French translation.
 198
 199 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 200
 201         * vax-dis.c: Fix spelling error
 202         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 203         of just "Entry mask: < r1 ... >"
 204
 205 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 206
 207         * arm-dis.c (arm_opcodes): Document %E and %V.
 208         Add entries for v6T2 ARM instructions:
 209         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 210         (print_insn_arm): Add support for %E and %V.
 211         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 212
 213 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 214             Alan Modra  <amodra@bigpond.net.au>
 215
 216         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 217         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 218         (SPRG_MASK): Delete.
 219         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 220         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 221         mfsprg4..7 after msprg and consolidate.
 222
 223 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 224
 225         * vax-dis.c (entry_mask_bit): New array.
 226         (print_insn_vax): Decode function entry mask.
 227
 228 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 229
 230         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 231
 232 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 233
 234         * po/opcodes.pot: Regenerate.
 235
 236 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 237
 238         * arc-dis.c (a4_decoding_class): New enum.
 239         (dsmOneArcInst): Use the enum values for the decoding class.
 240         Remove redundant case in the switch for decodingClass value 11.
 241
 242 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 243
 244         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 245         accesses.
 246         (OP_C): Consider lock prefix in non-64-bit modes.
 247
 248 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 249
 250         * cris-dis.c (format_hex): Remove ineffective warning fix.
 251         * crx-dis.c (make_instruction): Warning fix.
 252         * frv-asm.c: Regenerate.
 253
 254 2005-02-23  Nick Clifton  <nickc@redhat.com>
 255
 256         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 257         read_memory.
 258
 259         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 260
 261         * crx-dis.c (make_instruction): Move argument structure into inner
 262         scope and ensure that all of its fields are initialised before
 263         they are used.
 264
 265         * fr30-asm.c: Regenerate.
 266         * fr30-dis.c: Regenerate.
 267         * frv-asm.c: Regenerate.
 268         * frv-dis.c: Regenerate.
 269         * ip2k-asm.c: Regenerate.
 270         * ip2k-dis.c: Regenerate.
 271         * iq2000-asm.c: Regenerate.
 272         * iq2000-dis.c: Regenerate.
 273         * m32r-asm.c: Regenerate.
 274         * m32r-dis.c: Regenerate.
 275         * openrisc-asm.c: Regenerate.
 276         * openrisc-dis.c: Regenerate.
 277         * xstormy16-asm.c: Regenerate.
 278         * xstormy16-dis.c: Regenerate.
 279
 280 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 281
 282         * arc-ext.c: Warning fixes.
 283         * arc-ext.h: Likewise.
 284         * cgen-opc.c: Likewise.
 285         * ia64-gen.c: Likewise.
 286         * maxq-dis.c: Likewise.
 287         * ns32k-dis.c: Likewise.
 288         * w65-dis.c: Likewise.
 289         * ia64-asmtab.c: Regenerate.
 290
 291 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 292
 293         * fr30-desc.c: Regenerate.
 294         * fr30-desc.h: Regenerate.
 295         * fr30-opc.c: Regenerate.
 296         * fr30-opc.h: Regenerate.
 297         * frv-desc.c: Regenerate.
 298         * frv-desc.h: Regenerate.
 299         * frv-opc.c: Regenerate.
 300         * frv-opc.h: Regenerate.
 301         * ip2k-desc.c: Regenerate.
 302         * ip2k-desc.h: Regenerate.
 303         * ip2k-opc.c: Regenerate.
 304         * ip2k-opc.h: Regenerate.
 305         * iq2000-desc.c: Regenerate.
 306         * iq2000-desc.h: Regenerate.
 307         * iq2000-opc.c: Regenerate.
 308         * iq2000-opc.h: Regenerate.
 309         * m32r-desc.c: Regenerate.
 310         * m32r-desc.h: Regenerate.
 311         * m32r-opc.c: Regenerate.
 312         * m32r-opc.h: Regenerate.
 313         * m32r-opinst.c: Regenerate.
 314         * openrisc-desc.c: Regenerate.
 315         * openrisc-desc.h: Regenerate.
 316         * openrisc-opc.c: Regenerate.
 317         * openrisc-opc.h: Regenerate.
 318         * xstormy16-desc.c: Regenerate.
 319         * xstormy16-desc.h: Regenerate.
 320         * xstormy16-opc.c: Regenerate.
 321         * xstormy16-opc.h: Regenerate.
 322
 323 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 324
 325         * Makefile.am: Run "make dep-am"
 326         * Makefile.in: Regenerate.
 327
 328 2005-02-15  Nick Clifton  <nickc@redhat.com>
 329
 330         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 331         compile time warnings.
 332         (print_keyword): Likewise.
 333         (default_print_insn): Likewise.
 334
 335         * fr30-desc.c: Regenerated.
 336         * fr30-desc.h: Regenerated.
 337         * fr30-dis.c: Regenerated.
 338         * fr30-opc.c: Regenerated.
 339         * fr30-opc.h: Regenerated.
 340         * frv-desc.c: Regenerated.
 341         * frv-dis.c: Regenerated.
 342         * frv-opc.c: Regenerated.
 343         * ip2k-asm.c: Regenerated.
 344         * ip2k-desc.c: Regenerated.
 345         * ip2k-desc.h: Regenerated.
 346         * ip2k-dis.c: Regenerated.
 347         * ip2k-opc.c: Regenerated.
 348         * ip2k-opc.h: Regenerated.
 349         * iq2000-desc.c: Regenerated.
 350         * iq2000-dis.c: Regenerated.
 351         * iq2000-opc.c: Regenerated.
 352         * m32r-asm.c: Regenerated.
 353         * m32r-desc.c: Regenerated.
 354         * m32r-desc.h: Regenerated.
 355         * m32r-dis.c: Regenerated.
 356         * m32r-opc.c: Regenerated.
 357         * m32r-opc.h: Regenerated.
 358         * m32r-opinst.c: Regenerated.
 359         * openrisc-desc.c: Regenerated.
 360         * openrisc-desc.h: Regenerated.
 361         * openrisc-dis.c: Regenerated.
 362         * openrisc-opc.c: Regenerated.
 363         * openrisc-opc.h: Regenerated.
 364         * xstormy16-desc.c: Regenerated.
 365         * xstormy16-desc.h: Regenerated.
 366         * xstormy16-dis.c: Regenerated.
 367         * xstormy16-opc.c: Regenerated.
 368         * xstormy16-opc.h: Regenerated.
 369
 370 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 371
 372         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 373         address.
 374
 375 2005-02-11  Nick Clifton  <nickc@redhat.com>
 376
 377         * iq2000-asm.c: Regenerate.
 378
 379         * frv-dis.c: Regenerate.
 380
 381 2005-02-07  Jim Blandy  <jimb@redhat.com>
 382
 383         * Makefile.am (CGEN): Load guile.scm before calling the main
 384         application script.
 385         * Makefile.in: Regenerated.
 386         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 387         Simply pass the cgen-opc.scm path to ${cgen} as its first
 388         argument; ${cgen} itself now contains the '-s', or whatever is
 389         appropriate for the Scheme being used.
 390
 391 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 392
 393         * configure: Regenerate to track ../gettext.m4.
 394
 395 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 396
 397         * ia64-gen.c (NELEMS): Define.
 398         (shrink): Generate alias with missing second predicate register when
 399         opcode has two outputs and these are both predicates.
 400         * ia64-opc-i.c (FULL17): Define.
 401         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 402         here to generate output template.
 403         (TBITCM, TNATCM): Undefine after use.
 404         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 405         first input. Add ld16 aliases without ar.csd as second output. Add
 406         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 407         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 408         ar.ccv as third/fourth inputs. Consolidate through...
 409         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 410         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 411         * ia64-asmtab.c: Regenerate.
 412
 413 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 414
 415         * configure: Regenerate to track ../gettext.m4 change.
 416
 417 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 418
 419         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 420         * frv-asm.c: Rebuilt.
 421         * frv-desc.c: Rebuilt.
 422         * frv-desc.h: Rebuilt.
 423         * frv-dis.c: Rebuilt.
 424         * frv-ibld.c: Rebuilt.
 425         * frv-opc.c: Rebuilt.
 426         * frv-opc.h: Rebuilt.
 427
 428 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 429
 430         * configure: Regenerate, ../gettext.m4 was updated.
 431
 432 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 433
 434         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 435         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 436         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 437         * mips-dis.c: Ditto.
 438
 439 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 440
 441         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 442
 443 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 444
 445         * mips-dis.c (no_aliases): New disassembly option flag.
 446         (set_default_mips_dis_options): Init no_aliases to zero.
 447         (parse_mips_dis_option): Handle no-aliases option.
 448         (print_insn_mips): Ignore table entries that are aliases
 449         if no_aliases is set.
 450         (print_insn_mips16): Ditto.
 451         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 452         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 453         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 454         * mips16-opc.c (mips16_opcodes): Ditto.
 455
 456 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 457
 458         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 459         (inheritance diagram): Add missing edge.
 460         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 461         easier for the testsuite.
 462         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 463         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 464         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 465         arch_sh2a_or_sh4_up child.
 466         (sh_table): Do renaming as above.
 467         Correct comment for ldc.l for gas testsuite to read.
 468         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 469         Correct comments for movy.w and movy.l for gas testsuite to read.
 470         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 471
 472 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 473
 474         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 475
 476 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 477
 478         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 479
 480 2005-01-10  Andreas Schwab  <schwab@suse.de>
 481
 482         * disassemble.c (disassemble_init_for_target) <case
 483         bfd_arch_ia64>: Set skip_zeroes to 16.
 484         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 485
 486 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 487
 488         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 489
 490 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 491
 492         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 493         memory references. Convert avr_operand() to C90 formatting.
 494
 495 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 496
 497         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 498
 499 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 500
 501         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 502         (no_op_insn): Initialize array with instructions that have no
 503         operands.
 504         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 505
 506 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 507
 508         * arm-dis.c: Correct top-level comment.
 509
 510 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 511
 512         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 513         architecuture defining the insn.
 514         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 515         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 516         field.
 517         Also include opcode/arm.h.
 518         * Makefile.am (arm-dis.lo): Update dependency list.
 519         * Makefile.in: Regenerate.
 520
 521 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 522
 523         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 524         reflect the change to the short immediate syntax.
 525
 526 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 527
 528         * or32-opc.c (debug): Warning fix.
 529         * po/POTFILES.in: Regenerate.
 530
 531         * maxq-dis.c: Formatting.
 532         (print_insn): Warning fix.
 533
 534 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 535
 536         * arm-dis.c (WORD_ADDRESS): Define.
 537         (print_insn): Use it.  Correct big-endian end-of-section handling.
 538
 539 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 540             Vineet Sharma      <vineets@noida.hcltech.com>
 541
 542         * maxq-dis.c: New file.
 543         * disassemble.c (ARCH_maxq): Define.
 544         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 545         instructions..
 546         * configure.in: Add case for bfd_maxq_arch.
 547         * configure: Regenerate.
 548         * Makefile.am: Add support for maxq-dis.c
 549         * Makefile.in: Regenerate.
 550         * aclocal.m4: Regenerate.
 551
 552 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 553
 554         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 555         mode.
 556         * crx-dis.c: Likewise.
 557
 558 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 559
 560         Generally, handle CRISv32.
 561         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 562         (struct cris_disasm_data): New type.
 563         (format_reg, format_hex, cris_constraint, print_flags)
 564         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 565         callers changed.
 566         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 567         (print_insn_crisv32_without_register_prefix)
 568         (print_insn_crisv10_v32_with_register_prefix)
 569         (print_insn_crisv10_v32_without_register_prefix)
 570         (cris_parse_disassembler_options): New functions.
 571         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 572         parameter.  All callers changed.
 573         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 574         failure.
 575         (cris_constraint) <case 'Y', 'U'>: New cases.
 576         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 577         for constraint 'n'.
 578         (print_with_operands) <case 'Y'>: New case.
 579         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 580         <case 'N', 'Y', 'Q'>: New cases.
 581         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 582         (print_insn_cris_with_register_prefix)
 583         (print_insn_cris_without_register_prefix): Call
 584         cris_parse_disassembler_options.
 585         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 586         for CRISv32 and the size of immediate operands.  New v32-only
 587         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 588         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 589         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 590         Change brp to be v3..v10.
 591         (cris_support_regs): New vector.
 592         (cris_opcodes): Update head comment.  New format characters '[',
 593         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 594         Add new opcodes for v32 and adjust existing opcodes to accommodate
 595         differences to earlier variants.
 596         (cris_cond15s): New vector.
 597
 598 2004-11-04 Jan Beulich <jbeulich@novell.com>
 599
 600         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 601         (indirEb): Remove.
 602         (Mp): Use f_mode rather than none at all.
 603         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 604         replaces what previously was x_mode; x_mode now means 128-bit SSE
 605         operands.
 606         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 607         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 608         pinsrw's second operand is Edqw.
 609         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 610         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 611         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 612         mode when an operand size override is present or always suffixing.
 613         More instructions will need to be added to this group.
 614         (putop): Handle new macro chars 'C' (short/long suffix selector),
 615         'I' (Intel mode override for following macro char), and 'J' (for
 616         adding the 'l' prefix to far branches in AT&T mode). When an
 617         alternative was specified in the template, honor macro character when
 618         specified for Intel mode.
 619         (OP_E): Handle new *_mode values. Correct pointer specifications for
 620         memory operands. Consolidate output of index register.
 621         (OP_G): Handle new *_mode values.
 622         (OP_I): Handle const_1_mode.
 623         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 624         respective opcode prefix bits have been consumed.
 625         (OP_EM, OP_EX): Provide some default handling for generating pointer
 626         specifications.
 627
 628 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 629
 630         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 631         COP_INST macro.
 632
 633 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 634
 635         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 636         (getregliststring): Support HI/LO and user registers.
 637         * crx-opc.c (crx_instruction): Update data structure according to the
 638         rearrangement done in CRX opcode header file.
 639         (crx_regtab):  Likewise.
 640         (crx_optab):  Likewise.
 641         (crx_instruction): Reorder load/stor instructions, remove unsupported
 642         formats.
 643         support new Co-Processor instruction 'cpi'.
 644
 645 2004-10-27  Nick Clifton  <nickc@redhat.com>
 646
 647         * opcodes/iq2000-asm.c: Regenerate.
 648         * opcodes/iq2000-desc.c: Regenerate.
 649         * opcodes/iq2000-desc.h: Regenerate.
 650         * opcodes/iq2000-dis.c: Regenerate.
 651         * opcodes/iq2000-ibld.c: Regenerate.
 652         * opcodes/iq2000-opc.c: Regenerate.
 653         * opcodes/iq2000-opc.h: Regenerate.
 654
 655 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 656
 657         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 658         us4, us5 (respectively).
 659         Remove unsupported 'popa' instruction.
 660         Reverse operands order in store co-processor instructions.
 661
 662 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 663
 664         * Makefile.am: Run "make dep-am"
 665         * Makefile.in: Regenerate.
 666
 667 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 668
 669         * xtensa-dis.c: Use ISO C90 formatting.
 670
 671 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 672
 673         * ppc-opc.c: Revert 2004-09-09 change.
 674
 675 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 676
 677         * xtensa-dis.c (state_names): Delete.
 678         (fetch_data): Use xtensa_isa_maxlength.
 679         (print_xtensa_operand): Replace operand parameter with opcode/operand
 680         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 681         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 682         instruction bundles.  Use xmalloc instead of malloc.
 683
 684 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 685
 686         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 687         initializers.
 688
 689 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 690
 691         * crx-opc.c (crx_instruction): Support Co-processor insns.
 692         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 693         (getregliststring): Change function to use the above enum.
 694         (print_arg): Handle CO-Processor insns.
 695         (crx_cinvs): Add 'b' option to invalidate the branch-target
 696         cache.
 697
 698 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 699
 700         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 701         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 702         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 703         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 704         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 705
 706 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 707
 708         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 709         rather than add it.
 710
 711 2004-09-30  Paul Brook  <paul@codesourcery.com>
 712
 713         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 714         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 715
 716 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 717
 718         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 719         (CONFIG_STATUS_DEPENDENCIES): New.
 720         (Makefile): Removed.
 721         (config.status): Likewise.
 722         * Makefile.in: Regenerated.
 723
 724 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 725
 726         * Makefile.am: Run "make dep-am".
 727         * Makefile.in: Regenerate.
 728         * aclocal.m4: Regenerate.
 729         * configure: Regenerate.
 730         * po/POTFILES.in: Regenerate.
 731         * po/opcodes.pot: Regenerate.
 732
 733 2004-09-11  Andreas Schwab  <schwab@suse.de>
 734
 735         * configure: Rebuild.
 736
 737 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 738
 739         * ppc-opc.c (L): Make this field not optional.
 740
 741 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 742
 743         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 744         Fix parameter to 'm[t|f]csr' insns.
 745
 746 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 747
 748         * configure.in: Autoupdate to autoconf 2.59.
 749         * aclocal.m4: Rebuild with aclocal 1.4p6.
 750         * configure: Rebuild with autoconf 2.59.
 751         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 752         bfd changes for autoconf 2.59 on the way).
 753         * config.in: Rebuild with autoheader 2.59.
 754
 755 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 756
 757         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 758
 759 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 760
 761         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 762         (GRPPADLCK2): New define.
 763         (twobyte_has_modrm): True for 0xA6.
 764         (grps): GRPPADLCK2 for opcode 0xA6.
 765
 766 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 767
 768         Introduce SH2a support.
 769         * sh-opc.h (arch_sh2a_base): Renumber.
 770         (arch_sh2a_nofpu_base): Remove.
 771         (arch_sh_base_mask): Adjust.
 772         (arch_opann_mask): New.
 773         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 774         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 775         (sh_table): Adjust whitespace.
 776         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 777         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 778         instruction list throughout.
 779         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 780         of arch_sh2a in instruction list throughout.
 781         (arch_sh2e_up): Accomodate above changes.
 782         (arch_sh2_up): Ditto.
 783         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 784         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 785         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 786         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 787         * sh-opc.h (arch_sh2a_nofpu): New.
 788         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 789         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 790         instruction.
 791         2004-01-20  DJ Delorie  <dj@redhat.com>
 792         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 793         2003-12-29  DJ Delorie  <dj@redhat.com>
 794         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 795         sh_opcode_info, sh_table): Add sh2a support.
 796         (arch_op32): New, to tag 32-bit opcodes.
 797         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 798         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 799         * sh-opc.h (arch_sh2a): Add.
 800         * sh-dis.c (arch_sh2a): Handle.
 801         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 802
 803 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 804
 805         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 806
 807 2004-07-22  Nick Clifton  <nickc@redhat.com>
 808
 809         PR/280
 810         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 811         insns - this is done by objdump itself.
 812         * h8500-dis.c (print_insn_h8500): Likewise.
 813
 814 2004-07-21  Jan Beulich <jbeulich@novell.com>
 815
 816         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 817         regardless of address size prefix in effect.
 818         (ptr_reg): Size or address registers does not depend on rex64, but
 819         on the presence of an address size override.
 820         (OP_MMX): Use rex.x only for xmm registers.
 821         (OP_EM): Use rex.z only for xmm registers.
 822
 823 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 824
 825         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 826         move/branch operations to the bottom so that VR5400 multimedia
 827         instructions take precedence in disassembly.
 828
 829 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 830
 831         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 832         ISA-specific "break" encoding.
 833
 834 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 835
 836         * arm-opc.h: Fix typo in comment.
 837
 838 2004-07-11  Andreas Schwab  <schwab@suse.de>
 839
 840         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 841
 842 2004-07-09  Andreas Schwab  <schwab@suse.de>
 843
 844         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 845
 846 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 847
 848         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 849         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 850         (crx-dis.lo): New target.
 851         (crx-opc.lo): Likewise.
 852         * Makefile.in: Regenerate.
 853         * configure.in: Handle bfd_crx_arch.
 854         * configure: Regenerate.
 855         * crx-dis.c: New file.
 856         * crx-opc.c: New file.
 857         * disassemble.c (ARCH_crx): Define.
 858         (disassembler): Handle ARCH_crx.
 859
 860 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 861
 862         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 863         * ia64-asmtab.c: Regnerate.
 864
 865 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 866
 867         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 868         (extract_fxm): Don't test dialect.
 869         (XFXFXM_MASK): Include the power4 bit.
 870         (XFXM): Add p4 param.
 871         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 872
 873 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 874
 875         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 876         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 877
 878 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 879
 880         * ppc-opc.c (BH, XLBH_MASK): Define.
 881         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 882
 883 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 884
 885         * i386-dis.c (x_mode): Comment.
 886         (two_source_ops): File scope.
 887         (float_mem): Correct fisttpll and fistpll.
 888         (float_mem_mode): New table.
 889         (dofloat): Use it.
 890         (OP_E): Correct intel mode PTR output.
 891         (ptr_reg): Use open_char and close_char.
 892         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 893         operands.  Set two_source_ops.
 894
 895 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 896
 897         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 898         instead of _raw_size.
 899
 900 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 901
 902         * ia64-gen.c (in_iclass): Handle more postinc st
 903         and ld variants.
 904         * ia64-asmtab.c: Rebuilt.
 905
 906 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 907
 908         * s390-opc.txt: Correct architecture mask for some opcodes.
 909         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 910         in the esa mode as well.
 911
 912 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 913
 914         * sh-dis.c (target_arch): Make unsigned.
 915         (print_insn_sh): Replace (most of) switch with a call to
 916         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 917         * sh-opc.h: Redefine architecture flags values.
 918         Add sh3-nommu architecture.
 919         Reorganise <arch>_up macros so they make more visual sense.
 920         (SH_MERGE_ARCH_SET): Define new macro.
 921         (SH_VALID_BASE_ARCH_SET): Likewise.
 922         (SH_VALID_MMU_ARCH_SET): Likewise.
 923         (SH_VALID_CO_ARCH_SET): Likewise.
 924         (SH_VALID_ARCH_SET): Likewise.
 925         (SH_MERGE_ARCH_SET_VALID): Likewise.
 926         (SH_ARCH_SET_HAS_FPU): Likewise.
 927         (SH_ARCH_SET_HAS_DSP): Likewise.
 928         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 929         (sh_get_arch_from_bfd_mach): Add prototype.
 930         (sh_get_arch_up_from_bfd_mach): Likewise.
 931         (sh_get_bfd_mach_from_arch_set): Likewise.
 932         (sh_merge_bfd_arc): Likewise.
 933
 934 2004-05-24  Peter Barada  <peter@the-baradas.com>
 935
 936         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 937         into new match_insn_m68k function.  Loop over canidate
 938         matches and select first that completely matches.
 939         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 940         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 941         to verify addressing for MAC/EMAC.
 942         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 943         reigster halves since 'fpu' and 'spl' look misleading.
 944         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 945         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 946         first, tighten up match masks.
 947         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 948         'size' from special case code in print_insn_m68k to
 949         determine decode size of insns.
 950
 951 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 952
 953         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 954         well as when -mpower4.
 955
 956 2004-05-13  Nick Clifton  <nickc@redhat.com>
 957
 958         * po/fr.po: Updated French translation.
 959
 960 2004-05-05  Peter Barada  <peter@the-baradas.com>
 961
 962         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 963         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 964         * m68k-op.c: Switch from ColdFire chips to core variants.
 965
 966 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 967
 968         PR 147.
 969         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 970
 971 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 972
 973         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 974         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 975
 976 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 977
 978         * sh-dis.c (print_insn_sh): Print the value in constant pool
 979         as a symbol if it looks like a symbol.
 980
 981 2004-04-22  Peter Barada <peter@the-baradas.com>
 982
 983         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 984         appropriate ColdFire architectures.
 985         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 986         mask addressing.
 987         Add EMAC instructions, fix MAC instructions. Remove
 988         macmw/macml/msacmw/msacml instructions since mask addressing now
 989         supported.
 990
 991 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 992
 993         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 994         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 995         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 996         macro.  Adjust all users.
 997
 998 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 999
1000         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1001         separately.
1002
1003 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1004
1005         * m32r-asm.c: Regenerate.
1006
1007 2004-03-29  Stan Shebs  <shebs@apple.com>
1008
1009         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1010         used.
1011
1012 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1013
1014         * aclocal.m4: Regenerate.
1015         * config.in: Regenerate.
1016         * configure: Regenerate.
1017         * po/POTFILES.in: Regenerate.
1018         * po/opcodes.pot: Regenerate.
1019
1020 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1021
1022         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1023         PPC_OPERANDS_GPR_0.
1024         * ppc-opc.c (RA0): Define.
1025         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1026         (RAOPT): Rename from RAO.  Update all uses.
1027         (powerpc_opcodes): Use RA0 as appropriate.
1028
1029 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1030
1031         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1032
1033 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1034
1035         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1036
1037 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1038
1039         * i386-dis.c (GRPPLOCK): Delete.
1040         (grps): Delete GRPPLOCK entry.
1041
1042 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1043
1044         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1045         (M, Mp): Use OP_M.
1046         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1047         (GRPPADLCK): Define.
1048         (dis386): Use NOP_Fixup on "nop".
1049         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1050         (twobyte_has_modrm): Set for 0xa7.
1051         (padlock_table): Delete.  Move to..
1052         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1053         and clflush.
1054         (print_insn): Revert PADLOCK_SPECIAL code.
1055         (OP_E): Delete sfence, lfence, mfence checks.
1056
1057 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1058
1059         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1060         (INVLPG_Fixup): New function.
1061         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1062
1063 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1064
1065         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1066         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1067         (padlock_table): New struct with PadLock instructions.
1068         (print_insn): Handle PADLOCK_SPECIAL.
1069
1070 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1071
1072         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1073         (OP_E): Twiddle clflush to sfence here.
1074
1075 2004-03-08  Nick Clifton  <nickc@redhat.com>
1076
1077         * po/de.po: Updated German translation.
1078
1079 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1080
1081         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1082         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1083         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1084         accordingly.
1085
1086 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1087
1088         * frv-asm.c: Regenerate.
1089         * frv-desc.c: Regenerate.
1090         * frv-desc.h: Regenerate.
1091         * frv-dis.c: Regenerate.
1092         * frv-ibld.c: Regenerate.
1093         * frv-opc.c: Regenerate.
1094         * frv-opc.h: Regenerate.
1095
1096 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1097
1098         * frv-desc.c, frv-opc.c: Regenerate.
1099
1100 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1101
1102         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1103
1104 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1105
1106         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1107         Also correct mistake in the comment.
1108
1109 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1110
1111         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1112         ensure that double registers have even numbers.
1113         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1114         that reserved instruction 0xfffd does not decode the same
1115         as 0xfdfd (ftrv).
1116         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1117         REG_N refers to a double register.
1118         Add REG_N_B01 nibble type and use it instead of REG_NM
1119         in ftrv.
1120         Adjust the bit patterns in a few comments.
1121
1122 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1123
1124         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1125
1126 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1127
1128         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1129
1130 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1131
1132         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1133
1134 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1135
1136         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1137         mtivor32, mtivor33, mtivor34.
1138
1139 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1140
1141         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1142
1143 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1144
1145         * arm-opc.h Maverick accumulator register opcode fixes.
1146
1147 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1148
1149         * m32r-dis.c: Regenerate.
1150
1151 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1152
1153         * sh-opc.h (sh_table): "fsrra", not "fssra".
1154
1155 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1156
1157         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1158         contraints.
1159
1160 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1161
1162         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1163
1164 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1165
1166         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1167         1.  Don't print scale factor on AT&T mode when index missing.
1168
1169 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1170
1171         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1172         when loaded into XR registers.
1173
1174 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1175
1176         * frv-desc.h: Regenerate.
1177         * frv-desc.c: Regenerate.
1178         * frv-opc.c: Regenerate.
1179
1180 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1181
1182         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1183
1184 2004-01-09  Paul Brook  <paul@codesourcery.com>
1185
1186         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1187         specific opcodes.
1188
1189 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1190
1191         * Makefile.am (libopcodes_la_DEPENDENCIES)
1192         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1193         comment about the problem.
1194         * Makefile.in: Regenerate.
1195
1196 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1197
1198         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1199         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1200         cut&paste errors in shifting/truncating numerical operands.
1201         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1202         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1203         (parse_uslo16): Likewise.
1204         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1205         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1206         (parse_s12): Likewise.
1207         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1208         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1209         (parse_uslo16): Likewise.
1210         (parse_uhi16): Parse gothi and gotfuncdeschi.
1211         (parse_d12): Parse got12 and gotfuncdesc12.
1212         (parse_s12): Likewise.
1213
1214 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1215
1216         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1217         instruction which looks similar to an 'rla' instruction.
1218
1219 For older changes see ChangeLog-0203
1220 \f
1221 Local Variables:
1222 mode: change-log
1223 left-margin: 8
1224 fill-column: 74
1225 version-control: never
1226 End: