opcodes/ChangeLog

   1 2006-01-16  Paul Brook  <paul@codesourcery.com>
   2
   3         * m68k-opc.c(m68k_opcodes): Fix opcodes for ColdFire f?abss,
   4         f?add?, and f?sub? instructions.
   5
   6 2006-01-16  Nick Clifton  <nickc@redhat.com>
   7
   8         * po/zh_CN.po: New Chinese (simplified) translation.
   9         * configure.in (ALL_LINGUAS): Add "zh_CH".
  10         * configure: Regenerate.
  11
  12 2006-01-05  Paul Brook  <paul@codesourcery.com>
  13
  14         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
  15
  16 2006-01-06  DJ Delorie  <dj@redhat.com>
  17
  18         * m32c-desc.c: Regenerate.
  19         * m32c-opc.c: Regenerate.
  20         * m32c-opc.h: Regenerate.
  21
  22 2006-01-03  DJ Delorie  <dj@redhat.com>
  23
  24         * cgen-ibld.in (extract_normal): Avoid memory range errors.
  25         * m32c-ibld.c: Regenerated.
  26
  27 2005-12-27  Alan Modra  <amodra@bigpond.net.au>
  28
  29         * Makefile.am: Run "make dep-am".
  30         * Makefile.in: Regenerate.
  31         * po/POTFILES.in: Regenerate.
  32
  33 2005-12-22  Laurent Menten  <laurent.menten@teledisnet.be>
  34
  35         * pj-opc.c (jsr, ret, getstatic, putstatic, getfield, putfield,
  36         invokevirtual, invokespecial, invokestatic, invokeinterface,
  37         goto_w, jsr_w, ldc_quick, ldc_w_quick, ldc2_w_quick,
  38         getfield_quick, putfield_quick, getfield2_quick, putfield2_quick,
  39         getstatic_quick, putstatic_quick, getstatic2_quick,
  40         putstatic2_quick, invokevirtual_quick, invokenonvirtual_quick,
  41         invokesuper_quick, invokestatic_quick, invokeinterface_quick,
  42         aastore_quick, new_quick, anewarray_quick, multianewarray_quick,
  43         checkcast_quick, instanceof_quick, invokevirtiual_quick_w,
  44         getfield_quick_w, putfield_quick_w, nonnull_quick,
  45         agetfield_quick,  aputfield_quick, agetstatic_quick,
  46         aputstatic_quick, aldc_quick, aldc_w_quick, exit_sync_method): Fix
  47         opcodes.
  48
  49 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
  50
  51         Second part of ms1 to mt renaming.
  52         * Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
  53         (stamp-mt): Adjust rule.
  54         (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
  55         adjust.
  56         * Makefile.in: Rebuilt.
  57         * configure: Rebuilt.
  58         * configure.in (bfd_mt_arch): Rename & adjust.
  59         * disassemble.c (ARCH_mt): Renamed.
  60         (disassembler): Adjust.
  61         * mt-asm.c: Renamed, rebuilt.
  62         * mt-desc.c: Renamed, rebuilt.
  63         * mt-desc.h: Renamed, rebuilt.
  64         * mt-dis.c: Renamed, rebuilt.
  65         * mt-ibld.c: Renamed, rebuilt.
  66         * mt-opc.c: Renamed, rebuilt.
  67         * mt-opc.h: Renamed, rebuilt.
  68
  69 2005-12-13  DJ Delorie  <dj@redhat.com>
  70
  71         * m32c-desc.c: Regenerate.
  72         * m32c-opc.c: Regenerate.
  73         * m32c-opc.h: Regenerate.
  74
  75 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
  76
  77         * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
  78         * Makefile.in: Rebuilt.
  79         * configure.in: Replace ms1 files with mt files.
  80         * configure: Rebuilt.
  81
  82 2005-12-08  Jan Beulich  <jbeulich@novell.com>
  83
  84         * i386-dis.c (MAXLEN): Reduce to architectural limit.
  85         (fetch_data): Check for sufficient buffer size.
  86
  87 2005-12-08  Jan Beulich  <jbeulich@novell.com>
  88
  89         * i386-dis.c (OP_ST): Remove prefix in Intel mode.
  90
  91 2005-12-08  Daniel Jacobowitz  <dan@codesourcery.com>
  92
  93         * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
  94
  95 2005-12-07  Hans-Peter Nilsson  <hp@axis.com>
  96
  97         * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
  98         MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
  99
 100 2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>
 101
 102         PR gas/1874
 103         * i386-dis.c (address_mode): New enum type.
 104         (address_mode): New variable.
 105         (mode_64bit): Removed.
 106         (ckprefix): Updated to check address_mode instead of mode_64bit.
 107         (prefix_name): Likewise.
 108         (print_insn): Likewise.
 109         (putop): Likewise.
 110         (print_operand_value): Likewise.
 111         (intel_operand_size): Likewise.
 112         (OP_E): Likewise.
 113         (OP_G): Likewise.
 114         (set_op): Likewise.
 115         (OP_REG): Likewise.
 116         (OP_I): Likewise.
 117         (OP_I64): Likewise.
 118         (OP_OFF): Likewise.
 119         (OP_OFF64): Likewise.
 120         (ptr_reg): Likewise.
 121         (OP_C): Likewise.
 122         (SVME_Fixup): Likewise.
 123         (print_insn): Set address_mode.
 124         (PNI_Fixup): Add 64bit and address size override support for
 125         monitor and mwait.
 126
 127 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 128
 129         * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
 130         (print_with_operands): Check for prefix when [PC+] is seen.
 131
 132 2005-12-02  Dave Brolley  <brolley@redhat.com>
 133
 134         * configure.in (cgen_files): Add cgen-bitset.lo.
 135         (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
 136         * Makefile.am (CFILES): Add cgen-bitset.c.
 137         (ALL_MACHINES): Add cgen-bitset.lo.
 138         (cgen-bitset.lo): New target.
 139         * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
 140         (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
 141         (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
 142         (cgen_bitset_union): Moved from here ...
 143         * cgen-bitset.c: ... to here. New file.
 144         * Makefile.in: Regenerated.
 145         * configure: Regenerated.
 146
 147 2005-11-22  James E Wilson  <wilson@specifix.com>
 148
 149         * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
 150         opcode_fprintf_vma): New.
 151         (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
 152
 153 2005-11-16  Alan Modra  <amodra@bigpond.net.au>
 154
 155         * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim.  Correct
 156         frsqrtes.
 157
 158 2005-11-14  David Ung  <davidu@mips.com>
 159
 160         * mips16-opc.c: Add MIPS16e save/restore opcodes.
 161         * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
 162         codes for save/restore.
 163
 164 2005-11-10  Andreas Schwab  <schwab@suse.de>
 165
 166         * m68k-dis.c (print_insn_m68k): Only match FPU insns with
 167         coprocessor ID 1.
 168
 169 2005-11-08  H.J. Lu  <hongjiu.lu@intel.com>
 170
 171         * m32c-desc.c: Regenerated.
 172
 173 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 174
 175         Add ms2.
 176         * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
 177         ms1-opc.c, ms1-opc.h: Regenerated.
 178
 179 2005-11-07  Steve Ellcey  <sje@cup.hp.com>
 180
 181         * configure: Regenerate after modifying bfd/warning.m4.
 182
 183 2005-11-07  Alan Modra  <amodra@bigpond.net.au>
 184
 185         * i386-dis.c (ckprefix): Handle rex on fwait.  Don't print
 186         ignored rex prefixes here.
 187         (print_insn): Instead, handle them similarly to fwait followed
 188         by non-fp insns.
 189
 190 2005-11-02  H.J. Lu  <hongjiu.lu@intel.com>
 191
 192         * iq2000-desc.c: Regenerated.
 193         * iq2000-desc.h: Likewise.
 194         * iq2000-dis.c: Likewise.
 195         * iq2000-opc.c: Likewise.
 196
 197 2005-11-02  Paul Brook  <paul@codesourcery.com>
 198
 199         * arm-dis.c (print_insn_thumb32): Word align blx target address.
 200
 201 2005-10-31  Alan Modra  <amodra@bigpond.net.au>
 202
 203         * arm-dis.c (print_insn): Warning fix.
 204
 205 2005-10-30  H.J. Lu  <hongjiu.lu@intel.com>
 206
 207         * Makefile.am: Run "make dep-am".
 208         * Makefile.in: Regenerated.
 209
 210         * dep-in.sed: Replace " ./" with " ".
 211
 212 2005-10-28  Dave Brolley  <brolley@redhat.com>
 213
 214         * All CGEN-generated sources: Regenerate.
 215
 216         Contribute the following changes:
 217         2005-09-19  Dave Brolley  <brolley@redhat.com>
 218
 219         * disassemble.c (disassemble_init_for_target): Add 'break' to case for
 220         bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
 221         bfd_arch_m32c case.
 222
 223         2005-02-16  Dave Brolley  <brolley@redhat.com>
 224
 225         * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
 226         cgen_isa_mask_* to cgen_bitset_*.
 227         * cgen-opc.c: Likewise.
 228
 229         2003-11-28  Richard Sandiford  <rsandifo@redhat.com>
 230
 231         * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
 232         * *-dis.c: Regenerate.
 233
 234         2003-06-05  DJ Delorie  <dj@redhat.com>
 235
 236         * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
 237         it, as it may point to a reused buffer. Set prev_isas when we
 238         change cpus.
 239
 240         2002-12-13  Dave Brolley  <brolley@redhat.com>
 241
 242         * cgen-opc.c (cgen_isa_mask_create): New support function for
 243         CGEN_ISA_MASK.
 244         (cgen_isa_mask_init): Ditto.
 245         (cgen_isa_mask_clear): Ditto.
 246         (cgen_isa_mask_add): Ditto.
 247         (cgen_isa_mask_set): Ditto.
 248         (cgen_isa_supported): Ditto.
 249         (cgen_isa_mask_compare): Ditto.
 250         (cgen_isa_mask_intersection): Ditto.
 251         (cgen_isa_mask_copy): Ditto.
 252         (cgen_isa_mask_combine): Ditto.
 253         * cgen-dis.in (libiberty.h): #include it.
 254         (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
 255         (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
 256         * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
 257         * Makefile.in: Regenerated.
 258
 259 2005-10-27  DJ Delorie  <dj@redhat.com>
 260
 261         * m32c-asm.c: Regenerate.
 262         * m32c-desc.c: Regenerate.
 263         * m32c-desc.h: Regenerate.
 264         * m32c-dis.c: Regenerate.
 265         * m32c-ibld.c: Regenerate.
 266         * m32c-opc.c: Regenerate.
 267         * m32c-opc.h: Regenerate.
 268
 269 2005-10-26  DJ Delorie  <dj@redhat.com>
 270
 271         * m32c-asm.c: Regenerate.
 272         * m32c-desc.c: Regenerate.
 273         * m32c-desc.h: Regenerate.
 274         * m32c-dis.c: Regenerate.
 275         * m32c-ibld.c: Regenerate.
 276         * m32c-opc.c: Regenerate.
 277         * m32c-opc.h: Regenerate.
 278
 279 2005-10-26  Paul Brook  <paul@codesourcery.com>
 280
 281         * arm-dis.c (arm_opcodes): Correct "sel" entry.
 282
 283 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 284
 285         * m32r-asm.c: Regenerate.
 286
 287 2005-10-25  DJ Delorie  <dj@redhat.com>
 288
 289         * m32c-asm.c: Regenerate.
 290         * m32c-desc.c: Regenerate.
 291         * m32c-desc.h: Regenerate.
 292         * m32c-dis.c: Regenerate.
 293         * m32c-ibld.c: Regenerate.
 294         * m32c-opc.c: Regenerate.
 295         * m32c-opc.h: Regenerate.
 296
 297 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
 298
 299         * configure.in: Add target architecture bfd_arch_z80.
 300         * configure: Regenerated.
 301         * disassemble.c (disassembler)<ARCH_z80>: Add case
 302         bfd_arch_z80.
 303         * z80-dis.c: New file.
 304
 305 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
 306
 307         * po/POTFILES.in: Regenerate.
 308         * po/opcodes.pot: Regenerate.
 309
 310 2005-10-24  Jan Beulich  <jbeulich@novell.com>
 311
 312         * ia64-asmtab.c: Regenerate.
 313
 314 2005-10-21  DJ Delorie  <dj@redhat.com>
 315
 316         * m32c-asm.c: Regenerate.
 317         * m32c-desc.c: Regenerate.
 318         * m32c-desc.h: Regenerate.
 319         * m32c-dis.c: Regenerate.
 320         * m32c-ibld.c: Regenerate.
 321         * m32c-opc.c: Regenerate.
 322         * m32c-opc.h: Regenerate.
 323
 324 2005-10-21  Nick Clifton  <nickc@redhat.com>
 325
 326         * bfin-dis.c: Tidy up code, removing redundant constructs.
 327
 328 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 329
 330         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
 331         instructions.
 332
 333 2005-10-18  Nick Clifton  <nickc@redhat.com>
 334
 335         * m32r-asm.c: Regenerate after updating m32r.opc.
 336
 337 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
 338
 339         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
 340         reading instruction from memory.
 341
 342 2005-10-18  Nick Clifton  <nickc@redhat.com>
 343
 344         * m32r-asm.c: Regenerate after updating m32r.opc.
 345
 346 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 347
 348         * m32r-asm.c: Regenerate after updating m32r.opc.
 349
 350 2005-10-08  James Lemke  <jim@wasabisystems.com>
 351
 352         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
 353         operations.
 354
 355 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
 356
 357         * ppc-dis.c (struct dis_private): Remove.
 358         (powerpc_dialect): Avoid aliasing warnings.
 359         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
 360
 361 2005-09-30  Nick Clifton  <nickc@redhat.com>
 362
 363         * po/ga.po: New Irish translation.
 364         * configure.in (ALL_LINGUAS): Add "ga".
 365         * configure: Regenerate.
 366
 367 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 368
 369         * Makefile.am: Run "make dep-am".
 370         * Makefile.in: Regenerated.
 371         * aclocal.m4: Likewise.
 372         * configure: Likewise.
 373
 374 2005-09-30  Catherine Moore  <clm@cm00re.com>
 375
 376         * Makefile.am: Bfin support.
 377         * Makefile.in: Regenerated.
 378         * aclocal.m4: Regenerated.
 379         * bfin-dis.c: New file.
 380         * configure.in: Bfin support.
 381         * configure: Regenerated.
 382         * disassemble.c (ARCH_bfin): Define.
 383         (disassembler): Add case for bfd_arch_bfin.
 384
 385 2005-09-28  Jan Beulich  <jbeulich@novell.com>
 386
 387         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
 388         (indirEv): Use it.
 389         (stackEv): New.
 390         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
 391         (dis386): Document and use new 'V' meta character. Use it for
 392         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
 393         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
 394         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
 395         data prefix as used whenever DFLAG was examined. Handle 'V'.
 396         (intel_operand_size): Use stack_v_mode.
 397         (OP_E): Use stack_v_mode, but handle only the special case of
 398         64-bit mode without operand size override here; fall through to
 399         v_mode case otherwise.
 400         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 401         and no operand size override is present.
 402         (OP_J): Use get32s for obtaining the displacement also when rex64
 403         is present.
 404
 405 2005-09-08  Paul Brook  <paul@codesourcery.com>
 406
 407         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 408
 409 2005-09-06  Chao-ying Fu  <fu@mips.com>
 410
 411         * mips-opc.c (MT32): New define.
 412         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 413         bottom to avoid opcode collision with "mftr" and "mttr".
 414         Add MT instructions.
 415         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 416         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 417         formats.
 418
 419 2005-09-02  Paul Brook  <paul@codesourcery.com>
 420
 421         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 422
 423 2005-09-02  Paul Brook  <paul@codesourcery.com>
 424
 425         * arm-dis.c (coprocessor_opcodes): New.
 426         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 427         (print_insn_coprocessor): New function.
 428         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 429         format characters.
 430         (print_insn_thumb32): Use print_insn_coprocessor.
 431
 432 2005-08-30  Paul Brook  <paul@codesourcery.com>
 433
 434         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 435
 436 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 437
 438         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 439         re-use.
 440         (OP_E): Call intel_operand_size, move call site out of mode
 441         dependent code.
 442         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 443         ATTRIBUTE_UNUSED from parameters.
 444         (OP_OFF64): Likewise.
 445         (OP_ESreg): Call intel_operand_size.
 446         (OP_DSreg): Likewise.
 447         (OP_DIR): Use colon rather than semicolon as separator of far
 448         jump/call operands.
 449
 450 2005-08-25  Chao-ying Fu  <fu@mips.com>
 451
 452         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 453         (mips_builtin_opcodes): Add DSP instructions.
 454         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 455         mips64, mips64r2.
 456         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 457         operand formats.
 458
 459 2005-08-23  David Ung  <davidu@mips.com>
 460
 461         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 462         instructions to the table.
 463
 464 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 465
 466         * a29k-dis.c: Delete.
 467         * Makefile.am: Remove a29k support.
 468         * configure.in: Likewise.
 469         * disassemble.c: Likewise.
 470         * Makefile.in: Regenerate.
 471         * configure: Regenerate.
 472         * po/POTFILES.in: Regenerate.
 473
 474 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 475
 476         * ppc-dis.c (powerpc_dialect): Handle e300.
 477         (print_ppc_disassembler_options): Likewise.
 478         * ppc-opc.c (PPCE300): Define.
 479         (powerpc_opcodes): Mark icbt as available for the e300.
 480
 481 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 482
 483         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 484         Use "rp" instead of "%r2" in "b,l" insns.
 485
 486 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 487
 488         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 489         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 490         (main): Likewise.
 491         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 492         and 4 bit optional masks.
 493         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 494         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 495         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 496         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 497         (s390_opformats): Likewise.
 498         * s390-opc.txt: Add new instructions for cpu type z9-109.
 499
 500 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 501
 502         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 503
 504 2005-07-29  Paul Brook  <paul@codesourcery.com>
 505
 506         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 507
 508 2005-07-29  Paul Brook  <paul@codesourcery.com>
 509
 510         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 511         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 512
 513 2005-07-25  DJ Delorie  <dj@redhat.com>
 514
 515         * m32c-asm.c Regenerate.
 516         * m32c-dis.c Regenerate.
 517
 518 2005-07-20  DJ Delorie  <dj@redhat.com>
 519
 520         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 521         enums, so convert them to bit masks, which attributes are.
 522
 523 2005-07-18  Nick Clifton  <nickc@redhat.com>
 524
 525         * configure.in: Restore alpha ordering to list of arches.
 526         * configure: Regenerate.
 527         * disassemble.c: Restore alpha ordering to list of arches.
 528
 529 2005-07-18  Nick Clifton  <nickc@redhat.com>
 530
 531         * m32c-asm.c: Regenerate.
 532         * m32c-desc.c: Regenerate.
 533         * m32c-desc.h: Regenerate.
 534         * m32c-dis.c: Regenerate.
 535         * m32c-ibld.h: Regenerate.
 536         * m32c-opc.c: Regenerate.
 537         * m32c-opc.h: Regenerate.
 538
 539 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 540
 541         * i386-dis.c (PNI_Fixup): Update comment.
 542         (VMX_Fixup): Properly handle the suffix check.
 543
 544 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 545
 546         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 547         mfctl disassembly.
 548
 549 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 550
 551         * Makefile.am: Run "make dep-am".
 552         (stamp-m32c): Fix cpu dependencies.
 553         * Makefile.in: Regenerate.
 554         * ip2k-dis.c: Regenerate.
 555
 556 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 557
 558         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 559         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 560         (Em): New.
 561         (Gm): New.
 562         (VM): New.
 563         (dis386_twobyte): Updated entries 0x78 and 0x79.
 564         (twobyte_has_modrm): Likewise.
 565         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 566         (OP_G): Handle m_mode.
 567
 568 2005-07-14  Jim Blandy  <jimb@redhat.com>
 569
 570         Add support for the Renesas M32C and M16C.
 571         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 572         * m32c-desc.h, m32c-opc.h: New.
 573         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 574         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 575         m32c-opc.c.
 576         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 577         m32c-ibld.lo, m32c-opc.lo.
 578         (CLEANFILES): List stamp-m32c.
 579         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 580         (CGEN_CPUS): Add m32c.
 581         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 582         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 583         (m32c_opc_h): New variable.
 584         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 585         (m32c-opc.lo): New rules.
 586         * Makefile.in: Regenerated.
 587         * configure.in: Add case for bfd_m32c_arch.
 588         * configure: Regenerated.
 589         * disassemble.c (ARCH_m32c): New.
 590         [ARCH_m32c]: #include "m32c-desc.h".
 591         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 592         (disassemble_init_for_target) [ARCH_m32c]: Same.
 593
 594         * cgen-ops.h, cgen-types.h: New files.
 595         * Makefile.am (HFILES): List them.
 596         * Makefile.in: Regenerated.
 597
 598 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 599
 600         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 601         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 602         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 603         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 604         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 605         v850-dis.c: Fix format bugs.
 606         * ia64-gen.c (fail, warn): Add format attribute.
 607         * or32-opc.c (debug): Likewise.
 608
 609 2005-07-07  Khem Raj  <kraj@mvista.com>
 610
 611         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 612         disassembly pattern.
 613
 614 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 615
 616         * Makefile.am (stamp-m32r): Fix path to cpu files.
 617         (stamp-m32r, stamp-iq2000): Likewise.
 618         * Makefile.in: Regenerate.
 619         * m32r-asm.c: Regenerate.
 620         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 621         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 622
 623 2005-07-05  Nick Clifton  <nickc@redhat.com>
 624
 625         * iq2000-asm.c: Regenerate.
 626         * ms1-asm.c: Regenerate.
 627
 628 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 629
 630         * i386-dis.c (SVME_Fixup): New.
 631         (grps): Use it for the lidt entry.
 632         (PNI_Fixup): Call OP_M rather than OP_E.
 633         (INVLPG_Fixup): Likewise.
 634
 635 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 636
 637         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 638
 639 2005-07-01  Nick Clifton  <nickc@redhat.com>
 640
 641         * a29k-dis.c: Update to ISO C90 style function declarations and
 642         fix formatting.
 643         * alpha-opc.c: Likewise.
 644         * arc-dis.c: Likewise.
 645         * arc-opc.c: Likewise.
 646         * avr-dis.c: Likewise.
 647         * cgen-asm.in: Likewise.
 648         * cgen-dis.in: Likewise.
 649         * cgen-ibld.in: Likewise.
 650         * cgen-opc.c: Likewise.
 651         * cris-dis.c: Likewise.
 652         * d10v-dis.c: Likewise.
 653         * d30v-dis.c: Likewise.
 654         * d30v-opc.c: Likewise.
 655         * dis-buf.c: Likewise.
 656         * dlx-dis.c: Likewise.
 657         * h8300-dis.c: Likewise.
 658         * h8500-dis.c: Likewise.
 659         * hppa-dis.c: Likewise.
 660         * i370-dis.c: Likewise.
 661         * i370-opc.c: Likewise.
 662         * m10200-dis.c: Likewise.
 663         * m10300-dis.c: Likewise.
 664         * m68k-dis.c: Likewise.
 665         * m88k-dis.c: Likewise.
 666         * mips-dis.c: Likewise.
 667         * mmix-dis.c: Likewise.
 668         * msp430-dis.c: Likewise.
 669         * ns32k-dis.c: Likewise.
 670         * or32-dis.c: Likewise.
 671         * or32-opc.c: Likewise.
 672         * pdp11-dis.c: Likewise.
 673         * pj-dis.c: Likewise.
 674         * s390-dis.c: Likewise.
 675         * sh-dis.c: Likewise.
 676         * sh64-dis.c: Likewise.
 677         * sparc-dis.c: Likewise.
 678         * sparc-opc.c: Likewise.
 679         * sysdep.h: Likewise.
 680         * tic30-dis.c: Likewise.
 681         * tic4x-dis.c: Likewise.
 682         * tic80-dis.c: Likewise.
 683         * v850-dis.c: Likewise.
 684         * v850-opc.c: Likewise.
 685         * vax-dis.c: Likewise.
 686         * w65-dis.c: Likewise.
 687         * z8kgen.c: Likewise.
 688
 689         * fr30-*: Regenerate.
 690         * frv-*: Regenerate.
 691         * ip2k-*: Regenerate.
 692         * iq2000-*: Regenerate.
 693         * m32r-*: Regenerate.
 694         * ms1-*: Regenerate.
 695         * openrisc-*: Regenerate.
 696         * xstormy16-*: Regenerate.
 697
 698 2005-06-23  Ben Elliston  <bje@gnu.org>
 699
 700         * m68k-dis.c: Use ISC C90.
 701         * m68k-opc.c: Formatting fixes.
 702
 703 2005-06-16  David Ung  <davidu@mips.com>
 704
 705         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 706         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 707
 708 2005-06-15  Dave Brolley  <brolley@redhat.com>
 709
 710         Contribute Morpho ms1 on behalf of Red Hat
 711         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 712         ms1-opc.h: New files, Morpho ms1 target.
 713
 714         2004-05-14  Stan Cox  <scox@redhat.com>
 715
 716         * disassemble.c (ARCH_ms1): Define.
 717         (disassembler): Handle bfd_arch_ms1
 718
 719         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 720
 721         * Makefile.am, Makefile.in: Add ms1 target.
 722         * configure.in: Ditto.
 723
 724 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 725
 726         * arm-opc.h: Delete; fold contents into ...
 727         * arm-dis.c: ... here.  Move includes of internal COFF headers
 728         next to includes of internal ELF headers.
 729         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 730         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 731         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 732         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 733         (iwmmxt_wwnames, iwmmxt_wwssnames):
 734         Make const.
 735         (regnames): Remove iWMMXt coprocessor register sets.
 736         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 737         (get_arm_regnames): Adjust fourth argument to match above changes.
 738         (set_iwmmxt_regnames): Delete.
 739         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 740         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 741         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 742         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 743         ISO syntax for function pointer calls.
 744
 745 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 746
 747         * arm-dis.c: Split up the comments describing the format codes, so
 748         that the ARM and 16-bit Thumb opcode tables each have comments
 749         preceding them that describe all the codes, and only the codes,
 750         valid in those tables.  (32-bit Thumb table is already like this.)
 751         Reorder the lists in all three comments to match the order in
 752         which the codes are implemented.
 753         Remove all forward declarations of static functions.  Convert all
 754         function definitions to ISO C format.
 755         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 756         Return nothing.
 757         (print_insn_thumb16): Remove unused case 'I'.
 758         (print_insn): Update for changed calling convention of subroutines.
 759
 760 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 761
 762         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 763         hex (but retain it being displayed as signed). Remove redundant
 764         checks. Add handling of displacements for 16-bit addressing in Intel
 765         mode.
 766
 767 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 768
 769         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 770         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 771         masking of 'rm' in 16-bit memory address handling.
 772
 773 2005-05-19  Anton Blanchard  <anton@samba.org>
 774
 775         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 776         (print_ppc_disassembler_options): Document it.
 777         * ppc-opc.c (SVC_LEV): Define.
 778         (LEV): Allow optional operand.
 779         (POWER5): Define.
 780         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 781         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 782
 783 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 784
 785         * Makefile.in:  Regenerate.
 786
 787 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 788
 789         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 790         instructions.  Adjust disassembly of some opcodes to match
 791         unified syntax.
 792         (thumb32_opcodes): New table.
 793         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 794         two-halfword branches here.
 795         (print_insn_thumb32): New function.
 796         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 797         and print_insn_thumb32.  Be consistent about order of
 798         halfwords when printing 32-bit instructions.
 799
 800 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 801
 802         PR 843
 803         * i386-dis.c (branch_v_mode): New.
 804         (indirEv): Use branch_v_mode instead of v_mode.
 805         (OP_E): Handle branch_v_mode.
 806
 807 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 808
 809         * d10v-dis.c (dis_2_short): Support 64bit host.
 810
 811 2005-05-07  Nick Clifton  <nickc@redhat.com>
 812
 813         * po/nl.po: Updated translation.
 814
 815 2005-05-07  Nick Clifton  <nickc@redhat.com>
 816
 817         * Update the address and phone number of the FSF organization in
 818         the GPL notices in the following files:
 819         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 820         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 821         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 822         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 823         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 824         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 825         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 826         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 827         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 828         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 829         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 830         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 831         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 832         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 833         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 834         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 835         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 836         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 837         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 838         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 839         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 840         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 841         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 842         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 843         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 844         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 845         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 846         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 847         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 848         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 849         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 850         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 851         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 852
 853 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 854
 855         * ia64-opc.c: Include sysdep.h before libiberty.h.
 856
 857 2005-05-05  Nick Clifton  <nickc@redhat.com>
 858
 859         * configure.in (ALL_LINGUAS): Add vi.
 860         * configure: Regenerate.
 861         * po/vi.po: New.
 862
 863 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 864
 865         * configure.in: Fix the check for basename declaration.
 866         * configure: Regenerate.
 867
 868 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 869
 870         * ppc-opc.c (RTO): Define.
 871         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 872         entries to suit PPC440.
 873
 874 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 875
 876         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 877         Add xcrypt-ctr.
 878
 879 2005-04-14  Nick Clifton  <nickc@redhat.com>
 880
 881         * po/fi.po: New translation: Finnish.
 882         * configure.in (ALL_LINGUAS): Add fi.
 883         * configure: Regenerate.
 884
 885 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 886
 887         * Makefile.am (NO_WERROR): Define.
 888         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 889         * Makefile.in: Regenerate.
 890         * aclocal.m4: Regenerate.
 891         * configure: Regenerate.
 892
 893 2005-04-04  Nick Clifton  <nickc@redhat.com>
 894
 895         * fr30-asm.c: Regenerate.
 896         * frv-asm.c: Regenerate.
 897         * iq2000-asm.c: Regenerate.
 898         * m32r-asm.c: Regenerate.
 899         * openrisc-asm.c: Regenerate.
 900
 901 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 902
 903         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 904         visible operands in Intel mode. The first operand of monitor is
 905         %rax in 64-bit mode.
 906
 907 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 908
 909         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 910         easier future additions.
 911
 912 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 913
 914         * configure.in: Check for basename.
 915         * configure: Regenerate.
 916         * config.in: Ditto.
 917
 918 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 919
 920         * i386-dis.c (SEG_Fixup): New.
 921         (Sv): New.
 922         (dis386): Use "Sv" for 0x8c and 0x8e.
 923
 924 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 925             Nick Clifton  <nickc@redhat.com>
 926
 927         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 928         function entry mask addresses.
 929         (entry_addr_occupied_slots): New variable: The number of occupied
 930         elements in entry_addr.
 931         (entry_addr_total_slots): New variable: The total number of
 932         elements in entry_addr.
 933         (parse_disassembler_options): New function.  Fills in the entry_addr
 934         array.
 935         (free_entry_array): New function.  Release the memory used by the
 936         entry addr array.  Suppressed because there is no way to call it.
 937         (is_function_entry): Check if a given address is a function's
 938         start address by looking at supplied entry mask addresses and
 939         symbol information, if available.
 940         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 941
 942 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 943
 944         * cris-dis.c (print_with_operands): Use ~31L for long instead
 945         of ~31.
 946
 947 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 948
 949         * mmix-opc.c (O): Revert the last change.
 950         (Z): Likewise.
 951
 952 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 953
 954         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 955         (Z): Likewise.
 956
 957 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 958
 959         * mmix-opc.c (O, Z): Force expression as unsigned long.
 960
 961 2005-03-18  Nick Clifton  <nickc@redhat.com>
 962
 963         * ip2k-asm.c: Regenerate.
 964         * op/opcodes.pot: Regenerate.
 965
 966 2005-03-16  Nick Clifton  <nickc@redhat.com>
 967             Ben Elliston  <bje@au.ibm.com>
 968
 969         * configure.in (werror): New switch: Add -Werror to the
 970         compiler command line.  Enabled by default.  Disable via
 971         --disable-werror.
 972         * configure: Regenerate.
 973
 974 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 975
 976         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 977         BOOKE.
 978
 979 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 980
 981         * po/es.po: Commit new Spanish translation.
 982
 983         * po/fr.po: Commit new French translation.
 984
 985 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 986
 987         * vax-dis.c: Fix spelling error
 988         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 989         of just "Entry mask: < r1 ... >"
 990
 991 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 992
 993         * arm-dis.c (arm_opcodes): Document %E and %V.
 994         Add entries for v6T2 ARM instructions:
 995         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 996         (print_insn_arm): Add support for %E and %V.
 997         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 998
 999 2005-03-10  Jeff Baker  <jbaker@qnx.com>
1000             Alan Modra  <amodra@bigpond.net.au>
1001
1002         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
1003         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
1004         (SPRG_MASK): Delete.
1005         (XSPRG_MASK): Mask off extra bits now part of sprg field.
1006         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
1007         mfsprg4..7 after msprg and consolidate.
1008
1009 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
1010
1011         * vax-dis.c (entry_mask_bit): New array.
1012         (print_insn_vax): Decode function entry mask.
1013
1014 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
1015
1016         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
1017
1018 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
1019
1020         * po/opcodes.pot: Regenerate.
1021
1022 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
1023
1024         * arc-dis.c (a4_decoding_class): New enum.
1025         (dsmOneArcInst): Use the enum values for the decoding class.
1026         Remove redundant case in the switch for decodingClass value 11.
1027
1028 2005-03-02  Jan Beulich  <jbeulich@novell.com>
1029
1030         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
1031         accesses.
1032         (OP_C): Consider lock prefix in non-64-bit modes.
1033
1034 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
1035
1036         * cris-dis.c (format_hex): Remove ineffective warning fix.
1037         * crx-dis.c (make_instruction): Warning fix.
1038         * frv-asm.c: Regenerate.
1039
1040 2005-02-23  Nick Clifton  <nickc@redhat.com>
1041
1042         * cgen-dis.in: Use bfd_byte for buffers that are passed to
1043         read_memory.
1044
1045         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
1046
1047         * crx-dis.c (make_instruction): Move argument structure into inner
1048         scope and ensure that all of its fields are initialised before
1049         they are used.
1050
1051         * fr30-asm.c: Regenerate.
1052         * fr30-dis.c: Regenerate.
1053         * frv-asm.c: Regenerate.
1054         * frv-dis.c: Regenerate.
1055         * ip2k-asm.c: Regenerate.
1056         * ip2k-dis.c: Regenerate.
1057         * iq2000-asm.c: Regenerate.
1058         * iq2000-dis.c: Regenerate.
1059         * m32r-asm.c: Regenerate.
1060         * m32r-dis.c: Regenerate.
1061         * openrisc-asm.c: Regenerate.
1062         * openrisc-dis.c: Regenerate.
1063         * xstormy16-asm.c: Regenerate.
1064         * xstormy16-dis.c: Regenerate.
1065
1066 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
1067
1068         * arc-ext.c: Warning fixes.
1069         * arc-ext.h: Likewise.
1070         * cgen-opc.c: Likewise.
1071         * ia64-gen.c: Likewise.
1072         * maxq-dis.c: Likewise.
1073         * ns32k-dis.c: Likewise.
1074         * w65-dis.c: Likewise.
1075         * ia64-asmtab.c: Regenerate.
1076
1077 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
1078
1079         * fr30-desc.c: Regenerate.
1080         * fr30-desc.h: Regenerate.
1081         * fr30-opc.c: Regenerate.
1082         * fr30-opc.h: Regenerate.
1083         * frv-desc.c: Regenerate.
1084         * frv-desc.h: Regenerate.
1085         * frv-opc.c: Regenerate.
1086         * frv-opc.h: Regenerate.
1087         * ip2k-desc.c: Regenerate.
1088         * ip2k-desc.h: Regenerate.
1089         * ip2k-opc.c: Regenerate.
1090         * ip2k-opc.h: Regenerate.
1091         * iq2000-desc.c: Regenerate.
1092         * iq2000-desc.h: Regenerate.
1093         * iq2000-opc.c: Regenerate.
1094         * iq2000-opc.h: Regenerate.
1095         * m32r-desc.c: Regenerate.
1096         * m32r-desc.h: Regenerate.
1097         * m32r-opc.c: Regenerate.
1098         * m32r-opc.h: Regenerate.
1099         * m32r-opinst.c: Regenerate.
1100         * openrisc-desc.c: Regenerate.
1101         * openrisc-desc.h: Regenerate.
1102         * openrisc-opc.c: Regenerate.
1103         * openrisc-opc.h: Regenerate.
1104         * xstormy16-desc.c: Regenerate.
1105         * xstormy16-desc.h: Regenerate.
1106         * xstormy16-opc.c: Regenerate.
1107         * xstormy16-opc.h: Regenerate.
1108
1109 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
1110
1111         * Makefile.am: Run "make dep-am"
1112         * Makefile.in: Regenerate.
1113
1114 2005-02-15  Nick Clifton  <nickc@redhat.com>
1115
1116         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1117         compile time warnings.
1118         (print_keyword): Likewise.
1119         (default_print_insn): Likewise.
1120
1121         * fr30-desc.c: Regenerated.
1122         * fr30-desc.h: Regenerated.
1123         * fr30-dis.c: Regenerated.
1124         * fr30-opc.c: Regenerated.
1125         * fr30-opc.h: Regenerated.
1126         * frv-desc.c: Regenerated.
1127         * frv-dis.c: Regenerated.
1128         * frv-opc.c: Regenerated.
1129         * ip2k-asm.c: Regenerated.
1130         * ip2k-desc.c: Regenerated.
1131         * ip2k-desc.h: Regenerated.
1132         * ip2k-dis.c: Regenerated.
1133         * ip2k-opc.c: Regenerated.
1134         * ip2k-opc.h: Regenerated.
1135         * iq2000-desc.c: Regenerated.
1136         * iq2000-dis.c: Regenerated.
1137         * iq2000-opc.c: Regenerated.
1138         * m32r-asm.c: Regenerated.
1139         * m32r-desc.c: Regenerated.
1140         * m32r-desc.h: Regenerated.
1141         * m32r-dis.c: Regenerated.
1142         * m32r-opc.c: Regenerated.
1143         * m32r-opc.h: Regenerated.
1144         * m32r-opinst.c: Regenerated.
1145         * openrisc-desc.c: Regenerated.
1146         * openrisc-desc.h: Regenerated.
1147         * openrisc-dis.c: Regenerated.
1148         * openrisc-opc.c: Regenerated.
1149         * openrisc-opc.h: Regenerated.
1150         * xstormy16-desc.c: Regenerated.
1151         * xstormy16-desc.h: Regenerated.
1152         * xstormy16-dis.c: Regenerated.
1153         * xstormy16-opc.c: Regenerated.
1154         * xstormy16-opc.h: Regenerated.
1155
1156 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
1157
1158         * dis-buf.c (perror_memory): Use sprintf_vma to print out
1159         address.
1160
1161 2005-02-11  Nick Clifton  <nickc@redhat.com>
1162
1163         * iq2000-asm.c: Regenerate.
1164
1165         * frv-dis.c: Regenerate.
1166
1167 2005-02-07  Jim Blandy  <jimb@redhat.com>
1168
1169         * Makefile.am (CGEN): Load guile.scm before calling the main
1170         application script.
1171         * Makefile.in: Regenerated.
1172         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1173         Simply pass the cgen-opc.scm path to ${cgen} as its first
1174         argument; ${cgen} itself now contains the '-s', or whatever is
1175         appropriate for the Scheme being used.
1176
1177 2005-01-31  Andrew Cagney  <cagney@gnu.org>
1178
1179         * configure: Regenerate to track ../gettext.m4.
1180
1181 2005-01-31  Jan Beulich  <jbeulich@novell.com>
1182
1183         * ia64-gen.c (NELEMS): Define.
1184         (shrink): Generate alias with missing second predicate register when
1185         opcode has two outputs and these are both predicates.
1186         * ia64-opc-i.c (FULL17): Define.
1187         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1188         here to generate output template.
1189         (TBITCM, TNATCM): Undefine after use.
1190         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1191         first input. Add ld16 aliases without ar.csd as second output. Add
1192         st16 aliases without ar.csd as second input. Add cmpxchg aliases
1193         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1194         ar.ccv as third/fourth inputs. Consolidate through...
1195         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1196         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1197         * ia64-asmtab.c: Regenerate.
1198
1199 2005-01-27  Andrew Cagney  <cagney@gnu.org>
1200
1201         * configure: Regenerate to track ../gettext.m4 change.
1202
1203 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
1204
1205         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
1206         * frv-asm.c: Rebuilt.
1207         * frv-desc.c: Rebuilt.
1208         * frv-desc.h: Rebuilt.
1209         * frv-dis.c: Rebuilt.
1210         * frv-ibld.c: Rebuilt.
1211         * frv-opc.c: Rebuilt.
1212         * frv-opc.h: Rebuilt.
1213
1214 2005-01-24  Andrew Cagney  <cagney@gnu.org>
1215
1216         * configure: Regenerate, ../gettext.m4 was updated.
1217
1218 2005-01-21  Fred Fish  <fnf@specifixinc.com>
1219
1220         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
1221         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1222         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1223         * mips-dis.c: Ditto.
1224
1225 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
1226
1227         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1228
1229 2005-01-19  Fred Fish  <fnf@specifixinc.com>
1230
1231         * mips-dis.c (no_aliases): New disassembly option flag.
1232         (set_default_mips_dis_options): Init no_aliases to zero.
1233         (parse_mips_dis_option): Handle no-aliases option.
1234         (print_insn_mips): Ignore table entries that are aliases
1235         if no_aliases is set.
1236         (print_insn_mips16): Ditto.
1237         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1238         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
1239         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1240         * mips16-opc.c (mips16_opcodes): Ditto.
1241
1242 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
1243
1244         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1245         (inheritance diagram): Add missing edge.
1246         (arch_sh1_up): Rename arch_sh_up to match external name to make life
1247         easier for the testsuite.
1248         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1249         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1250         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1251         arch_sh2a_or_sh4_up child.
1252         (sh_table): Do renaming as above.
1253         Correct comment for ldc.l for gas testsuite to read.
1254         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1255         Correct comments for movy.w and movy.l for gas testsuite to read.
1256         Correct comments for fmov.d and fmov.s for gas testsuite to read.
1257
1258 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1259
1260         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1261
1262 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1263
1264         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1265
1266 2005-01-10  Andreas Schwab  <schwab@suse.de>
1267
1268         * disassemble.c (disassemble_init_for_target) <case
1269         bfd_arch_ia64>: Set skip_zeroes to 16.
1270         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1271
1272 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
1273
1274         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1275
1276 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
1277
1278         * avr-dis.c: Prettyprint. Added printing of symbol names in all
1279         memory references. Convert avr_operand() to C90 formatting.
1280
1281 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
1282
1283         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1284
1285 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
1286
1287         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1288         (no_op_insn): Initialize array with instructions that have no
1289         operands.
1290         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1291
1292 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
1293
1294         * arm-dis.c: Correct top-level comment.
1295
1296 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1297
1298         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1299         architecuture defining the insn.
1300         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1301         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1302         field.
1303         Also include opcode/arm.h.
1304         * Makefile.am (arm-dis.lo): Update dependency list.
1305         * Makefile.in: Regenerate.
1306
1307 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1308
1309         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1310         reflect the change to the short immediate syntax.
1311
1312 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1313
1314         * or32-opc.c (debug): Warning fix.
1315         * po/POTFILES.in: Regenerate.
1316
1317         * maxq-dis.c: Formatting.
1318         (print_insn): Warning fix.
1319
1320 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1321
1322         * arm-dis.c (WORD_ADDRESS): Define.
1323         (print_insn): Use it.  Correct big-endian end-of-section handling.
1324
1325 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1326             Vineet Sharma      <vineets@noida.hcltech.com>
1327
1328         * maxq-dis.c: New file.
1329         * disassemble.c (ARCH_maxq): Define.
1330         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1331         instructions..
1332         * configure.in: Add case for bfd_maxq_arch.
1333         * configure: Regenerate.
1334         * Makefile.am: Add support for maxq-dis.c
1335         * Makefile.in: Regenerate.
1336         * aclocal.m4: Regenerate.
1337
1338 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1339
1340         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1341         mode.
1342         * crx-dis.c: Likewise.
1343
1344 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1345
1346         Generally, handle CRISv32.
1347         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1348         (struct cris_disasm_data): New type.
1349         (format_reg, format_hex, cris_constraint, print_flags)
1350         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1351         callers changed.
1352         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1353         (print_insn_crisv32_without_register_prefix)
1354         (print_insn_crisv10_v32_with_register_prefix)
1355         (print_insn_crisv10_v32_without_register_prefix)
1356         (cris_parse_disassembler_options): New functions.
1357         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1358         parameter.  All callers changed.
1359         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1360         failure.
1361         (cris_constraint) <case 'Y', 'U'>: New cases.
1362         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1363         for constraint 'n'.
1364         (print_with_operands) <case 'Y'>: New case.
1365         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1366         <case 'N', 'Y', 'Q'>: New cases.
1367         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1368         (print_insn_cris_with_register_prefix)
1369         (print_insn_cris_without_register_prefix): Call
1370         cris_parse_disassembler_options.
1371         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1372         for CRISv32 and the size of immediate operands.  New v32-only
1373         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1374         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1375         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1376         Change brp to be v3..v10.
1377         (cris_support_regs): New vector.
1378         (cris_opcodes): Update head comment.  New format characters '[',
1379         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1380         Add new opcodes for v32 and adjust existing opcodes to accommodate
1381         differences to earlier variants.
1382         (cris_cond15s): New vector.
1383
1384 2004-11-04 Jan Beulich <jbeulich@novell.com>
1385
1386         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1387         (indirEb): Remove.
1388         (Mp): Use f_mode rather than none at all.
1389         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1390         replaces what previously was x_mode; x_mode now means 128-bit SSE
1391         operands.
1392         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1393         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1394         pinsrw's second operand is Edqw.
1395         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1396         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1397         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1398         mode when an operand size override is present or always suffixing.
1399         More instructions will need to be added to this group.
1400         (putop): Handle new macro chars 'C' (short/long suffix selector),
1401         'I' (Intel mode override for following macro char), and 'J' (for
1402         adding the 'l' prefix to far branches in AT&T mode). When an
1403         alternative was specified in the template, honor macro character when
1404         specified for Intel mode.
1405         (OP_E): Handle new *_mode values. Correct pointer specifications for
1406         memory operands. Consolidate output of index register.
1407         (OP_G): Handle new *_mode values.
1408         (OP_I): Handle const_1_mode.
1409         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1410         respective opcode prefix bits have been consumed.
1411         (OP_EM, OP_EX): Provide some default handling for generating pointer
1412         specifications.
1413
1414 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1415
1416         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1417         COP_INST macro.
1418
1419 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1420
1421         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1422         (getregliststring): Support HI/LO and user registers.
1423         * crx-opc.c (crx_instruction): Update data structure according to the
1424         rearrangement done in CRX opcode header file.
1425         (crx_regtab):  Likewise.
1426         (crx_optab):  Likewise.
1427         (crx_instruction): Reorder load/stor instructions, remove unsupported
1428         formats.
1429         support new Co-Processor instruction 'cpi'.
1430
1431 2004-10-27  Nick Clifton  <nickc@redhat.com>
1432
1433         * opcodes/iq2000-asm.c: Regenerate.
1434         * opcodes/iq2000-desc.c: Regenerate.
1435         * opcodes/iq2000-desc.h: Regenerate.
1436         * opcodes/iq2000-dis.c: Regenerate.
1437         * opcodes/iq2000-ibld.c: Regenerate.
1438         * opcodes/iq2000-opc.c: Regenerate.
1439         * opcodes/iq2000-opc.h: Regenerate.
1440
1441 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1442
1443         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1444         us4, us5 (respectively).
1445         Remove unsupported 'popa' instruction.
1446         Reverse operands order in store co-processor instructions.
1447
1448 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1449
1450         * Makefile.am: Run "make dep-am"
1451         * Makefile.in: Regenerate.
1452
1453 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1454
1455         * xtensa-dis.c: Use ISO C90 formatting.
1456
1457 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1458
1459         * ppc-opc.c: Revert 2004-09-09 change.
1460
1461 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1462
1463         * xtensa-dis.c (state_names): Delete.
1464         (fetch_data): Use xtensa_isa_maxlength.
1465         (print_xtensa_operand): Replace operand parameter with opcode/operand
1466         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1467         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1468         instruction bundles.  Use xmalloc instead of malloc.
1469
1470 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1471
1472         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1473         initializers.
1474
1475 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1476
1477         * crx-opc.c (crx_instruction): Support Co-processor insns.
1478         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1479         (getregliststring): Change function to use the above enum.
1480         (print_arg): Handle CO-Processor insns.
1481         (crx_cinvs): Add 'b' option to invalidate the branch-target
1482         cache.
1483
1484 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1485
1486         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1487         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1488         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1489         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1490         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1491
1492 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1493
1494         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1495         rather than add it.
1496
1497 2004-09-30  Paul Brook  <paul@codesourcery.com>
1498
1499         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1500         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1501
1502 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1503
1504         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1505         (CONFIG_STATUS_DEPENDENCIES): New.
1506         (Makefile): Removed.
1507         (config.status): Likewise.
1508         * Makefile.in: Regenerated.
1509
1510 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1511
1512         * Makefile.am: Run "make dep-am".
1513         * Makefile.in: Regenerate.
1514         * aclocal.m4: Regenerate.
1515         * configure: Regenerate.
1516         * po/POTFILES.in: Regenerate.
1517         * po/opcodes.pot: Regenerate.
1518
1519 2004-09-11  Andreas Schwab  <schwab@suse.de>
1520
1521         * configure: Rebuild.
1522
1523 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1524
1525         * ppc-opc.c (L): Make this field not optional.
1526
1527 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1528
1529         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1530         Fix parameter to 'm[t|f]csr' insns.
1531
1532 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1533
1534         * configure.in: Autoupdate to autoconf 2.59.
1535         * aclocal.m4: Rebuild with aclocal 1.4p6.
1536         * configure: Rebuild with autoconf 2.59.
1537         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1538         bfd changes for autoconf 2.59 on the way).
1539         * config.in: Rebuild with autoheader 2.59.
1540
1541 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1542
1543         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1544
1545 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1546
1547         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1548         (GRPPADLCK2): New define.
1549         (twobyte_has_modrm): True for 0xA6.
1550         (grps): GRPPADLCK2 for opcode 0xA6.
1551
1552 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1553
1554         Introduce SH2a support.
1555         * sh-opc.h (arch_sh2a_base): Renumber.
1556         (arch_sh2a_nofpu_base): Remove.
1557         (arch_sh_base_mask): Adjust.
1558         (arch_opann_mask): New.
1559         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1560         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1561         (sh_table): Adjust whitespace.
1562         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1563         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1564         instruction list throughout.
1565         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1566         of arch_sh2a in instruction list throughout.
1567         (arch_sh2e_up): Accomodate above changes.
1568         (arch_sh2_up): Ditto.
1569         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1570         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1571         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1572         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1573         * sh-opc.h (arch_sh2a_nofpu): New.
1574         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1575         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1576         instruction.
1577         2004-01-20  DJ Delorie  <dj@redhat.com>
1578         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1579         2003-12-29  DJ Delorie  <dj@redhat.com>
1580         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1581         sh_opcode_info, sh_table): Add sh2a support.
1582         (arch_op32): New, to tag 32-bit opcodes.
1583         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1584         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1585         * sh-opc.h (arch_sh2a): Add.
1586         * sh-dis.c (arch_sh2a): Handle.
1587         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1588
1589 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1590
1591         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1592
1593 2004-07-22  Nick Clifton  <nickc@redhat.com>
1594
1595         PR/280
1596         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1597         insns - this is done by objdump itself.
1598         * h8500-dis.c (print_insn_h8500): Likewise.
1599
1600 2004-07-21  Jan Beulich <jbeulich@novell.com>
1601
1602         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1603         regardless of address size prefix in effect.
1604         (ptr_reg): Size or address registers does not depend on rex64, but
1605         on the presence of an address size override.
1606         (OP_MMX): Use rex.x only for xmm registers.
1607         (OP_EM): Use rex.z only for xmm registers.
1608
1609 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1610
1611         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1612         move/branch operations to the bottom so that VR5400 multimedia
1613         instructions take precedence in disassembly.
1614
1615 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1616
1617         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1618         ISA-specific "break" encoding.
1619
1620 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1621
1622         * arm-opc.h: Fix typo in comment.
1623
1624 2004-07-11  Andreas Schwab  <schwab@suse.de>
1625
1626         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1627
1628 2004-07-09  Andreas Schwab  <schwab@suse.de>
1629
1630         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1631
1632 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1633
1634         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1635         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1636         (crx-dis.lo): New target.
1637         (crx-opc.lo): Likewise.
1638         * Makefile.in: Regenerate.
1639         * configure.in: Handle bfd_crx_arch.
1640         * configure: Regenerate.
1641         * crx-dis.c: New file.
1642         * crx-opc.c: New file.
1643         * disassemble.c (ARCH_crx): Define.
1644         (disassembler): Handle ARCH_crx.
1645
1646 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1647
1648         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1649         * ia64-asmtab.c: Regnerate.
1650
1651 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1652
1653         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1654         (extract_fxm): Don't test dialect.
1655         (XFXFXM_MASK): Include the power4 bit.
1656         (XFXM): Add p4 param.
1657         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1658
1659 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1660
1661         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1662         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1663
1664 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1665
1666         * ppc-opc.c (BH, XLBH_MASK): Define.
1667         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1668
1669 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1670
1671         * i386-dis.c (x_mode): Comment.
1672         (two_source_ops): File scope.
1673         (float_mem): Correct fisttpll and fistpll.
1674         (float_mem_mode): New table.
1675         (dofloat): Use it.
1676         (OP_E): Correct intel mode PTR output.
1677         (ptr_reg): Use open_char and close_char.
1678         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1679         operands.  Set two_source_ops.
1680
1681 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1682
1683         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1684         instead of _raw_size.
1685
1686 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1687
1688         * ia64-gen.c (in_iclass): Handle more postinc st
1689         and ld variants.
1690         * ia64-asmtab.c: Rebuilt.
1691
1692 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1693
1694         * s390-opc.txt: Correct architecture mask for some opcodes.
1695         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1696         in the esa mode as well.
1697
1698 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1699
1700         * sh-dis.c (target_arch): Make unsigned.
1701         (print_insn_sh): Replace (most of) switch with a call to
1702         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1703         * sh-opc.h: Redefine architecture flags values.
1704         Add sh3-nommu architecture.
1705         Reorganise <arch>_up macros so they make more visual sense.
1706         (SH_MERGE_ARCH_SET): Define new macro.
1707         (SH_VALID_BASE_ARCH_SET): Likewise.
1708         (SH_VALID_MMU_ARCH_SET): Likewise.
1709         (SH_VALID_CO_ARCH_SET): Likewise.
1710         (SH_VALID_ARCH_SET): Likewise.
1711         (SH_MERGE_ARCH_SET_VALID): Likewise.
1712         (SH_ARCH_SET_HAS_FPU): Likewise.
1713         (SH_ARCH_SET_HAS_DSP): Likewise.
1714         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1715         (sh_get_arch_from_bfd_mach): Add prototype.
1716         (sh_get_arch_up_from_bfd_mach): Likewise.
1717         (sh_get_bfd_mach_from_arch_set): Likewise.
1718         (sh_merge_bfd_arc): Likewise.
1719
1720 2004-05-24  Peter Barada  <peter@the-baradas.com>
1721
1722         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1723         into new match_insn_m68k function.  Loop over canidate
1724         matches and select first that completely matches.
1725         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1726         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1727         to verify addressing for MAC/EMAC.
1728         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1729         reigster halves since 'fpu' and 'spl' look misleading.
1730         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1731         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1732         first, tighten up match masks.
1733         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1734         'size' from special case code in print_insn_m68k to
1735         determine decode size of insns.
1736
1737 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1738
1739         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1740         well as when -mpower4.
1741
1742 2004-05-13  Nick Clifton  <nickc@redhat.com>
1743
1744         * po/fr.po: Updated French translation.
1745
1746 2004-05-05  Peter Barada  <peter@the-baradas.com>
1747
1748         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1749         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1750         * m68k-op.c: Switch from ColdFire chips to core variants.
1751
1752 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1753
1754         PR 147.
1755         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1756
1757 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1758
1759         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1760         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1761
1762 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1763
1764         * sh-dis.c (print_insn_sh): Print the value in constant pool
1765         as a symbol if it looks like a symbol.
1766
1767 2004-04-22  Peter Barada <peter@the-baradas.com>
1768
1769         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1770         appropriate ColdFire architectures.
1771         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1772         mask addressing.
1773         Add EMAC instructions, fix MAC instructions. Remove
1774         macmw/macml/msacmw/msacml instructions since mask addressing now
1775         supported.
1776
1777 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1778
1779         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1780         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1781         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1782         macro.  Adjust all users.
1783
1784 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1785
1786         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1787         separately.
1788
1789 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1790
1791         * m32r-asm.c: Regenerate.
1792
1793 2004-03-29  Stan Shebs  <shebs@apple.com>
1794
1795         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1796         used.
1797
1798 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1799
1800         * aclocal.m4: Regenerate.
1801         * config.in: Regenerate.
1802         * configure: Regenerate.
1803         * po/POTFILES.in: Regenerate.
1804         * po/opcodes.pot: Regenerate.
1805
1806 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1807
1808         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1809         PPC_OPERANDS_GPR_0.
1810         * ppc-opc.c (RA0): Define.
1811         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1812         (RAOPT): Rename from RAO.  Update all uses.
1813         (powerpc_opcodes): Use RA0 as appropriate.
1814
1815 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1816
1817         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1818
1819 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1820
1821         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1822
1823 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1824
1825         * i386-dis.c (GRPPLOCK): Delete.
1826         (grps): Delete GRPPLOCK entry.
1827
1828 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1829
1830         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1831         (M, Mp): Use OP_M.
1832         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1833         (GRPPADLCK): Define.
1834         (dis386): Use NOP_Fixup on "nop".
1835         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1836         (twobyte_has_modrm): Set for 0xa7.
1837         (padlock_table): Delete.  Move to..
1838         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1839         and clflush.
1840         (print_insn): Revert PADLOCK_SPECIAL code.
1841         (OP_E): Delete sfence, lfence, mfence checks.
1842
1843 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1844
1845         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1846         (INVLPG_Fixup): New function.
1847         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1848
1849 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1850
1851         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1852         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1853         (padlock_table): New struct with PadLock instructions.
1854         (print_insn): Handle PADLOCK_SPECIAL.
1855
1856 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1857
1858         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1859         (OP_E): Twiddle clflush to sfence here.
1860
1861 2004-03-08  Nick Clifton  <nickc@redhat.com>
1862
1863         * po/de.po: Updated German translation.
1864
1865 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1866
1867         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1868         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1869         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1870         accordingly.
1871
1872 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1873
1874         * frv-asm.c: Regenerate.
1875         * frv-desc.c: Regenerate.
1876         * frv-desc.h: Regenerate.
1877         * frv-dis.c: Regenerate.
1878         * frv-ibld.c: Regenerate.
1879         * frv-opc.c: Regenerate.
1880         * frv-opc.h: Regenerate.
1881
1882 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1883
1884         * frv-desc.c, frv-opc.c: Regenerate.
1885
1886 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1887
1888         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1889
1890 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1891
1892         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1893         Also correct mistake in the comment.
1894
1895 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1896
1897         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1898         ensure that double registers have even numbers.
1899         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1900         that reserved instruction 0xfffd does not decode the same
1901         as 0xfdfd (ftrv).
1902         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1903         REG_N refers to a double register.
1904         Add REG_N_B01 nibble type and use it instead of REG_NM
1905         in ftrv.
1906         Adjust the bit patterns in a few comments.
1907
1908 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1909
1910         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1911
1912 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1913
1914         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1915
1916 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1917
1918         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1919
1920 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1921
1922         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1923         mtivor32, mtivor33, mtivor34.
1924
1925 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1926
1927         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1928
1929 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1930
1931         * arm-opc.h Maverick accumulator register opcode fixes.
1932
1933 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1934
1935         * m32r-dis.c: Regenerate.
1936
1937 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1938
1939         * sh-opc.h (sh_table): "fsrra", not "fssra".
1940
1941 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1942
1943         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1944         contraints.
1945
1946 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1947
1948         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1949
1950 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1951
1952         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1953         1.  Don't print scale factor on AT&T mode when index missing.
1954
1955 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1956
1957         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1958         when loaded into XR registers.
1959
1960 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1961
1962         * frv-desc.h: Regenerate.
1963         * frv-desc.c: Regenerate.
1964         * frv-opc.c: Regenerate.
1965
1966 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1967
1968         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1969
1970 2004-01-09  Paul Brook  <paul@codesourcery.com>
1971
1972         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1973         specific opcodes.
1974
1975 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1976
1977         * Makefile.am (libopcodes_la_DEPENDENCIES)
1978         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1979         comment about the problem.
1980         * Makefile.in: Regenerate.
1981
1982 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1983
1984         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1985         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1986         cut&paste errors in shifting/truncating numerical operands.
1987         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1988         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1989         (parse_uslo16): Likewise.
1990         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1991         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1992         (parse_s12): Likewise.
1993         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1994         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1995         (parse_uslo16): Likewise.
1996         (parse_uhi16): Parse gothi and gotfuncdeschi.
1997         (parse_d12): Parse got12 and gotfuncdesc12.
1998         (parse_s12): Likewise.
1999
2000 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
2001
2002         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
2003         instruction which looks similar to an 'rla' instruction.
2004
2005 For older changes see ChangeLog-0203
2006 \f
2007 Local Variables:
2008 mode: change-log
2009 left-margin: 8
2010 fill-column: 74
2011 version-control: never
2012 End: