1 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
4 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
6 (print_insn): Clear vex instead of vex.evex.
8 2018-04-04 Nick Clifton <nickc@redhat.com>
10 * po/es.po: Updated Spanish translation.
12 2018-03-28 Jan Beulich <jbeulich@suse.com>
14 * i386-gen.c (opcode_modifiers): Delete VecESize.
15 * i386-opc.h (VecESize): Delete.
16 (struct i386_opcode_modifier): Delete vecesize.
17 * i386-opc.tbl: Drop VecESize.
18 * i386-tlb.h: Re-generate.
20 2018-03-28 Jan Beulich <jbeulich@suse.com>
22 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
23 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
24 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
25 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
26 * i386-tlb.h: Re-generate.
28 2018-03-28 Jan Beulich <jbeulich@suse.com>
30 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
32 * i386-tlb.h: Re-generate.
34 2018-03-28 Jan Beulich <jbeulich@suse.com>
36 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
37 (vex_len_table): Drop Y for vcvt*2si.
38 (putop): Replace plain 'Y' handling by abort().
40 2018-03-28 Nick Clifton <nickc@redhat.com>
43 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
44 instructions with only a base address register.
45 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
46 handle AARHC64_OPND_SVE_ADDR_R.
47 (aarch64_print_operand): Likewise.
48 * aarch64-asm-2.c: Regenerate.
49 * aarch64_dis-2.c: Regenerate.
50 * aarch64-opc-2.c: Regenerate.
52 2018-03-22 Jan Beulich <jbeulich@suse.com>
54 * i386-opc.tbl: Drop VecESize from register only insn forms and
55 memory forms not allowing broadcast.
56 * i386-tlb.h: Re-generate.
58 2018-03-22 Jan Beulich <jbeulich@suse.com>
60 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
61 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
62 sha256*): Drop Disp<N>.
64 2018-03-22 Jan Beulich <jbeulich@suse.com>
66 * i386-dis.c (EbndS, bnd_swap_mode): New.
67 (prefix_table): Use EbndS.
68 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
69 * i386-opc.tbl (bndmov): Move misplaced Load.
70 * i386-tlb.h: Re-generate.
72 2018-03-22 Jan Beulich <jbeulich@suse.com>
74 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
75 templates allowing memory operands and folded ones for register
77 * i386-tlb.h: Re-generate.
79 2018-03-22 Jan Beulich <jbeulich@suse.com>
81 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
82 256-bit templates. Drop redundant leftover Disp<N>.
83 * i386-tlb.h: Re-generate.
85 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
87 * riscv-opc.c (riscv_insn_types): New.
89 2018-03-13 Nick Clifton <nickc@redhat.com>
91 * po/pt_BR.po: Updated Brazilian Portuguese translation.
93 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
95 * i386-opc.tbl: Add Optimize to clr.
96 * i386-tbl.h: Regenerated.
98 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
100 * i386-gen.c (opcode_modifiers): Remove OldGcc.
101 * i386-opc.h (OldGcc): Removed.
102 (i386_opcode_modifier): Remove oldgcc.
103 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
104 instructions for old (<= 2.8.1) versions of gcc.
105 * i386-tbl.h: Regenerated.
107 2018-03-08 Jan Beulich <jbeulich@suse.com>
109 * i386-opc.h (EVEXDYN): New.
110 * i386-opc.tbl: Fold various AVX512VL templates.
111 * i386-tlb.h: Re-generate.
113 2018-03-08 Jan Beulich <jbeulich@suse.com>
115 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
116 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
117 vpexpandd, vpexpandq): Fold AFX512VF templates.
118 * i386-tlb.h: Re-generate.
120 2018-03-08 Jan Beulich <jbeulich@suse.com>
122 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
123 Fold 128- and 256-bit VEX-encoded templates.
124 * i386-tlb.h: Re-generate.
126 2018-03-08 Jan Beulich <jbeulich@suse.com>
128 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
129 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
130 vpexpandd, vpexpandq): Fold AVX512F templates.
131 * i386-tlb.h: Re-generate.
133 2018-03-08 Jan Beulich <jbeulich@suse.com>
135 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
136 64-bit templates. Drop Disp<N>.
137 * i386-tlb.h: Re-generate.
139 2018-03-08 Jan Beulich <jbeulich@suse.com>
141 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
142 and 256-bit templates.
143 * i386-tlb.h: Re-generate.
145 2018-03-08 Jan Beulich <jbeulich@suse.com>
147 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
148 * i386-tlb.h: Re-generate.
150 2018-03-08 Jan Beulich <jbeulich@suse.com>
152 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
154 * i386-tlb.h: Re-generate.
156 2018-03-08 Jan Beulich <jbeulich@suse.com>
158 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
159 * i386-tlb.h: Re-generate.
161 2018-03-08 Jan Beulich <jbeulich@suse.com>
163 * i386-gen.c (opcode_modifiers): Delete FloatD.
164 * i386-opc.h (FloatD): Delete.
165 (struct i386_opcode_modifier): Delete floatd.
166 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
168 * i386-tlb.h: Re-generate.
170 2018-03-08 Jan Beulich <jbeulich@suse.com>
172 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
174 2018-03-08 Jan Beulich <jbeulich@suse.com>
176 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
177 * i386-tlb.h: Re-generate.
179 2018-03-08 Jan Beulich <jbeulich@suse.com>
181 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
183 * i386-tlb.h: Re-generate.
185 2018-03-07 Alan Modra <amodra@gmail.com>
187 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
189 * disassemble.h (print_insn_rs6000): Delete.
190 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
191 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
192 (print_insn_rs6000): Delete.
194 2018-03-03 Alan Modra <amodra@gmail.com>
196 * sysdep.h (opcodes_error_handler): Define.
197 (_bfd_error_handler): Declare.
198 * Makefile.am: Remove stray #.
199 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
201 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
202 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
203 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
204 opcodes_error_handler to print errors. Standardize error messages.
205 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
206 and include opintl.h.
207 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
208 * i386-gen.c: Standardize error messages.
209 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
210 * Makefile.in: Regenerate.
211 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
212 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
213 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
214 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
215 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
216 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
217 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
218 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
219 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
220 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
221 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
222 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
223 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
225 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
227 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
228 vpsub[bwdq] instructions.
229 * i386-tbl.h: Regenerated.
231 2018-03-01 Alan Modra <amodra@gmail.com>
233 * configure.ac (ALL_LINGUAS): Sort.
234 * configure: Regenerate.
236 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
238 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
239 macro by assignements.
241 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
244 * i386-gen.c (opcode_modifiers): Add Optimize.
245 * i386-opc.h (Optimize): New enum.
246 (i386_opcode_modifier): Add optimize.
247 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
248 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
249 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
250 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
251 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
253 * i386-tbl.h: Regenerated.
255 2018-02-26 Alan Modra <amodra@gmail.com>
257 * crx-dis.c (getregliststring): Allocate a large enough buffer
258 to silence false positive gcc8 warning.
260 2018-02-22 Shea Levy <shea@shealevy.com>
262 * disassemble.c (ARCH_riscv): Define if ARCH_all.
264 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
266 * i386-opc.tbl: Add {rex},
267 * i386-tbl.h: Regenerated.
269 2018-02-20 Maciej W. Rozycki <macro@mips.com>
271 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
272 (mips16_opcodes): Replace `M' with `m' for "restore".
274 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
276 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
278 2018-02-13 Maciej W. Rozycki <macro@mips.com>
280 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
281 variable to `function_index'.
283 2018-02-13 Nick Clifton <nickc@redhat.com>
286 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
287 about truncation of printing.
289 2018-02-12 Henry Wong <henry@stuffedcow.net>
291 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
293 2018-02-05 Nick Clifton <nickc@redhat.com>
295 * po/pt_BR.po: Updated Brazilian Portuguese translation.
297 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
299 * i386-dis.c (enum): Add pconfig.
300 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
301 (cpu_flags): Add CpuPCONFIG.
302 * i386-opc.h (enum): Add CpuPCONFIG.
303 (i386_cpu_flags): Add cpupconfig.
304 * i386-opc.tbl: Add PCONFIG instruction.
305 * i386-init.h: Regenerate.
306 * i386-tbl.h: Likewise.
308 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
310 * i386-dis.c (enum): Add PREFIX_0F09.
311 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
312 (cpu_flags): Add CpuWBNOINVD.
313 * i386-opc.h (enum): Add CpuWBNOINVD.
314 (i386_cpu_flags): Add cpuwbnoinvd.
315 * i386-opc.tbl: Add WBNOINVD instruction.
316 * i386-init.h: Regenerate.
317 * i386-tbl.h: Likewise.
319 2018-01-17 Jim Wilson <jimw@sifive.com>
321 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
323 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
325 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
326 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
327 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
328 (cpu_flags): Add CpuIBT, CpuSHSTK.
329 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
330 (i386_cpu_flags): Add cpuibt, cpushstk.
331 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
332 * i386-init.h: Regenerate.
333 * i386-tbl.h: Likewise.
335 2018-01-16 Nick Clifton <nickc@redhat.com>
337 * po/pt_BR.po: Updated Brazilian Portugese translation.
338 * po/de.po: Updated German translation.
340 2018-01-15 Jim Wilson <jimw@sifive.com>
342 * riscv-opc.c (match_c_nop): New.
343 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
345 2018-01-15 Nick Clifton <nickc@redhat.com>
347 * po/uk.po: Updated Ukranian translation.
349 2018-01-13 Nick Clifton <nickc@redhat.com>
351 * po/opcodes.pot: Regenerated.
353 2018-01-13 Nick Clifton <nickc@redhat.com>
355 * configure: Regenerate.
357 2018-01-13 Nick Clifton <nickc@redhat.com>
361 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
363 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
364 * i386-tbl.h: Regenerate.
366 2018-01-10 Jan Beulich <jbeulich@suse.com>
368 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
369 * i386-tbl.h: Re-generate.
371 2018-01-10 Jan Beulich <jbeulich@suse.com>
373 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
374 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
375 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
376 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
377 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
378 Disp8MemShift of AVX512VL forms.
379 * i386-tbl.h: Re-generate.
381 2018-01-09 Jim Wilson <jimw@sifive.com>
383 * riscv-dis.c (maybe_print_address): If base_reg is zero,
384 then the hi_addr value is zero.
386 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
388 * arm-dis.c (arm_opcodes): Add csdb.
389 (thumb32_opcodes): Add csdb.
391 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
393 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
394 * aarch64-asm-2.c: Regenerate.
395 * aarch64-dis-2.c: Regenerate.
396 * aarch64-opc-2.c: Regenerate.
398 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
401 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
402 Remove AVX512 vmovd with 64-bit operands.
403 * i386-tbl.h: Regenerated.
405 2018-01-05 Jim Wilson <jimw@sifive.com>
407 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
410 2018-01-03 Alan Modra <amodra@gmail.com>
412 Update year range in copyright notice of all files.
414 2018-01-02 Jan Beulich <jbeulich@suse.com>
416 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
417 and OPERAND_TYPE_REGZMM entries.
419 For older changes see ChangeLog-2017
421 Copyright (C) 2018 Free Software Foundation, Inc.
423 Copying and distribution of this file, with or without modification,
424 are permitted in any medium without royalty provided the copyright
425 notice and this notice are preserved.
431 version-control: never