opcodes/ChangeLog

   1 2020-02-04  Alan Modra  <amodra@gmail.com>
   2
   3         * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
   4
   5 2020-02-03  Alan Modra  <amodra@gmail.com>
   6
   7         * m32c-ibld.c: Regenerate.
   8
   9 2020-02-01  Alan Modra  <amodra@gmail.com>
  10
  11         * frv-ibld.c: Regenerate.
  12
  13 2020-01-31  Jan Beulich  <jbeulich@suse.com>
  14
  15         * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
  16         (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
  17         (OP_E_memory): Replace xmm_mdq_mode case label by
  18         vex_scalar_w_dq_mode one.
  19         * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
  20
  21 2020-01-31  Jan Beulich  <jbeulich@suse.com>
  22
  23         * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
  24         (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
  25         vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
  26         (intel_operand_size): Drop vex_w_dq_mode case label.
  27
  28 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
  29
  30         * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
  31         Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
  32
  33 2020-01-30  Alan Modra  <amodra@gmail.com>
  34
  35         * m32c-ibld.c: Regenerate.
  36
  37 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
  38
  39         * bpf-opc.c: Regenerate.
  40
  41 2020-01-30  Jan Beulich  <jbeulich@suse.com>
  42
  43         * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
  44         (dis386): Use them to replace C2/C3 table entries.
  45         (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
  46         * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
  47         ones. Use Size64 instead of DefaultSize on Intel64 ones.
  48         * i386-tbl.h: Re-generate.
  49
  50 2020-01-30  Jan Beulich  <jbeulich@suse.com>
  51
  52         * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
  53         forms.
  54         (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
  55         DefaultSize.
  56         * i386-tbl.h: Re-generate.
  57
  58 2020-01-30  Alan Modra  <amodra@gmail.com>
  59
  60         * tic4x-dis.c (tic4x_dp): Make unsigned.
  61
  62 2020-01-27  H.J. Lu  <hongjiu.lu@intel.com>
  63             Jan Beulich  <jbeulich@suse.com>
  64
  65         PR binutils/25445
  66         * i386-dis.c (MOVSXD_Fixup): New function.
  67         (movsxd_mode): New enum.
  68         (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
  69         (intel_operand_size): Handle movsxd_mode.
  70         (OP_E_register): Likewise.
  71         (OP_G): Likewise.
  72         * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
  73         register on movsxd.  Add movsxd with 16-bit destination register
  74         for AMD64 and Intel64 ISAs.
  75         * i386-tbl.h: Regenerated.
  76
  77 2020-01-27  Tamar Christina  <tamar.christina@arm.com>
  78
  79         PR 25403
  80         * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
  81         * aarch64-asm-2.c: Regenerate
  82         * aarch64-dis-2.c: Likewise.
  83         * aarch64-opc-2.c: Likewise.
  84
  85 2020-01-21  Jan Beulich  <jbeulich@suse.com>
  86
  87         * i386-opc.tbl (sysret): Drop DefaultSize.
  88         * i386-tbl.h: Re-generate.
  89
  90 2020-01-21  Jan Beulich  <jbeulich@suse.com>
  91
  92         * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
  93         Dword.
  94         (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
  95         * i386-tbl.h: Re-generate.
  96
  97 2020-01-20  Nick Clifton  <nickc@redhat.com>
  98
  99         * po/de.po: Updated German translation.
 100         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 101         * po/uk.po: Updated Ukranian translation.
 102
 103 2020-01-20  Alan Modra  <amodra@gmail.com>
 104
 105         * hppa-dis.c (fput_const): Remove useless cast.
 106
 107 2020-01-20  Alan Modra  <amodra@gmail.com>
 108
 109         * arm-dis.c (print_insn_arm): Wrap 'T' value.
 110
 111 2020-01-18  Nick Clifton  <nickc@redhat.com>
 112
 113         * configure: Regenerate.
 114         * po/opcodes.pot: Regenerate.
 115
 116 2020-01-18  Nick Clifton  <nickc@redhat.com>
 117
 118         Binutils 2.34 branch created.
 119
 120 2020-01-17  Christian Biesinger  <cbiesinger@google.com>
 121
 122         * opintl.h: Fix spelling error (seperate).
 123
 124 2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
 125
 126         * i386-opc.tbl: Add {vex} pseudo prefix.
 127         * i386-tbl.h: Regenerated.
 128
 129 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 130
 131         PR 25376
 132         * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
 133         (neon_opcodes): Likewise.
 134         (select_arm_features): Make sure we enable MVE bits when selecting
 135         armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
 136         any architecture.
 137
 138 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 139
 140         * i386-opc.tbl: Drop stale comment from XOP section.
 141
 142 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 143
 144         * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
 145         (extractps): Add VexWIG to SSE2AVX forms.
 146         * i386-tbl.h: Re-generate.
 147
 148 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 149
 150         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
 151         Size64 from and use VexW1 on SSE2AVX forms.
 152         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
 153         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
 154         * i386-tbl.h: Re-generate.
 155
 156 2020-01-15  Alan Modra  <amodra@gmail.com>
 157
 158         * tic4x-dis.c (tic4x_version): Make unsigned long.
 159         (optab, optab_special, registernames): New file scope vars.
 160         (tic4x_print_register): Set up registernames rather than
 161         malloc'd registertable.
 162         (tic4x_disassemble): Delete optable and optable_special.  Use
 163         optab and optab_special instead.  Throw away old optab,
 164         optab_special and registernames when info->mach changes.
 165
 166 2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
 167
 168         PR 25377
 169         * z80-dis.c (suffix): Use .db instruction to generate double
 170         prefix.
 171
 172 2020-01-14  Alan Modra  <amodra@gmail.com>
 173
 174         * z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
 175         values to unsigned before shifting.
 176
 177 2020-01-13  Thomas Troeger  <tstroege@gmx.de>
 178
 179         * arm-dis.c (print_insn_arm): Fill in insn info fields for control
 180         flow instructions.
 181         (print_insn_thumb16, print_insn_thumb32): Likewise.
 182         (print_insn): Initialize the insn info.
 183         * i386-dis.c (print_insn): Initialize the insn info fields, and
 184         detect jumps.
 185
 186 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
 187
 188         * arc-opc.c (C_NE): Make it required.
 189
 190 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
 191
 192         * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
 193         reserved register name.
 194
 195 2020-01-13  Alan Modra  <amodra@gmail.com>
 196
 197         * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
 198         (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
 199
 200 2020-01-13  Alan Modra  <amodra@gmail.com>
 201
 202         * wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
 203         result of wasm_read_leb128 in a uint64_t and check that bits
 204         are not lost when copying to other locals.  Use uint32_t for
 205         most locals.  Use PRId64 when printing int64_t.
 206
 207 2020-01-13  Alan Modra  <amodra@gmail.com>
 208
 209         * score-dis.c: Formatting.
 210         * score7-dis.c: Formatting.
 211
 212 2020-01-13  Alan Modra  <amodra@gmail.com>
 213
 214         * score-dis.c (print_insn_score48): Use unsigned variables for
 215         unsigned values.  Don't left shift negative values.
 216         (print_insn_score32): Likewise.
 217         * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
 218
 219 2020-01-13  Alan Modra  <amodra@gmail.com>
 220
 221         * tic4x-dis.c (tic4x_print_register): Remove dead code.
 222
 223 2020-01-13  Alan Modra  <amodra@gmail.com>
 224
 225         * fr30-ibld.c: Regenerate.
 226
 227 2020-01-13  Alan Modra  <amodra@gmail.com>
 228
 229         * xgate-dis.c (print_insn): Don't left shift signed value.
 230         (ripBits): Formatting, use 1u.
 231
 232 2020-01-10  Alan Modra  <amodra@gmail.com>
 233
 234         * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
 235         * tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
 236
 237 2020-01-10  Alan Modra  <amodra@gmail.com>
 238
 239         * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
 240         and XRREG value earlier to avoid a shift with negative exponent.
 241         * m10200-dis.c (disassemble): Similarly.
 242
 243 2020-01-09  Nick Clifton  <nickc@redhat.com>
 244
 245         PR 25224
 246         * z80-dis.c (ld_ii_ii): Use correct cast.
 247
 248 2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
 249
 250         PR 25224
 251         * z80-dis.c (ld_ii_ii): Use character constant when checking
 252         opcode byte value.
 253
 254 2020-01-09  Jan Beulich  <jbeulich@suse.com>
 255
 256         * i386-dis.c (SEP_Fixup): New.
 257         (SEP): Define.
 258         (dis386_twobyte): Use it for sysenter/sysexit.
 259         (enum x86_64_isa): Change amd64 enumerator to value 1.
 260         (OP_J): Compare isa64 against intel64 instead of amd64.
 261         * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
 262         forms.
 263         * i386-tbl.h: Re-generate.
 264
 265 2020-01-08  Alan Modra  <amodra@gmail.com>
 266
 267         * z8k-dis.c: Include libiberty.h
 268         (instr_data_s): Make max_fetched unsigned.
 269         (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
 270         Don't exceed byte_info bounds.
 271         (output_instr): Make num_bytes unsigned.
 272         (unpack_instr): Likewise for nibl_count and loop.
 273         * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
 274         idx unsigned.
 275         * z8k-opc.h: Regenerate.
 276
 277 2020-01-07  Shahab Vahedi  <shahab@synopsys.com>
 278
 279         * arc-tbl.h (llock): Use 'LLOCK' as class.
 280         (llockd): Likewise.
 281         (scond): Use 'SCOND' as class.
 282         (scondd): Likewise.
 283         (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
 284         (scondd): Likewise.
 285
 286 2020-01-06  Alan Modra  <amodra@gmail.com>
 287
 288         * m32c-ibld.c: Regenerate.
 289
 290 2020-01-06  Alan Modra  <amodra@gmail.com>
 291
 292         PR 25344
 293         * z80-dis.c (suffix): Don't use a local struct buffer copy.
 294         Peek at next byte to prevent recursion on repeated prefix bytes.
 295         Ensure uninitialised "mybuf" is not accessed.
 296         (print_insn_z80): Don't zero n_fetch and n_used here,..
 297         (print_insn_z80_buf): ..do it here instead.
 298
 299 2020-01-04  Alan Modra  <amodra@gmail.com>
 300
 301         * m32r-ibld.c: Regenerate.
 302
 303 2020-01-04  Alan Modra  <amodra@gmail.com>
 304
 305         * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
 306
 307 2020-01-04  Alan Modra  <amodra@gmail.com>
 308
 309         * crx-dis.c (match_opcode): Avoid shift left of signed value.
 310
 311 2020-01-04  Alan Modra  <amodra@gmail.com>
 312
 313         * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
 314
 315 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 316
 317         * aarch64-tbl.h (aarch64_opcode_table): Use
 318         SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
 319
 320 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 321
 322         * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
 323         forms of SUDOT and USDOT.
 324
 325 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 326
 327         * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
 328         uzip{1,2}.
 329         * opcodes/aarch64-dis-2.c: Re-generate.
 330
 331 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 332
 333         * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
 334         FMMLA encoding.
 335         * opcodes/aarch64-dis-2.c: Re-generate.
 336
 337 2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
 338
 339         * z80-dis.c: Add support for eZ80 and Z80 instructions.
 340
 341 2020-01-01  Alan Modra  <amodra@gmail.com>
 342
 343         Update year range in copyright notice of all files.
 344
 345 For older changes see ChangeLog-2019
 346 \f
 347 Copyright (C) 2020 Free Software Foundation, Inc.
 348
 349 Copying and distribution of this file, with or without modification,
 350 are permitted in any medium without royalty provided the copyright
 351 notice and this notice are preserved.
 352
 353 Local Variables:
 354 mode: change-log
 355 left-margin: 8
 356 fill-column: 74
 357 version-control: never
 358 End: