opcodes/ChangeLog

   1 2018-06-08  Egeyar Bagcioglu  <egeyar.bagcioglu@oracle.com>
   2
   3         PR 20319
   4         * aarch64-tbl.h: Introduce QL_INT2FP_FMOV and QL_FP2INT_FMOV.
   5         (aarch64_opcode_table) : Use QL_INT2FP_FMOV and QL_FP2INT_FMOV.
   6
   7 2018-06-06  Alan Modra  <amodra@gmail.com>
   8
   9         * xtensa-dis.c (print_insn_xtensa): Init fmt and valid_insn after
  10         setjmp.  Move init for some other vars later too.
  11
  12 2018-06-04  Max Filippov  <jcmvbkbc@gmail.com>
  13
  14         * xtensa-dis.c (bfd.h, elf/xtensa.h): New includes.
  15         (dis_private): Add new fields for property section tracking.
  16         (xtensa_coalesce_insn_tables, xtensa_find_table_entry)
  17         (xtensa_instruction_fits): New functions.
  18         (fetch_data): Bump minimal fetch size to 4.
  19         (print_insn_xtensa): Make struct dis_private static.
  20         Load and prepare property table on section change.
  21         Don't disassemble literals. Don't disassemble instructions that
  22         cross property table boundaries.
  23
  24 2018-06-01  H.J. Lu  <hongjiu.lu@intel.com>
  25
  26         * configure: Regenerated.
  27
  28 2018-06-01  Jan Beulich  <jbeulich@suse.com>
  29
  30         * i386-opc.tbl (mov, movq): Fold to/from SReg* forms.
  31         * i386-tbl.h: Re-generate.
  32
  33 2018-06-01  Jan Beulich  <jbeulich@suse.com>
  34
  35         * i386-opc.tbl (sldt, str): Add NoRex64.
  36         * i386-tbl.h: Re-generate.
  37
  38 2018-06-01  Jan Beulich  <jbeulich@suse.com>
  39
  40         * i386-opc.tbl (invpcid): Add Oword.
  41         * i386-tbl.h: Re-generate.
  42
  43 2018-06-01  Alan Modra  <amodra@gmail.com>
  44
  45         * sysdep.h (_bfd_error_handler): Don't declare.
  46         * msp430-decode.opc: Include bfd.h.  Don't include ansidecl.h here.
  47         * rl78-decode.opc: Likewise.
  48         * msp430-decode.c: Regenerate.
  49         * rl78-decode.c: Regenerate.
  50
  51 2018-05-30  Amit Pawar <Amit.Pawar@amd.com>
  52
  53         * i386-gen.c (cpu_flag_init): Add CPU_ZNVER2_FLAGS.
  54         * i386-init.h : Regenerated.
  55
  56 2018-05-25  Alan Modra  <amodra@gmail.com>
  57
  58         * Makefile.in: Regenerate.
  59         * po/POTFILES.in: Regenerate.
  60
  61 2018-05-21  Peter Bergner  <bergner@vnet.ibm.com.com>
  62
  63         * ppc-opc.c (insert_bat, extract_bat, insert_bba, extract_bba,
  64         insert_rbs, extract_rbs, insert_xb6s, extract_xb6s): Delete functions.
  65         (insert_bab, extract_bab, insert_btab, extract_btab,
  66         insert_rsb, extract_rsb, insert_xab6, extract_xab6): New functions.
  67         (BAT, BBA VBA RBS XB6S): Delete macros.
  68         (BTAB, BAB, VAB, RAB, RSB, XAB6): New macros.
  69         (BB, BD, RBX, XC6): Update for new macros.
  70         (powerpc_opcodes) <evmr, evnot, vmr, vnot, crnot, crclr, crset,
  71         crmove, not, not., mr, mr., xxspltd, xxswapd, xvmovsp, xvmovdp,
  72         e_crnot, e_crclr, e_crset, e_crmove>: Likewise.
  73         * ppc-dis.c (print_insn_powerpc): Delete handling of fake operands.
  74
  75 2018-05-18  John Darrington  <john@darrington.wattle.id.au>
  76
  77         * Makefile.am: Add support for s12z architecture.
  78         * configure.ac: Likewise.
  79         * disassemble.c: Likewise.
  80         * disassemble.h: Likewise.
  81         * Makefile.in: Regenerate.
  82         * configure: Regenerate.
  83         * s12z-dis.c: New file.
  84         * s12z.h: New file.
  85
  86 2018-05-18  Alan Modra  <amodra@gmail.com>
  87
  88         * nfp-dis.c: Don't #include libbfd.h.
  89         (init_nfp3200_priv): Use bfd_get_section_contents.
  90         (nit_nfp6000_mecsr_sec): Likewise.
  91
  92 2018-05-17  Nick Clifton  <nickc@redhat.com>
  93
  94         * po/zh_CN.po: Updated simplified Chinese translation.
  95
  96 2018-05-16  Tamar Christina  <tamar.christina@arm.com>
  97
  98         PR binutils/23109
  99         * aarch64-tbl.h (aarch64_opcode_table): Correct sdot and udot.
 100         * aarch64-dis-2.c: Regenerate.
 101
 102 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 103
 104         PR binutils/21446
 105         * aarch64-asm.c (opintl.h): Include.
 106         (aarch64_ins_sysreg): Enforce read/write constraints.
 107         * aarch64-dis.c (aarch64_ext_sysreg): Likewise.
 108         * aarch64-opc.h (F_DEPRECATED, F_ARCHEXT, F_HASXT): Moved here.
 109         (F_REG_READ, F_REG_WRITE): New.
 110         * aarch64-opc.c (aarch64_print_operand): Generate notes for
 111         AARCH64_OPND_SYSREG.
 112         (F_DEPRECATED, F_ARCHEXT, F_HASXT): Move to aarch64-opc.h.
 113         (aarch64_sys_regs): Add constraints to currentel, midr_el1, ctr_el0,
 114         mpidr_el1, revidr_el1, aidr_el1, dczid_el0, id_dfr0_el1, id_pfr0_el1,
 115         id_pfr1_el1, id_afr0_el1, id_mmfr0_el1, id_mmfr1_el1, id_mmfr2_el1,
 116         id_mmfr3_el1, id_mmfr4_el1, id_isar0_el1, id_isar1_el1, id_isar2_el1,
 117         id_isar3_el1, id_isar4_el1, id_isar5_el1, mvfr0_el1, mvfr1_el1,
 118         mvfr2_el1, ccsidr_el1, id_aa64pfr0_el1, id_aa64pfr1_el1,
 119         id_aa64dfr0_el1, id_aa64dfr1_el1, id_aa64isar0_el1, id_aa64isar1_el1,
 120         id_aa64mmfr0_el1, id_aa64mmfr1_el1, id_aa64mmfr2_el1, id_aa64afr0_el1,
 121         id_aa64afr0_el1, id_aa64afr1_el1, id_aa64zfr0_el1, clidr_el1,
 122         csselr_el1, vsesr_el2, erridr_el1, erxfr_el1, rvbar_el1, rvbar_el2,
 123         rvbar_el3, isr_el1, tpidrro_el0, cntfrq_el0, cntpct_el0, cntvct_el0,
 124         mdccsr_el0, dbgdtrrx_el0, dbgdtrtx_el0, osdtrrx_el1, osdtrtx_el1,
 125         mdrar_el1, oslar_el1, oslsr_el1, dbgauthstatus_el1, pmbidr_el1,
 126         pmsidr_el1, pmswinc_el0, pmceid0_el0, pmceid1_el0.
 127         * aarch64-tbl.h (aarch64_opcode_table): Add constraints to
 128         msr (F_SYS_WRITE), mrs (F_SYS_READ).
 129
 130 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 131
 132         PR binutils/21446
 133         * aarch64-dis.c (no_notes: New.
 134         (parse_aarch64_dis_option): Support notes.
 135         (aarch64_decode_insn, print_operands): Likewise.
 136         (print_aarch64_disassembler_options): Document notes.
 137         * aarch64-opc.c (aarch64_print_operand): Support notes.
 138
 139 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 140
 141         PR binutils/21446
 142         * aarch64-asm.h (aarch64_insert_operand, aarch64_##x): Return boolean
 143         and take error struct.
 144         * aarch64-asm.c (aarch64_ext_regno, aarch64_ins_reglane,
 145         aarch64_ins_reglist, aarch64_ins_ldst_reglist,
 146         aarch64_ins_ldst_reglist_r, aarch64_ins_ldst_elemlist,
 147         aarch64_ins_advsimd_imm_shift, aarch64_ins_imm, aarch64_ins_imm_half,
 148         aarch64_ins_advsimd_imm_modified, aarch64_ins_fpimm,
 149         aarch64_ins_imm_rotate1, aarch64_ins_imm_rotate2, aarch64_ins_fbits,
 150         aarch64_ins_aimm, aarch64_ins_limm_1, aarch64_ins_limm,
 151         aarch64_ins_inv_limm, aarch64_ins_ft, aarch64_ins_addr_simple,
 152         aarch64_ins_addr_regoff, aarch64_ins_addr_offset, aarch64_ins_addr_simm,
 153         aarch64_ins_addr_simm10, aarch64_ins_addr_uimm12,
 154         aarch64_ins_simd_addr_post, aarch64_ins_cond, aarch64_ins_sysreg,
 155         aarch64_ins_pstatefield, aarch64_ins_sysins_op, aarch64_ins_barrier,
 156         aarch64_ins_prfop, aarch64_ins_hint, aarch64_ins_reg_extended,
 157         aarch64_ins_reg_shifted, aarch64_ins_sve_addr_ri_s4xvl,
 158         aarch64_ins_sve_addr_ri_s6xvl, aarch64_ins_sve_addr_ri_s9xvl,
 159         aarch64_ins_sve_addr_ri_s4, aarch64_ins_sve_addr_ri_u6,
 160         aarch64_ins_sve_addr_rr_lsl, aarch64_ins_sve_addr_rz_xtw,
 161         aarch64_ins_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
 162         aarch64_ins_sve_addr_zz_lsl, aarch64_ins_sve_addr_zz_sxtw,
 163         aarch64_ins_sve_addr_zz_uxtw, aarch64_ins_sve_aimm,
 164         aarch64_ins_sve_asimm, aarch64_ins_sve_index, aarch64_ins_sve_limm_mov,
 165         aarch64_ins_sve_quad_index, aarch64_ins_sve_reglist,
 166         aarch64_ins_sve_scale, aarch64_ins_sve_shlimm, aarch64_ins_sve_shrimm,
 167         aarch64_ins_sve_float_half_one, aarch64_ins_sve_float_half_two,
 168         aarch64_ins_sve_float_zero_one, aarch64_opcode_encode): Likewise.
 169         * aarch64-dis.h (aarch64_extract_operand, aarch64_##x): Likewise.
 170         * aarch64-dis.c (aarch64_ext_regno, aarch64_ext_reglane,
 171         aarch64_ext_reglist, aarch64_ext_ldst_reglist,
 172         aarch64_ext_ldst_reglist_r, aarch64_ext_ldst_elemlist,
 173         aarch64_ext_advsimd_imm_shift, aarch64_ext_imm, aarch64_ext_imm_half,
 174         aarch64_ext_advsimd_imm_modified, aarch64_ext_fpimm,
 175         aarch64_ext_imm_rotate1, aarch64_ext_imm_rotate2, aarch64_ext_fbits,
 176         aarch64_ext_aimm, aarch64_ext_limm_1, aarch64_ext_limm, decode_limm,
 177         aarch64_ext_inv_limm, aarch64_ext_ft, aarch64_ext_addr_simple,
 178         aarch64_ext_addr_regoff, aarch64_ext_addr_offset, aarch64_ext_addr_simm,
 179         aarch64_ext_addr_simm10, aarch64_ext_addr_uimm12,
 180         aarch64_ext_simd_addr_post, aarch64_ext_cond, aarch64_ext_sysreg,
 181         aarch64_ext_pstatefield, aarch64_ext_sysins_op, aarch64_ext_barrier,
 182         aarch64_ext_prfop, aarch64_ext_hint, aarch64_ext_reg_extended,
 183         aarch64_ext_reg_shifted, aarch64_ext_sve_addr_ri_s4xvl,
 184         aarch64_ext_sve_addr_ri_s6xvl, aarch64_ext_sve_addr_ri_s9xvl,
 185         aarch64_ext_sve_addr_ri_s4, aarch64_ext_sve_addr_ri_u6,
 186         aarch64_ext_sve_addr_rr_lsl, aarch64_ext_sve_addr_rz_xtw,
 187         aarch64_ext_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
 188         aarch64_ext_sve_addr_zz_lsl, aarch64_ext_sve_addr_zz_sxtw,
 189         aarch64_ext_sve_addr_zz_uxtw, aarch64_ext_sve_aimm,
 190         aarch64_ext_sve_asimm, aarch64_ext_sve_index, aarch64_ext_sve_limm_mov,
 191         aarch64_ext_sve_quad_index, aarch64_ext_sve_reglist,
 192         aarch64_ext_sve_scale, aarch64_ext_sve_shlimm, aarch64_ext_sve_shrimm,
 193         aarch64_ext_sve_float_half_one, aarch64_ext_sve_float_half_two,
 194         aarch64_ext_sve_float_zero_one, aarch64_opcode_decode): Likewise.
 195         (determine_disassembling_preference, aarch64_decode_insn,
 196         print_insn_aarch64_word, print_insn_data): Take errors struct.
 197         (print_insn_aarch64): Use errors.
 198         * aarch64-asm-2.c: Regenerate.
 199         * aarch64-dis-2.c: Regenerate.
 200         * aarch64-gen.c (print_operand_inserter): Use errors and change type to
 201         boolean in aarch64_insert_operan.
 202         (print_operand_extractor): Likewise.
 203         * aarch64-opc.c (aarch64_print_operand): Use sysreg struct.
 204
 205 2018-05-15  Francois H. Theron  <francois.theron@netronome.com>
 206
 207         * nfp-dis.c: Use uint64_t for instruction variables, not bfd_vma.
 208
 209 2018-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 210
 211         * i386-opc.tbl: Remove Disp<N> from movidir{i,64b}.
 212
 213 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 214
 215         * cr16-opc.c (cr16_instruction): Comment typo fix.
 216         * hppa-dis.c (print_insn_hppa): Likewise.
 217
 218 2018-05-08  Jim Wilson  <jimw@sifive.com>
 219
 220         * riscv-opc.c (match_c_slli, match_slli_as_c_slli): New.
 221         (match_c_slli64, match_srxi_as_c_srxi): New.
 222         (riscv_opcodes) <slli, sll>: Use match_slli_as_c_slli.
 223         <srli, srl, srai, sra>: Use match_srxi_as_c_srxi.
 224         <c.slli, c.srli, c.srai>: Use match_s_slli.
 225         <c.slli64, c.srli64, c.srai64>: New.
 226
 227 2018-05-08  Alan Modra  <amodra@gmail.com>
 228
 229         * ppc-dis.c (PPC_OPCD_SEGS): Define using PPC_OP.
 230         (VLE_OPCD_SEGS, SPE2_OPCD_SEGS): Similarly, using macros used to
 231         partition opcode space for index lookup.
 232
 233 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
 234
 235         * ppc-dis.c (print_insn_powerpc) <insn_is_short>: Replace this...
 236         <insn_length>: ...with this.  Update usage.
 237         Remove duplicate call to *info->memory_error_func.
 238
 239 2018-05-07  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 240             H.J. Lu  <hongjiu.lu@intel.com>
 241
 242         * i386-dis.c (Gva): New.
 243         (enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
 244         MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
 245         (prefix_table): New instructions (see prefix above).
 246         (mod_table): New instructions (see prefix above).
 247         (OP_G): Handle va_mode.
 248         * i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
 249         CPU_MOVDIR64B_FLAGS.
 250         (cpu_flags): Add CpuMOVDIRI and CpuMOVDIR64B.
 251         * i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
 252         (i386_cpu_flags): Add cpumovdiri and cpumovdir64b.
 253         * i386-opc.tbl: Add movidir{i,64b}.
 254         * i386-init.h: Regenerated.
 255         * i386-tbl.h: Likewise.
 256
 257 2018-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 258
 259         * i386-gen.c (opcode_modifiers): Replace AddrPrefixOp0 with
 260         AddrPrefixOpReg.
 261         * i386-opc.h (AddrPrefixOp0): Renamed to ...
 262         (AddrPrefixOpReg): This.
 263         (i386_opcode_modifier): Rename addrprefixop0 to addrprefixopreg.
 264         * i386-opc.tbl: Replace AddrPrefixOp0 with AddrPrefixOpReg.
 265
 266 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
 267
 268         * ppc-opc.c (powerpc_num_opcodes): Change type to unsigned.
 269         (vle_num_opcodes): Likewise.
 270         (spe2_num_opcodes): Likewise.
 271         * ppc-dis.c (disassemble_init_powerpc) <powerpc_opcd_indices>: Rewrite
 272         initialization loop.
 273         (disassemble_init_powerpc) <vle_opcd_indices>: Likewise.
 274         (disassemble_init_powerpc) <spe2_opcd_indices>: Likewise.  Initialize
 275         only once.
 276
 277 2018-05-01  Tamar Christina  <tamar.christina@arm.com>
 278
 279         * aarch64-dis.c (aarch64_opcode_decode): Moved memory clear code.
 280
 281 2018-04-30  Francois H. Theron <francois.theron@netronome.com>
 282
 283         Makefile.am: Added nfp-dis.c.
 284         configure.ac: Added bfd_nfp_arch.
 285         disassemble.h: Added print_insn_nfp prototype.
 286         disassemble.c: Added ARCH_nfp and call to print_insn_nfp
 287         nfp-dis.c: New, for NFP support.
 288         po/POTFILES.in: Added nfp-dis.c to the list.
 289         Makefile.in: Regenerate.
 290         configure: Regenerate.
 291
 292 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 293
 294         * i386-opc.tbl: Fold various non-memory operand AVX512VL
 295         templates into their base ones.
 296         * i386-tlb.h: Re-generate.
 297
 298 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 299
 300         * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
 301         CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
 302         CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
 303         CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
 304         * i386-init.h: Re-generate.
 305
 306 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 307
 308         * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
 309         CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
 310         CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
 311         Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
 312         comment.
 313         (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
 314         and CpuRegMask.
 315         * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
 316         CpuRegMask: Delete.
 317         (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
 318         cpuregzmm, and cpuregmask.
 319         * i386-init.h: Re-generate.
 320         * i386-tbl.h: Re-generate.
 321
 322 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 323
 324         * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
 325         CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
 326         * i386-init.h: Re-generate.
 327
 328 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 329
 330         * i386-gen.c (VexImmExt): Delete.
 331         * i386-opc.h (VexImmExt, veximmext): Delete.
 332         * i386-opc.tbl: Drop all VexImmExt uses.
 333         * i386-tlb.h: Re-generate.
 334
 335 2018-04-25  Jan Beulich  <jbeulich@suse.com>
 336
 337         * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
 338         register-only forms.
 339         * i386-tlb.h: Re-generate.
 340
 341 2018-04-25  Tamar Christina  <tamar.christina@arm.com>
 342
 343         * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
 344
 345 2018-04-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 346
 347         * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
 348         PREFIX_0F1C.
 349         * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
 350         (cpu_flags): Add CpuCLDEMOTE.
 351         * i386-init.h: Regenerate.
 352         * i386-opc.h (enum): Add CpuCLDEMOTE,
 353         (i386_cpu_flags): Add cpucldemote.
 354         * i386-opc.tbl: Add cldemote.
 355         * i386-tbl.h: Regenerate.
 356
 357 2018-04-16  Alan Modra  <amodra@gmail.com>
 358
 359         * Makefile.am: Remove sh5 and sh64 support.
 360         * configure.ac: Likewise.
 361         * disassemble.c: Likewise.
 362         * disassemble.h: Likewise.
 363         * sh-dis.c: Likewise.
 364         * sh64-dis.c: Delete.
 365         * sh64-opc.c: Delete.
 366         * sh64-opc.h: Delete.
 367         * Makefile.in: Regenerate.
 368         * configure: Regenerate.
 369         * po/POTFILES.in: Regenerate.
 370
 371 2018-04-16  Alan Modra  <amodra@gmail.com>
 372
 373         * Makefile.am: Remove w65 support.
 374         * configure.ac: Likewise.
 375         * disassemble.c: Likewise.
 376         * disassemble.h: Likewise.
 377         * w65-dis.c: Delete.
 378         * w65-opc.h: Delete.
 379         * Makefile.in: Regenerate.
 380         * configure: Regenerate.
 381         * po/POTFILES.in: Regenerate.
 382
 383 2018-04-16  Alan Modra  <amodra@gmail.com>
 384
 385         * configure.ac: Remove we32k support.
 386         * configure: Regenerate.
 387
 388 2018-04-16  Alan Modra  <amodra@gmail.com>
 389
 390         * Makefile.am: Remove m88k support.
 391         * configure.ac: Likewise.
 392         * disassemble.c: Likewise.
 393         * disassemble.h: Likewise.
 394         * m88k-dis.c: Delete.
 395         * Makefile.in: Regenerate.
 396         * configure: Regenerate.
 397         * po/POTFILES.in: Regenerate.
 398
 399 2018-04-16  Alan Modra  <amodra@gmail.com>
 400
 401         * Makefile.am: Remove i370 support.
 402         * configure.ac: Likewise.
 403         * disassemble.c: Likewise.
 404         * disassemble.h: Likewise.
 405         * i370-dis.c: Delete.
 406         * i370-opc.c: Delete.
 407         * Makefile.in: Regenerate.
 408         * configure: Regenerate.
 409         * po/POTFILES.in: Regenerate.
 410
 411 2018-04-16  Alan Modra  <amodra@gmail.com>
 412
 413         * Makefile.am: Remove h8500 support.
 414         * configure.ac: Likewise.
 415         * disassemble.c: Likewise.
 416         * disassemble.h: Likewise.
 417         * h8500-dis.c: Delete.
 418         * h8500-opc.h: Delete.
 419         * Makefile.in: Regenerate.
 420         * configure: Regenerate.
 421         * po/POTFILES.in: Regenerate.
 422
 423 2018-04-16  Alan Modra  <amodra@gmail.com>
 424
 425         * configure.ac: Remove tahoe support.
 426         * configure: Regenerate.
 427
 428 2018-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 429
 430         * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
 431         umwait.
 432         * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
 433         64-bit mode.
 434         * i386-tbl.h: Regenerated.
 435
 436 2018-04-11  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 437
 438         * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
 439         PREFIX_MOD_1_0FAE_REG_6.
 440         (va_mode): New.
 441         (OP_E_register): Use va_mode.
 442         * i386-dis-evex.h (prefix_table):
 443         New instructions (see prefixes above).
 444         * i386-gen.c (cpu_flag_init): Add WAITPKG.
 445         (cpu_flags): Likewise.
 446         * i386-opc.h (enum): Likewise.
 447         (i386_cpu_flags): Likewise.
 448         * i386-opc.tbl: Add umonitor, umwait, tpause.
 449         * i386-init.h: Regenerate.
 450         * i386-tbl.h: Likewise.
 451
 452 2018-04-11  Alan Modra  <amodra@gmail.com>
 453
 454         * opcodes/i860-dis.c: Delete.
 455         * opcodes/i960-dis.c: Delete.
 456         * Makefile.am: Remove i860 and i960 support.
 457         * configure.ac: Likewise.
 458         * disassemble.c: Likewise.
 459         * disassemble.h: Likewise.
 460         * Makefile.in: Regenerate.
 461         * configure: Regenerate.
 462         * po/POTFILES.in: Regenerate.
 463
 464 2018-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 465
 466         PR binutils/23025
 467         * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
 468         to 0.
 469         (print_insn): Clear vex instead of vex.evex.
 470
 471 2018-04-04  Nick Clifton  <nickc@redhat.com>
 472
 473         * po/es.po: Updated Spanish translation.
 474
 475 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 476
 477         * i386-gen.c (opcode_modifiers): Delete VecESize.
 478         * i386-opc.h (VecESize): Delete.
 479         (struct i386_opcode_modifier): Delete vecesize.
 480         * i386-opc.tbl: Drop VecESize.
 481         * i386-tlb.h: Re-generate.
 482
 483 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 484
 485         * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
 486         BROADCAST_1TO4, BROADCAST_1TO2): Delete.
 487         (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
 488         * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
 489         * i386-tlb.h: Re-generate.
 490
 491 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 492
 493         * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
 494         Fold AVX512 forms
 495         * i386-tlb.h: Re-generate.
 496
 497 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 498
 499         * i386-dis.c (prefix_table): Drop Y for cvt*2si.
 500         (vex_len_table): Drop Y for vcvt*2si.
 501         (putop): Replace plain 'Y' handling by abort().
 502
 503 2018-03-28  Nick Clifton  <nickc@redhat.com>
 504
 505         PR 22988
 506         * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
 507         instructions with only a base address register.
 508         * aarch64-opc.c (operand_general_constraint_met_p): Add code to
 509         handle AARHC64_OPND_SVE_ADDR_R.
 510         (aarch64_print_operand): Likewise.
 511         * aarch64-asm-2.c: Regenerate.
 512         * aarch64_dis-2.c: Regenerate.
 513         * aarch64-opc-2.c: Regenerate.
 514
 515 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 516
 517         * i386-opc.tbl: Drop VecESize from register only insn forms and
 518         memory forms not allowing broadcast.
 519         * i386-tlb.h: Re-generate.
 520
 521 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 522
 523         * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
 524         vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
 525         sha256*): Drop Disp<N>.
 526
 527 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 528
 529         * i386-dis.c (EbndS, bnd_swap_mode): New.
 530         (prefix_table): Use EbndS.
 531         (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
 532         * i386-opc.tbl (bndmov): Move misplaced Load.
 533         * i386-tlb.h: Re-generate.
 534
 535 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 536
 537         * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
 538         templates allowing memory operands and folded ones for register
 539         only flavors.
 540         * i386-tlb.h: Re-generate.
 541
 542 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 543
 544         * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
 545         256-bit templates. Drop redundant leftover Disp<N>.
 546         * i386-tlb.h: Re-generate.
 547
 548 2018-03-14  Kito Cheng  <kito.cheng@gmail.com>
 549
 550         * riscv-opc.c (riscv_insn_types): New.
 551
 552 2018-03-13  Nick Clifton  <nickc@redhat.com>
 553
 554         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 555
 556 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 557
 558         * i386-opc.tbl: Add Optimize to clr.
 559         * i386-tbl.h: Regenerated.
 560
 561 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 562
 563         * i386-gen.c (opcode_modifiers): Remove OldGcc.
 564         * i386-opc.h (OldGcc): Removed.
 565         (i386_opcode_modifier): Remove oldgcc.
 566         * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
 567         instructions for old (<= 2.8.1) versions of gcc.
 568         * i386-tbl.h: Regenerated.
 569
 570 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 571
 572         * i386-opc.h (EVEXDYN): New.
 573         * i386-opc.tbl: Fold various AVX512VL templates.
 574         * i386-tlb.h: Re-generate.
 575
 576 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 577
 578         * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
 579         vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
 580         vpexpandd, vpexpandq): Fold AFX512VF templates.
 581         * i386-tlb.h: Re-generate.
 582
 583 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 584
 585         * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
 586         Fold 128- and 256-bit VEX-encoded templates.
 587         * i386-tlb.h: Re-generate.
 588
 589 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 590
 591         * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
 592         vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
 593         vpexpandd, vpexpandq): Fold AVX512F templates.
 594         * i386-tlb.h: Re-generate.
 595
 596 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 597
 598         * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
 599         64-bit templates. Drop Disp<N>.
 600         * i386-tlb.h: Re-generate.
 601
 602 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 603
 604         * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
 605         and 256-bit templates.
 606         * i386-tlb.h: Re-generate.
 607
 608 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 609
 610         * i386-opc.tbl (cmpxchg8b): Add NoRex64.
 611         * i386-tlb.h: Re-generate.
 612
 613 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 614
 615         * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
 616         Drop NoAVX.
 617         * i386-tlb.h: Re-generate.
 618
 619 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 620
 621         * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
 622         * i386-tlb.h: Re-generate.
 623
 624 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 625
 626         * i386-gen.c (opcode_modifiers): Delete FloatD.
 627         * i386-opc.h (FloatD): Delete.
 628         (struct i386_opcode_modifier): Delete floatd.
 629         * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
 630         FloatD by D.
 631         * i386-tlb.h: Re-generate.
 632
 633 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 634
 635         * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
 636
 637 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 638
 639         * i386-opc.tbl (vmovd): Disallow Qword memory operands.
 640         * i386-tlb.h: Re-generate.
 641
 642 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 643
 644         * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
 645         forms.
 646         * i386-tlb.h: Re-generate.
 647
 648 2018-03-07  Alan Modra  <amodra@gmail.com>
 649
 650         * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
 651         bfd_arch_rs6000.
 652         * disassemble.h (print_insn_rs6000): Delete.
 653         * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
 654         (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
 655         (print_insn_rs6000): Delete.
 656
 657 2018-03-03  Alan Modra  <amodra@gmail.com>
 658
 659         * sysdep.h (opcodes_error_handler): Define.
 660         (_bfd_error_handler): Declare.
 661         * Makefile.am: Remove stray #.
 662         * opc2c.c (main): Remove bogus -l arg handling.  Print "DO NOT
 663         EDIT" comment.
 664         * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
 665         * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
 666         * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
 667         opcodes_error_handler to print errors.  Standardize error messages.
 668         * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
 669         and include opintl.h.
 670         * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
 671         * i386-gen.c: Standardize error messages.
 672         * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
 673         * Makefile.in: Regenerate.
 674         * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
 675         * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
 676         * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
 677         * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
 678         * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
 679         * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
 680         * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
 681         * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
 682         * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
 683         * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
 684         * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
 685         * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
 686         * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
 687
 688 2018-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 689
 690         * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
 691         vpsub[bwdq] instructions.
 692         * i386-tbl.h: Regenerated.
 693
 694 2018-03-01  Alan Modra  <amodra@gmail.com>
 695
 696         * configure.ac (ALL_LINGUAS): Sort.
 697         * configure: Regenerate.
 698
 699 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 700
 701         * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
 702         macro by assignements.
 703
 704 2018-02-27  H.J. Lu  <hongjiu.lu@intel.com>
 705
 706         PR gas/22871
 707         * i386-gen.c (opcode_modifiers): Add Optimize.
 708         * i386-opc.h (Optimize): New enum.
 709         (i386_opcode_modifier): Add optimize.
 710         * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
 711         "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
 712         "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
 713         "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
 714         vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
 715         vpxord and vpxorq.
 716         * i386-tbl.h: Regenerated.
 717
 718 2018-02-26  Alan Modra  <amodra@gmail.com>
 719
 720         * crx-dis.c (getregliststring): Allocate a large enough buffer
 721         to silence false positive gcc8 warning.
 722
 723 2018-02-22  Shea Levy <shea@shealevy.com>
 724
 725         * disassemble.c (ARCH_riscv): Define if ARCH_all.
 726
 727 2018-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 728
 729         * i386-opc.tbl: Add {rex},
 730         * i386-tbl.h: Regenerated.
 731
 732 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
 733
 734         * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
 735         (mips16_opcodes): Replace `M' with `m' for "restore".
 736
 737 2018-02-19  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 738
 739         * arm-dis.c (thumb_opcodes): Fix BXNS mask.
 740
 741 2018-02-13  Maciej W. Rozycki  <macro@mips.com>
 742
 743         * wasm32-dis.c (print_insn_wasm32): Rename `index' local
 744         variable to `function_index'.
 745
 746 2018-02-13  Nick Clifton  <nickc@redhat.com>
 747
 748         PR 22823
 749         * metag-dis.c (print_fmmov): Double buffer size to avoid warning
 750         about truncation of printing.
 751
 752 2018-02-12  Henry Wong <henry@stuffedcow.net>
 753
 754         * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
 755
 756 2018-02-05  Nick Clifton  <nickc@redhat.com>
 757
 758         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 759
 760 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 761
 762         * i386-dis.c (enum): Add pconfig.
 763         * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
 764         (cpu_flags): Add CpuPCONFIG.
 765         * i386-opc.h (enum): Add CpuPCONFIG.
 766         (i386_cpu_flags): Add cpupconfig.
 767         * i386-opc.tbl: Add PCONFIG instruction.
 768         * i386-init.h: Regenerate.
 769         * i386-tbl.h: Likewise.
 770
 771 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 772
 773         * i386-dis.c (enum): Add PREFIX_0F09.
 774         * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
 775         (cpu_flags): Add CpuWBNOINVD.
 776         * i386-opc.h (enum): Add CpuWBNOINVD.
 777         (i386_cpu_flags): Add cpuwbnoinvd.
 778         * i386-opc.tbl: Add WBNOINVD instruction.
 779         * i386-init.h: Regenerate.
 780         * i386-tbl.h: Likewise.
 781
 782 2018-01-17  Jim Wilson  <jimw@sifive.com>
 783
 784         * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
 785
 786 2018-01-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 787
 788         * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
 789         Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
 790         CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
 791         (cpu_flags): Add CpuIBT, CpuSHSTK.
 792         * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
 793         (i386_cpu_flags): Add cpuibt, cpushstk.
 794         * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
 795         * i386-init.h: Regenerate.
 796         * i386-tbl.h: Likewise.
 797
 798 2018-01-16  Nick Clifton  <nickc@redhat.com>
 799
 800         * po/pt_BR.po: Updated Brazilian Portugese translation.
 801         * po/de.po: Updated German translation.
 802
 803 2018-01-15  Jim Wilson  <jimw@sifive.com>
 804
 805         * riscv-opc.c (match_c_nop): New.
 806         (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
 807
 808 2018-01-15  Nick Clifton  <nickc@redhat.com>
 809
 810         * po/uk.po: Updated Ukranian translation.
 811
 812 2018-01-13  Nick Clifton  <nickc@redhat.com>
 813
 814         * po/opcodes.pot: Regenerated.
 815
 816 2018-01-13  Nick Clifton  <nickc@redhat.com>
 817
 818         * configure: Regenerate.
 819
 820 2018-01-13  Nick Clifton  <nickc@redhat.com>
 821
 822         2.30 branch created.
 823
 824 2018-01-11  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 825
 826         * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
 827         * i386-tbl.h: Regenerate.
 828
 829 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 830
 831         * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
 832         * i386-tbl.h: Re-generate.
 833
 834 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 835
 836         * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
 837         vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
 838         vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
 839         vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
 840         vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
 841         Disp8MemShift of AVX512VL forms.
 842         * i386-tbl.h: Re-generate.
 843
 844 2018-01-09  Jim Wilson  <jimw@sifive.com>
 845
 846         * riscv-dis.c (maybe_print_address): If base_reg is zero,
 847         then the hi_addr value is zero.
 848
 849 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 850
 851         * arm-dis.c (arm_opcodes): Add csdb.
 852         (thumb32_opcodes): Add csdb.
 853
 854 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 855
 856         * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
 857         * aarch64-asm-2.c: Regenerate.
 858         * aarch64-dis-2.c: Regenerate.
 859         * aarch64-opc-2.c: Regenerate.
 860
 861 2018-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 862
 863         PR gas/22681
 864         * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
 865         Remove AVX512 vmovd with 64-bit operands.
 866         * i386-tbl.h: Regenerated.
 867
 868 2018-01-05  Jim Wilson  <jimw@sifive.com>
 869
 870         * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
 871         jalr.
 872
 873 2018-01-03  Alan Modra  <amodra@gmail.com>
 874
 875         Update year range in copyright notice of all files.
 876
 877 2018-01-02  Jan Beulich  <jbeulich@suse.com>
 878
 879         * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
 880         and OPERAND_TYPE_REGZMM entries.
 881
 882 For older changes see ChangeLog-2017
 883 \f
 884 Copyright (C) 2018 Free Software Foundation, Inc.
 885
 886 Copying and distribution of this file, with or without modification,
 887 are permitted in any medium without royalty provided the copyright
 888 notice and this notice are preserved.
 889
 890 Local Variables:
 891 mode: change-log
 892 left-margin: 8
 893 fill-column: 74
 894 version-control: never
 895 End: