gas/testsuite/
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2012-08-07 Roland McGrath <mcgrathr@google.com>
2
3 * i386-dis.c (reg_table): Fill out REG_0F0D table with
4 AMD-reserved cases as "prefetch".
5 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
6 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
7 (reg_table): Use those under REG_0F18.
8 (mod_table): Add those cases as "nop/reserved".
9
10 2012-08-07 Jan Beulich <jbeulich@suse.com>
11
12 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
13
14 2012-08-06 Roland McGrath <mcgrathr@google.com>
15
16 * i386-dis.c (print_insn): Print spaces between multiple excess
17 prefixes. Return actual number of excess prefixes consumed,
18 not always one.
19
20 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
21
22 2012-08-06 Roland McGrath <mcgrathr@google.com>
23 Victor Khimenko <khim@google.com>
24 H.J. Lu <hongjiu.lu@intel.com>
25
26 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
27 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
28 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
29 (OP_E_register): Likewise.
30 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
31
32 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
33
34 * configure.in: Formatting.
35 * configure: Regenerate.
36
37 2012-08-01 Alan Modra <amodra@gmail.com>
38
39 * h8300-dis.c: Fix printf arg warnings.
40 * i960-dis.c: Likewise.
41 * mips-dis.c: Likewise.
42 * pdp11-dis.c: Likewise.
43 * sh-dis.c: Likewise.
44 * v850-dis.c: Likewise.
45 * configure.in: Formatting.
46 * configure: Regenerate.
47 * rl78-decode.c: Regenerate.
48 * po/POTFILES.in: Regenerate.
49
50 2012-07-31 Chao-Ying Fu <fu@mips.com>
51 Catherine Moore <clm@codesourcery.com>
52 Maciej W. Rozycki <macro@codesourcery.com>
53
54 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
55 (DSP_VOLA): Likewise.
56 (D32, D33): Likewise.
57 (micromips_opcodes): Add DSP ASE instructions.
58 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
59 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
60
61 2012-07-31 Jan Beulich <jbeulich@suse.com>
62
63 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
64 instruction group. Mark as requiring AVX2.
65 * i386-tbl.h: Re-generate.
66
67 2012-07-30 Nick Clifton <nickc@redhat.com>
68
69 * po/opcodes.pot: Updated template.
70 * po/es.po: Updated Spanish translation.
71 * po/fi.po: Updated Finnish translation.
72
73 2012-07-27 Mike Frysinger <vapier@gentoo.org>
74
75 * configure.in (BFD_VERSION): Run bfd/configure --version and
76 parse the output of that.
77 * configure: Regenerate.
78
79 2012-07-25 James Lemke <jwlemke@codesourcery.com>
80
81 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
82
83 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
84 Dr David Alan Gilbert <dave@treblig.org>
85
86 PR binutils/13135
87 * arm-dis.c: Add necessary casts for printing integer values.
88 Use %s when printing string values.
89 * hppa-dis.c: Likewise.
90 * m68k-dis.c: Likewise.
91 * microblaze-dis.c: Likewise.
92 * mips-dis.c: Likewise.
93 * sparc-dis.c: Likewise.
94
95 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
96
97 PR binutils/14355
98 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
99 (VEX_LEN_0FXOP_08_CD): Likewise.
100 (VEX_LEN_0FXOP_08_CE): Likewise.
101 (VEX_LEN_0FXOP_08_CF): Likewise.
102 (VEX_LEN_0FXOP_08_EC): Likewise.
103 (VEX_LEN_0FXOP_08_ED): Likewise.
104 (VEX_LEN_0FXOP_08_EE): Likewise.
105 (VEX_LEN_0FXOP_08_EF): Likewise.
106 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
107 vpcomub, vpcomuw, vpcomud, vpcomuq.
108 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
109 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
110 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
111 VEX_LEN_0FXOP_08_EF.
112
113 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
114
115 * i386-dis.c (PREFIX_0F38F6): New.
116 (prefix_table): Add adcx, adox instructions.
117 (three_byte_table): Use PREFIX_0F38F6.
118 (mod_table): Add rdseed instruction.
119 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
120 (cpu_flags): Likewise.
121 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
122 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
123 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
124 prefetchw.
125 * i386-tbl.h: Regenerate.
126 * i386-init.h: Likewise.
127
128 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
129
130 * mips-dis.c: Remove gratuitous newline.
131
132 2012-07-05 Sean Keys <skeys@ipdatasys.com>
133
134 * xgate-dis.c: Removed an IF statement that will
135 always be false due to overlapping operand masks.
136 * xgate-opc.c: Corrected 'com' opcode entry and
137 fixed spacing.
138
139 2012-07-02 Roland McGrath <mcgrathr@google.com>
140
141 * i386-opc.tbl: Add RepPrefixOk to nop.
142 * i386-tbl.h: Regenerate.
143
144 2012-06-28 Nick Clifton <nickc@redhat.com>
145
146 * po/vi.po: Updated Vietnamese translation.
147
148 2012-06-22 Roland McGrath <mcgrathr@google.com>
149
150 * i386-opc.tbl: Add RepPrefixOk to ret.
151 * i386-tbl.h: Regenerate.
152
153 * i386-opc.h (RepPrefixOk): New enum constant.
154 (i386_opcode_modifier): New bitfield 'repprefixok'.
155 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
156 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
157 instructions that have IsString.
158 * i386-tbl.h: Regenerate.
159
160 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
161
162 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
163 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
164 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
165 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
166 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
167 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
168 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
169 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
170 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
171
172 2012-05-19 Alan Modra <amodra@gmail.com>
173
174 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
175 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
176
177 2012-05-18 Alan Modra <amodra@gmail.com>
178
179 * ia64-opc.c: Remove #include "ansidecl.h".
180 * z8kgen.c: Include sysdep.h first.
181
182 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
183 * bfin-dis.c: Likewise.
184 * i860-dis.c: Likewise.
185 * ia64-dis.c: Likewise.
186 * ia64-gen.c: Likewise.
187 * m68hc11-dis.c: Likewise.
188 * mmix-dis.c: Likewise.
189 * msp430-dis.c: Likewise.
190 * or32-dis.c: Likewise.
191 * rl78-dis.c: Likewise.
192 * rx-dis.c: Likewise.
193 * tic4x-dis.c: Likewise.
194 * tilegx-opc.c: Likewise.
195 * tilepro-opc.c: Likewise.
196 * rx-decode.c: Regenerate.
197
198 2012-05-17 James Lemke <jwlemke@codesourcery.com>
199
200 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
201
202 2012-05-17 James Lemke <jwlemke@codesourcery.com>
203
204 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
205
206 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
207 Nick Clifton <nickc@redhat.com>
208
209 PR 14072
210 * configure.in: Add check that sysdep.h has been included before
211 any system header files.
212 * configure: Regenerate.
213 * config.in: Regenerate.
214 * sysdep.h: Generate an error if included before config.h.
215 * alpha-opc.c: Include sysdep.h before any other header file.
216 * alpha-dis.c: Likewise.
217 * avr-dis.c: Likewise.
218 * cgen-opc.c: Likewise.
219 * cr16-dis.c: Likewise.
220 * cris-dis.c: Likewise.
221 * crx-dis.c: Likewise.
222 * d10v-dis.c: Likewise.
223 * d10v-opc.c: Likewise.
224 * d30v-dis.c: Likewise.
225 * d30v-opc.c: Likewise.
226 * h8500-dis.c: Likewise.
227 * i370-dis.c: Likewise.
228 * i370-opc.c: Likewise.
229 * m10200-dis.c: Likewise.
230 * m10300-dis.c: Likewise.
231 * micromips-opc.c: Likewise.
232 * mips-opc.c: Likewise.
233 * mips61-opc.c: Likewise.
234 * moxie-dis.c: Likewise.
235 * or32-opc.c: Likewise.
236 * pj-dis.c: Likewise.
237 * ppc-dis.c: Likewise.
238 * ppc-opc.c: Likewise.
239 * s390-dis.c: Likewise.
240 * sh-dis.c: Likewise.
241 * sh64-dis.c: Likewise.
242 * sparc-dis.c: Likewise.
243 * sparc-opc.c: Likewise.
244 * spu-dis.c: Likewise.
245 * tic30-dis.c: Likewise.
246 * tic54x-dis.c: Likewise.
247 * tic80-dis.c: Likewise.
248 * tic80-opc.c: Likewise.
249 * tilegx-dis.c: Likewise.
250 * tilepro-dis.c: Likewise.
251 * v850-dis.c: Likewise.
252 * v850-opc.c: Likewise.
253 * vax-dis.c: Likewise.
254 * w65-dis.c: Likewise.
255 * xgate-dis.c: Likewise.
256 * xtensa-dis.c: Likewise.
257 * rl78-decode.opc: Likewise.
258 * rl78-decode.c: Regenerate.
259 * rx-decode.opc: Likewise.
260 * rx-decode.c: Regenerate.
261
262 2012-05-17 Alan Modra <amodra@gmail.com>
263
264 * ppc_dis.c: Don't include elf/ppc.h.
265
266 2012-05-16 Meador Inge <meadori@codesourcery.com>
267
268 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
269 to PUSH/POP {reg}.
270
271 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
272 Stephane Carrez <stcarrez@nerim.fr>
273
274 * configure.in: Add S12X and XGATE co-processor support to m68hc11
275 target.
276 * disassemble.c: Likewise.
277 * configure: Regenerate.
278 * m68hc11-dis.c: Make objdump output more consistent, use hex
279 instead of decimal and use 0x prefix for hex.
280 * m68hc11-opc.c: Add S12X and XGATE opcodes.
281
282 2012-05-14 James Lemke <jwlemke@codesourcery.com>
283
284 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
285 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
286 (vle_opcd_indices): New array.
287 (lookup_vle): New function.
288 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
289 (print_insn_powerpc): Likewise.
290 * ppc-opc.c: Likewise.
291
292 2012-05-14 Catherine Moore <clm@codesourcery.com>
293 Maciej W. Rozycki <macro@codesourcery.com>
294 Rhonda Wittels <rhonda@codesourcery.com>
295 Nathan Froyd <froydnj@codesourcery.com>
296
297 * ppc-opc.c (insert_arx, extract_arx): New functions.
298 (insert_ary, extract_ary): New functions.
299 (insert_li20, extract_li20): New functions.
300 (insert_rx, extract_rx): New functions.
301 (insert_ry, extract_ry): New functions.
302 (insert_sci8, extract_sci8): New functions.
303 (insert_sci8n, extract_sci8n): New functions.
304 (insert_sd4h, extract_sd4h): New functions.
305 (insert_sd4w, extract_sd4w): New functions.
306 (insert_vlesi, extract_vlesi): New functions.
307 (insert_vlensi, extract_vlensi): New functions.
308 (insert_vleui, extract_vleui): New functions.
309 (insert_vleil, extract_vleil): New functions.
310 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
311 (BI16, BI32, BO32, B8): New.
312 (B15, B24, CRD32, CRS): New.
313 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
314 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
315 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
316 (SH6_MASK): Use PPC_OPSHIFT_INV.
317 (SI8, UI5, OIMM5, UI7, BO16): New.
318 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
319 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
320 (ALLOW8_SPRG): New.
321 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
322 (OPVUP, OPVUP_MASK OPVUP): New
323 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
324 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
325 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
326 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
327 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
328 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
329 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
330 (SE_IM5, SE_IM5_MASK): New.
331 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
332 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
333 (BO32DNZ, BO32DZ): New.
334 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
335 (PPCVLE): New.
336 (powerpc_opcodes): Add new VLE instructions. Update existing
337 instruction to include PPCVLE if supported.
338 * ppc-dis.c (ppc_opts): Add vle entry.
339 (get_powerpc_dialect): New function.
340 (powerpc_init_dialect): VLE support.
341 (print_insn_big_powerpc): Call get_powerpc_dialect.
342 (print_insn_little_powerpc): Likewise.
343 (operand_value_powerpc): Handle negative shift counts.
344 (print_insn_powerpc): Handle 2-byte instruction lengths.
345
346 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
347
348 PR binutils/14028
349 * configure.in: Invoke ACX_HEADER_STRING.
350 * configure: Regenerate.
351 * config.in: Regenerate.
352 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
353 string.h and strings.h.
354
355 2012-05-11 Nick Clifton <nickc@redhat.com>
356
357 PR binutils/14006
358 * arm-dis.c (print_insn): Fix detection of instruction mode in
359 files containing multiple executable sections.
360
361 2012-05-03 Sean Keys <skeys@ipdatasys.com>
362
363 * Makefile.in, configure: regenerate
364 * disassemble.c (disassembler): Recognize ARCH_XGATE.
365 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
366 New functions.
367 * configure.in: Recognize xgate.
368 * xgate-dis.c, xgate-opc.c: New files for support of xgate
369 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
370 and opcode generation for xgate.
371
372 2012-04-30 DJ Delorie <dj@redhat.com>
373
374 * rx-decode.opc (MOV): Do not sign-extend immediates which are
375 already the maximum bit size.
376 * rx-decode.c: Regenerate.
377
378 2012-04-27 David S. Miller <davem@davemloft.net>
379
380 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
381 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
382
383 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
384 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
385
386 * sparc-opc.c (CBCOND): New define.
387 (CBCOND_XCC): Likewise.
388 (cbcond): New helper macro.
389 (sparc_opcodes): Add compare-and-branch instructions.
390
391 * sparc-dis.c (print_insn_sparc): Handle ')'.
392 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
393
394 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
395 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
396
397 2012-04-12 David S. Miller <davem@davemloft.net>
398
399 * sparc-dis.c (X_DISP10): Define.
400 (print_insn_sparc): Handle '='.
401
402 2012-04-01 Mike Frysinger <vapier@gentoo.org>
403
404 * bfin-dis.c (fmtconst): Replace decimal handling with a single
405 sprintf call and the '*' field width.
406
407 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
408
409 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
410
411 2012-03-16 Alan Modra <amodra@gmail.com>
412
413 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
414 (powerpc_opcd_indices): Bump array size.
415 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
416 corresponding to unused opcodes to following entry.
417 (lookup_powerpc): New function, extracted and optimised from..
418 (print_insn_powerpc): ..here.
419
420 2012-03-15 Alan Modra <amodra@gmail.com>
421 James Lemke <jwlemke@codesourcery.com>
422
423 * disassemble.c (disassemble_init_for_target): Handle ppc init.
424 * ppc-dis.c (private): New var.
425 (powerpc_init_dialect): Don't return calloc failure, instead use
426 private.
427 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
428 (powerpc_opcd_indices): New array.
429 (disassemble_init_powerpc): New function.
430 (print_insn_big_powerpc): Don't init dialect here.
431 (print_insn_little_powerpc): Likewise.
432 (print_insn_powerpc): Start search using powerpc_opcd_indices.
433
434 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
435
436 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
437 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
438 (PPCVEC2, PPCTMR, E6500): New short names.
439 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
440 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
441 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
442 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
443 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
444 optional operands on sync instruction for E6500 target.
445
446 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
447
448 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
449
450 2012-02-27 Alan Modra <amodra@gmail.com>
451
452 * mt-dis.c: Regenerate.
453
454 2012-02-27 Alan Modra <amodra@gmail.com>
455
456 * v850-opc.c (extract_v8): Rearrange to make it obvious this
457 is the inverse of corresponding insert function.
458 (extract_d22, extract_u9, extract_r4): Likewise.
459 (extract_d9): Correct sign extension.
460 (extract_d16_15): Don't assume "long" is 32 bits, and don't
461 rely on implementation defined behaviour for shift right of
462 signed types.
463 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
464 (extract_d23): Likewise, and correct mask.
465
466 2012-02-27 Alan Modra <amodra@gmail.com>
467
468 * crx-dis.c (print_arg): Mask constant to 32 bits.
469 * crx-opc.c (cst4_map): Use int array.
470
471 2012-02-27 Alan Modra <amodra@gmail.com>
472
473 * arc-dis.c (BITS): Don't use shifts to mask off bits.
474 (FIELDD): Sign extend with xor,sub.
475
476 2012-02-25 Walter Lee <walt@tilera.com>
477
478 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
479 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
480 TILEPRO_OPC_LW_TLS_SN.
481
482 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
483
484 * i386-opc.h (HLEPrefixNone): New.
485 (HLEPrefixLock): Likewise.
486 (HLEPrefixAny): Likewise.
487 (HLEPrefixRelease): Likewise.
488
489 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
490
491 * i386-dis.c (HLE_Fixup1): New.
492 (HLE_Fixup2): Likewise.
493 (HLE_Fixup3): Likewise.
494 (Ebh1): Likewise.
495 (Evh1): Likewise.
496 (Ebh2): Likewise.
497 (Evh2): Likewise.
498 (Ebh3): Likewise.
499 (Evh3): Likewise.
500 (MOD_C6_REG_7): Likewise.
501 (MOD_C7_REG_7): Likewise.
502 (RM_C6_REG_7): Likewise.
503 (RM_C7_REG_7): Likewise.
504 (XACQUIRE_PREFIX): Likewise.
505 (XRELEASE_PREFIX): Likewise.
506 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
507 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
508 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
509 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
510 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
511 MOD_C6_REG_7 and MOD_C7_REG_7.
512 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
513 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
514 xtest.
515 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
516 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
517
518 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
519 CPU_RTM_FLAGS.
520 (cpu_flags): Add CpuHLE and CpuRTM.
521 (opcode_modifiers): Add HLEPrefixOk.
522
523 * i386-opc.h (CpuHLE): New.
524 (CpuRTM): Likewise.
525 (HLEPrefixOk): Likewise.
526 (i386_cpu_flags): Add cpuhle and cpurtm.
527 (i386_opcode_modifier): Add hleprefixok.
528
529 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
530 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
531 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
532 operand. Add xacquire, xrelease, xabort, xbegin, xend and
533 xtest.
534 * i386-init.h: Regenerated.
535 * i386-tbl.h: Likewise.
536
537 2012-01-24 DJ Delorie <dj@redhat.com>
538
539 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
540 * rl78-decode.c: Regenerate.
541
542 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
543
544 PR binutils/10173
545 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
546
547 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
548
549 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
550 register and move them after pmove with PSR/PCSR register.
551
552 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
553
554 * i386-dis.c (mod_table): Add vmfunc.
555
556 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
557 (cpu_flags): CpuVMFUNC.
558
559 * i386-opc.h (CpuVMFUNC): New.
560 (i386_cpu_flags): Add cpuvmfunc.
561
562 * i386-opc.tbl: Add vmfunc.
563 * i386-init.h: Regenerated.
564 * i386-tbl.h: Likewise.
565
566 For older changes see ChangeLog-2011
567 \f
568 Local Variables:
569 mode: change-log
570 left-margin: 8
571 fill-column: 74
572 version-control: never
573 End:
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